Commit graph

52574 commits

Author SHA1 Message Date
Kenneth Graunke
fdabc7d9f6 meta: Don't _mesa_set_enable() invalid targets in ES 1.
GL_TEXTURE_1D, GL_TEXTURE_3D, GL_TEXTURE_RECTANGLE, and
GL_TEXTURE_GEN_S/T/R/Q don't exist in ES 1 contexts, so any meta ops
that used _mesa_meta_begin with MESA_META_TEXTURE would trigger GL
errors.  One such operation is _mesa_meta_Clear().

On ES 1, we want to disable GL_TEXTURE_GEN_STR_OES instead.

Fixes the ES1 conformance test miplin.c, which was regressed by commit
08be1d288f.

NOTE: This is a candidate for the 9.0 branch.

v2: Also blacklist GL_TEXTURE_3D, per Brian's comment.
v3: Disable GL_TEXTURE_GEN_STR_OES, per Ian's comment.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54297
Reviewed-by: Brian Paul <brianp@vmware.com> [v1]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 679c93ff89)
2012-09-28 15:54:18 -07:00
Matt Turner
cb84fe5e10 build: Link libglapi with pthreads
NOTE: This is a candidate for the 9.0 branch.

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=839060
          https://bugs.gentoo.org/show_bug.cgi?id=435152
Reviewed-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 9ed00075d8)
2012-09-28 15:48:30 -07:00
Matt Turner
cc18cc282f build: Use AX_PTHREAD to detect pthreads
NOTE: This is a candidate for the 9.0 branch.

Reviewed-by: Adam Jackson <ajax@redhat.com>
(cherry picked from commit 7da12426f7)
2012-09-28 15:48:25 -07:00
Brian Paul
5ef472dd83 mesa: fix incorrect error for glCompressedSubTexImage
If a subtexture region isn't aligned to the compressed block size,
return GL_INVALID_OPERATION, not gl_INVALID_VALUE.

NOTE: This is a candidate for the stable branches.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 1f586684d6)
2012-09-28 15:47:57 -07:00
Ian Romanick
7c60a95a0e i915: Don't free the intel_context structure when intelCreateContext fails.
intelDestroyContext will eventually be called, and it will clean things up.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
(cherry picked from commit de958de71b)
2012-09-28 15:41:34 -07:00
Ian Romanick
8aaef12a59 i965: Don't free the intel_context structure when intelCreateContext fails.
This squashes two commits from master:

    i965: Don't free the intel_context structure when intelCreateContext fails.

    intelDestroyContext will eventually be called, and it will clean things
    up.  The call to brwInitVtbl is moved earlier so that
    intelDestroyContext can call the device-specific destructor.  This also
    makes the code look more like the i915 code.

    NOTE: This is a candidate for the 9.0 branch.

    Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301
    (cherry picked from commit 87f26214d6)

And:

    i965: brwInitVtbl needs to know the chipset generation

    Fixes major regressions since de958de.

    Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
    (cherry picked from commit e87c63f288)

The second commit message should have read 'since 87f2621', of course.
2012-09-28 15:40:20 -07:00
Ian Romanick
a87b0110b9 intel: Don't call intelDestroyContext if there is no context to destroy
Some error paths in the device-specific context creation functions can exit
before the deintel_context structure is allocated.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301
(cherry picked from commit 22897c7497)
2012-09-28 15:07:02 -07:00
Ian Romanick
5174eed793 dri_util: Use calloc to allocate __DRIcontext
The __DRIcontext contains some pointers, and some drivers check for them to be
NULL in some failure paths.  Instead of sprinkling NULL assignments across the
various drivers, just zero out the whole thing.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Lu Hua <huax.lu@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301
(cherry picked from commit f93cb0bebb)
2012-09-28 15:06:58 -07:00
Kenneth Graunke
8c1c18769e i965/blorp: Add support for blits between SRGB and linear formats (fixed).
This is a squash of 2 commits from master.
The first commit is:

i965/blorp: Add support for blits between SRGB and linear formats.

Fixes colorspace issues in L4D2 when multisampling is enabled (the
scene was far too dark, but the flashlight area was way too bright).

The nVidia and AMD binary drivers both allow this kind of blit.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit e2249e8c4d)

The second commit is:

i965/blorp: Fix sRGB MSAA resolves.

Commit e2249e8c4d (i965/blorp: Add
support for blits between SRGB and linear formats) changed blorp to
always configure surface states for in linear format (even if the
underlying surface is sRGB).  This allowed sRGB-to-linear and
linear-to-sRGB blits to occur without causing the image to be
inappropriately brightened or darkened.

However, it broke sRGB MSAA resolves, since they rely on the
destination buffer format being sRGB in order to ensure that samples
are averaged together in sRGB-correct fashion.

This patch fixes the problem by instead configuring the source buffer
to use the *same* format as the destination buffer.  This ensures that
the image won't be brightened or darkened, but preserves proper sRGB
averaging.

Fixes piglit tests "EXT_framebuffer_multisample/accuracy srgb".

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55265

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 124b214f09)
2012-09-28 11:20:40 -07:00
Paul Berry
849a3d243d i965: Don't spill "smeared" registers.
Fixes an assertion failure when compiling certain shaders that need both
pull constants and register spilling:

brw_eu_emit.c:204: validate_reg: Assertion `execsize >= width' failed.

NOTE: This is a candidate for the 8.0 release branch.

Signed-off-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit ab5ce2789f)
2012-09-28 11:20:40 -07:00
Paul Berry
36bc0fe4f2 i965/blorp: Increase Y alignment for multisampled stencil blits.
This patch is a band-aid fix for a bug in commit 5fd67fa (i965/blorp:
Reduce alignment restrictions for stencil blits), which causes
multisampled stencil blits to work incorrectly on Sandy Bridge.

When blitting to or from a normal stencil buffer, we have to use a
coordinate transformation that swizzles coordinates to account for the
fact that stencil buffers use W tiling, but the most similar tiling
format available for textures and render targets is Y tiling.  The
differences between W and Y tiling cause pixels to be scrambled within
a block of size 8x4 (width x height) as measured relative to a W tile,
or 16x2 as measured relative to a Y tile.  So in order to make sure
that pixels at the edges of the blit aren't lost, we need to align the
rendering rectangle (and the buffer sizes) to multiples of the 8x4
block size.  This alignment happens in the brw_blorp_blit_params
constructor, whereas the determination of how to swizzle the
coordinates happens during code generation, in the
brw_blorp_blit_program class.

When blitting to or from a multisampled stencil buffer, the coordinate
swizzling is more complex, because it has to account for the
interleaving pattern of samples, which uses 4x4 blocks for 4x MSAA and
8x4 blocks for 8x MSAA.  The end result is that if multisampling is in
use, the 16x2 block size (relative so a Y tile) needs to be expanded
to 16x4, and the corresponding size relative to a W tile expands to
8x8.

The problem doesn't affect Ivy Bridge severely enough to crop up in
Piglit tests because on Ivy Bridge we have to disable multisampling
when blitting *to* a multisampled stencil buffer (the blorp compiler
generates code to compensate for the fact that multisampling is
disabled).  However I suspect a bug is still present because we don't
disable multisampling when blitting *from* a multisampled stencil
buffer.

This patch fixes the problem by doubling the vertical alignment
requirement when blitting to or from a multisampled stencil buffer,
and multisampling has not been disabled.

In the long run I would like to rework the brw_blorp_blit_params
constructor--it's difficult to follow and has had several subtle bugs
like this one.  However this band-aid fix should be suitable for
cherry-picking to release branches.

Fixes Piglit tests "unaligned-blit {2,4} stencil {msaa,upsample}" on
Sandy Bridge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit a33ce665a5)
2012-09-28 11:20:39 -07:00
Paul Berry
76c1c34c4a i965/blorp: Fix offsets and width/height for stencil blits.
Fixes piglit test "framebuffer-blit-levels draw stencil".

Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 1a5d4f7cb2)
2012-09-28 11:20:39 -07:00
Paul Berry
21e9850d53 i965/blorp: Reduce alignment restrictions for stencil blits.
Previously, we aligned all stencil blit operations to multiples of the
size of a tile, since stencil buffers use W-tiling, and blorp has to
approximate this by configuring the 3D pipeline for Y-tiling and
swizzling coordinates.

However, this was unnecessarily conservative; it turns out that the
differences between W-tiling and Y-tiling are confined to 32-byte
sub-tiles within the 4k tiling pattern; the layout of these 32-byte
sub-tiles within the larger 4k tile is the same (8 sub-tiles across by
16 sub-tiles down, in column-major order).  Therefore we only need to
align stencil blit operations to multiples of the sub-tile size.

Note: although the performance improvement of this change is probably
quite small, the fact that W-tiling and Y-tiling formats only differ
within 32-byte sub-tiles will be essential in a future patch to ensure
that stencil blits work correctly between parts of the miptree other
than level/layer 0.  Making this change provides handy documentation
(and validation) of this fact.

Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 5fd67fac14)
2012-09-28 11:20:39 -07:00
Paul Berry
62bc4af0e1 i965/blorp: don't reduce stencil alignment restrictions when multisampling.
When blitting to a stencil buffer, we need to align the rectangle we
send down the rendering pipeline, to account for the fact that the
stencil buffer uses a W-tiled layout, but we are configuring its
surface state as Y-tiled.

Previously, when the stencil buffer was multisampled, we assumed that
we could reduce the amount of alignment that was necessary, since each
pixel occupies a block of 2x2 or 4x2 samples in the stencil buffer.
That would have been correct if the coordinates we were adjusting were
measured in pixels.  However, the conversion from pixel coordinates to
coordinates within the interleaved buffer has already been done;
therefore the full alignment restriction applies.

Note: the reason this mistake wasn't previously uncovered by piglit
tests is because it is being masked by another mistake: the blorp
engine is using overly conservative alignment restrictions when doing
stencil blits.  The overly conservative alignment restrictions will be
removed in the patch that follows.  Doing this fix now will prevent
the subsequent patch from introducing regressions.

Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 1a75063d5f)
2012-09-28 11:20:39 -07:00
Paul Berry
68da5dfc2c intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.
This patch modifies intel_region_get_aligned_offset() to make the
appropriate calculation when the blorp engine sets up a W-tiled
stencil buffer using a Y-tiled SURFACE_STATE.

Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit b760c9913d)
2012-09-28 11:20:39 -07:00
Paul Berry
96fd94ba94 intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
When the blorp engine is performing a blit from one stencil buffer to
another, it sets up the surface state for these buffers as Y-tiled, so
it needs to be able to force intel_region_get_tile_masks() to return
the appropriate masks for a Y-tiled region.

Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 50dec7fc2d)
2012-09-28 11:20:39 -07:00
Paul Berry
239e9bef92 i965/blorp: Account for offsets when emitting SURFACE_STATE.
Fixes piglit tests "framebuffer-blit-levels {read,draw} depth".

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit f04f219906)
2012-09-28 11:20:39 -07:00
Paul Berry
e87174cf4b i965/blorp: Thread level and layer through brw_blorp_blit_miptrees().
Previously, when performing a blit using the blorp engine, we failed
to account for the level and layer of the source and destination.  As
a result, all blits would occur between miplevel 0 and layer 0 of the
corresponding textures, regardless of which level/layer was bound to
the framebuffer.

This patch passes the correct level and layer through
brw_blorp_miptrees() into the brw_blorp_blit_params data structure.

Further patches in the series will adapt
gen{6,7}_blorp_emit_surface_state to make use of these parameters.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 3123f06215)
2012-09-28 11:20:39 -07:00
Paul Berry
127dc6d136 i965/blorp: store x and y offsets in brw_blorp_mip_info.
Currently, gen{6,7}_blorp_emit_surface_state assumes that the src and
dst surfaces are mapped to miplevel 0 and layer 0 (thus no surface
offset is required).  This is a bug, since the user might try to blit
to and from levels/layers other than 0.

To fix this bug, it will not be sufficient to have
gen6_{6,7}_blorp_emit_surface_state look up the surface offset at the
time they set up the surface state, since these offsets will need to
be tweaked when blitting stencil buffers (due to the fact that stencil
buffer blits have to swizzle between W and Y tiling formats).

So, to pave the way for the bug fix, this patch causes the x and y
offsets to be computed during blit setup and stored in
brw_blorp_mip_info.

As a result of this change, brw_blorp_mip_info doesn't need to store
the level and layer anymore.

For consistency, this patch makes a similar change to the handling of
depth buffers when doing HiZ operations.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit c130ce7b2b)
2012-09-28 11:20:38 -07:00
Paul Berry
602e9a0f37 i965/blorp: store surface width/height in brw_blorp_mip_info.
Previously, gen{6,7}_blorp_emit_surface_state would look up the width
and height of the surface at the time they set up the surface state,
and then tweak it if necessary (it's necessary when a W-tiled surface
is being mapped as Y-tiled).  With this patch, we look up the width
and height when setting up the blit, and store them in
brw_blorp_mip_info.  This allows us to do the necessary tweak in the
brw_blorp_blit_params constructor (where it makes more sense).  It
also reduces the need to keep track of level and layer in
brw_blorp_mip_info, so that a future patch can eliminate them
entirely.

For consistency, this patch makes a similar change to the handling of
depth buffers when doing HiZ operations.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 09b0fa8499)
2012-09-28 11:20:38 -07:00
Paul Berry
5c66640ac7 i965/blorp: Change gl_renderbuffer* params to intel_renderbuffer*.
This makes it more convenient for blorp functions to get access to
Intel-specific data inside the renderbuffer objects.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit e14b1288ef)
2012-09-28 11:20:38 -07:00
Paul Berry
cb9765ca94 i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.
Also add a clarifying comment for why the width/height doesn't need
adjustment for Gen7.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 32c7b2769c)
2012-09-28 11:20:38 -07:00
Paul Berry
5db1deab51 i965/gen6+: Adjust stencil buffer size after computing miptree layout.
Since Gen6+ stencil buffers use W-tiling (a tiling arrangement which
drm and the kernel are not aware of) we need to round up the width and
height of a stencil buffer to multiples of the W-tile size (64x64)
before allocating a stencil buffer.  Previously, we rounded up the
size of the base miplevel, and then computed the miptree layout based
on the rounded up size.  This was incorrect, because it meant that the
total size of the miptree would not be properly W-tile aligned, and
therefore we would not always allocate enough pages.

(Note: even though the GL API doesn't allow creation of mipmapped
stencil textures, it does allow mipmapping of a combined depth/stencil
texture, and on Gen6+, a combined depth/stencil texture is internally
implemented as a pair of separate depth and stencil buffers.)

For example, on Sandy Bridge, when allocating a mipmapped stencil
texture of size 128x128, we would first round up to the nearest
multiple of 64x64 (causing no change to the size), and then compute
the miptree layout (whose size worked out to 128x196).  Then we would
request an allocation of 128*196 bytes (6.125 pages), causing 7 pages
to be allocated to the texture.  However, the texture needs 8 pages,
since each W-tile occupies a page, and it takes 2 W-tiles to cover a
width of 128 and 4 W-tiles to cover a height of 196.

This patch changes the order of operations so that the miptree layout
is computed first and then the total size of the miptree is rounded up
to be W-tile aligned.

NOTE: This is a candidate for the 8.0 release branch.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit bde833c9d0)
2012-09-28 11:20:38 -07:00
Ian Romanick
4cdbf27fac mesa: Don't set uniform dispatch pointers for many things in ES2 or core
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 6c01a0e770)
2012-09-28 10:56:46 -07:00
Ian Romanick
0fb12a40e4 mesa: Don't set shaderapi dispatch pointers for many things in ES2 or core
v2: Allow GL_ARB_shader_objects functions in core profile because we
still expose the extension string there.  Don't allow
glBindFragDataLocation in GLES3 because it's not part of that API.
Based (mostly) on review comments from Eric Anholt.

NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit be66cf950e)
2012-09-28 10:55:30 -07:00
Ian Romanick
f16031513f mesa: Don't set vtxfmt dispatch pointers for many things in ES2 or core
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit aa0f588e2d)
2012-09-28 10:52:05 -07:00
Ian Romanick
0dc989ea5b mesa: Don't set loopback dispatch pointers for most things in ES2 or core
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit a13c07f752)
2012-09-28 10:50:16 -07:00
Ian Romanick
c01f896062 mesa: Pass GL context to _mesa_create_save_table
This isn't used by this patch, but it will be necessary for several
follow-on patches.  Separating this out will make it easier to reorder
patches later.

NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 3ef9e43865)
2012-09-28 10:36:55 -07:00
Ian Romanick
b56c93dfff mesa: Don't set dispatch pointer for glTexStorage in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit ee77061277)
2012-09-28 10:35:02 -07:00
Ian Romanick
90ec1db9f4 mesa: Don't set dispatch pointer for glGetProgramivARB in ES2
This function is not the same as glGetProgramiv.

NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 7f7268d385)
2012-09-28 10:27:36 -07:00
Ian Romanick
dd0dd9aa52 mesa: Don't set dispatch pointer for glResizeBuffersMESA in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit a83b01371e)
2012-09-28 10:22:24 -07:00
Ian Romanick
7dc8dc0f7c mesa: Don't set dispatch pointers for glPointParameter[if][v] in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 1c0a44aaf5)
2012-09-28 10:19:55 -07:00
Ian Romanick
961567d0fe mesa: Don't set dispatch pointers for glClearDepth or glDepthRange in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 2a3a68e4c7)
2012-09-28 10:19:19 -07:00
Ian Romanick
de4e222794 mesa: Don't set dispatch pointer for glGetBufferSubData in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 11927bfc4a)
2012-09-28 10:17:20 -07:00
Ian Romanick
f57bc97c7a mesa: Don't set dispatch pointer for glGetDoublev in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 850412b8ab)
2012-09-28 10:16:38 -07:00
Ian Romanick
bb16b471d2 mesa: Don't set dispatch pointer for glPointSize in ES2
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit aa129b0833)
2012-09-28 10:14:53 -07:00
Ian Romanick
d87c319390 gles2: Alias glReadBufferNV with desktop glReadBuffer
NOTE: This is a candidate for the 9.0 branch

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: Kristian Høgsberg <krh@bitplanet.net>
(cherry picked from commit 23ff634c9c)
2012-09-28 10:11:56 -07:00
Ian Romanick
cf81335712 mesa: Allow glGetTexParameter of GL_TEXTURE_SRGB_DECODE_EXT
This was already (correctly) supported for glGetSamplerParameter paths.

NOTE: This is a candidate for stable branches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit ae3023e967)
2012-09-28 09:56:09 -07:00
Chris Forbes
8d06574d2b mesa: fix dropped && in glGetStringi()
This fixes glGetStringi(GL_EXTENSIONS,.. for core contexts. Previously,
all extension names returned would be NULL.

NOTE: This is a candidate for release branches.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit d30a7d2eb4)
2012-09-28 09:56:04 -07:00
Brian Paul
4eecc8d007 upgrade glext.h to version 85
NOTE: This is a candidate for the stable branches.
(cherry picked from commit 68060cfb2b)
2012-09-28 09:51:20 -07:00
Matt Turner
b1ce5749b9 targets/xorg-i915: Rename driver to i915_drv.so.
modesetting_drv.so is undescriptive and collides with
xf86-video-modesetting.

Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2012-09-25 12:05:20 -07:00
Kenneth Graunke
82a08e2f46 mesa: Ignore SRGB when determining compatible resolve formats.
MSAA resolves and other blit-like operations ignore SRGB state anyway,
so we should be able to safely allow resolves between compatible
SRGB/linear formats like SRGBA8 and RGBA8888.

This matches the behavior of the nVidia and AMD binary drivers.

Fixes completely black rendering when using multisampling in L4D2.

NOTE: This is a candidate for the 9.0 branch.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c96828ecb4)
2012-09-25 07:21:40 -07:00
Kenneth Graunke
3dd84a58bb mesa: Don't override S3TC internalFormat if data is pre-compressed.
Commit 42723d88d intended to override an S3TC internalFormat to a
generic compressed format when the application requested online
compression of uncompressed data.  Unfortunately, it also broke
pre-compressed textures when libtxc_dxtn isn't installed but the
extensions are forced on.

Both glCompressedTexImage2D() and glTexImage2D() call teximage(), which
calls _mesa_choose_texture_format(), hitting this override code.  If we
have actual S3TC source data, we can't treat it as any other format, and
need to avoid the override.

Since glCompressedTexImage2D() passes in a format of GL_NONE (which is
illegal for glTexImage), we can use that to detect the pre-compressed
case and avoid the overrides.

Fixes a regression since 42723d88d3.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-and-tested-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit 328961d955)
2012-09-25 07:17:33 -07:00
Kenneth Graunke
0231c54ebb meta: Don't _mesa_set_enable() invalid targets in ES 1.
GL_TEXTURE_1D, GL_TEXTURE_3D, GL_TEXTURE_RECTANGLE, and GL_TEXTURE_GEN_*
don't exist in ES 1 contexts, so any meta ops that used _mesa_meta_begin
with MESA_META_TEXTURE would trigger GL errors.  One such operation is
_mesa_meta_Clear().

Fixes the ES1 conformance test miplin.c, which was regressed by commit
08be1d288f.

NOTE: This is a candidate for the 9.0 branch.

v2: Also blacklist GL_TEXTURE_3D, per Brian's comments.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54297
Cc: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-09-25 07:17:09 -07:00
Jonas Maebe
2fe673fec3 darwin: do not create double-buffered offscreen pixel formats
http://xquartz.macosforge.org/trac/ticket/536

Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
(cherry picked from commit 5fdf1f784b)
2012-09-24 16:06:37 -07:00
Vadim Girlin
f6a66a33f7 winsys/radeon: fix relocs caching
Don't cache pointers to elements of reallocatable array.
In some circumstances it caused false cache hits resulting in incorrect
command stream and gpu lockup.

Note: This is a candidate for the stable branches.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit 9aa8bac98b)
2012-09-24 03:05:39 +02:00
Marek Olšák
38d1191f41 draw: fix non-indexed draw calls if there's an index buffer
pipe_draw_info::indexed determines if it should be indexed and not
the presence of an index buffer.

This fixes crashes in r300g.

NOTE: This is a candidate for the stable branches.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 2988fa940e)
2012-09-22 14:22:15 +02:00
Marek Olšák
a940c74bc3 r600g: set QUANT_MODE on Cayman too
This fixes piglit/fbo-blit-stretched.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit bfe489c76b)
2012-09-22 01:19:51 +02:00
Marek Olšák
c3454d95af r600g: do not require MSAA renderbuffer support if not asked for
to allow stencil-only sampler-only formats (like X24S8)

NOTE: This is a candidate for the stable branches.
(cherry picked from commit df5e2c058f)
2012-09-22 01:19:33 +02:00
Marek Olšák
27e056ff15 gallium/u_blitter: fix stencil-only blits
NOTE: This is a candidate for the stable branches.
(cherry picked from commit 61706915a3)
2012-09-22 01:19:23 +02:00