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i965: Don't spill "smeared" registers.

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Fixes an assertion failure when compiling certain shaders that need both
pull constants and register spilling:

brw_eu_emit.c:204: validate_reg: Assertion `execsize >= width' failed.

NOTE: This is a candidate for the 8.0 release branch.

Signed-off-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit ab5ce2789f)
This commit is contained in:
Paul Berry 2012-09-19 13:28:00 -07:00
parent 36bc0fe4f2
commit 849a3d243d
1 changed files with 15 additions and 0 deletions
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15
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
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@ -317,11 +317,26 @@ fs_visitor::choose_spill_reg(struct ra_graph *g)
for (unsigned int i = 0; i < 3; i++) {
if (inst->src[i].file == GRF) {
spill_costs[inst->src[i].reg] += loop_scale;
/* Register spilling logic assumes full-width registers; smeared
* registers have a width of 1 so if we try to spill them we'll
* generate invalid assembly. This shouldn't be a problem because
* smeared registers are only used as short-term temporaries when
* loading pull constants, so spilling them is unlikely to reduce
* register pressure anyhow.
*/
if (inst->src[i].smear >= 0) {
no_spill[inst->src[i].reg] = true;
}
}
}
if (inst->dst.file == GRF) {
spill_costs[inst->dst.reg] += inst->regs_written() * loop_scale;
if (inst->dst.smear >= 0) {
no_spill[inst->dst.reg] = true;
}
}
switch (inst->opcode) {