Commit graph

84427 commits

Author SHA1 Message Date
Timothy Arceri
bdaff25c20 mesa: small _mesa_UseProgram() tidy up
Makes the code easier to follow.

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-11 10:56:09 +10:00
Timothy Arceri
244cef1694 mesa: add KHR_no_error support for glBindProgramPipeline()
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-11 10:56:08 +10:00
Timothy Arceri
0bca4784c2 mesa: add KHR_no_error support for glActiveShaderProgram()
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-11 10:56:08 +10:00
Timothy Arceri
00c5119a5e mesa: add KHR_no_error support for glUseProgramStages()
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-11 10:56:08 +10:00
Timothy Arceri
ea4c606441 mesa: create use_program_stages() helper
This will be used to create a KHR_no_error version of
glUseProgramStages().

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-05-11 10:56:08 +10:00
Dave Airlie
fe6c407a33 radv: handle fragment shader srgb resolve pass better
Bas pointed out the fs key doesn't take srgb into account,
since there is just one srgb variant, just create a separate
pipeline for it. This also uses dest format to be more consistent
on when srgb matters.

Fixes: 69136f4e63 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-05-11 10:36:06 +10:00
Kenneth Graunke
32f0dc3a29 i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.
This is something the original decoder did, but I didn't bother with
until now.  I recently had to debug an Ironlake issue, and wanted to
inspect VS_STATE.  So, now it's back.

The other packets in the switch statement are all Gen6/7+, where we
use offsets from dynamic state base address, so we don't need the
gtt_offset subtraction introduced here.  We might want to make a
helper for this hack at some point - perhaps when we introduce the
next occurance.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-05-10 11:58:20 -07:00
Kenneth Graunke
0f34b674ed i965: Switch BRW_NEW_CURBE_OFFSETS to BRW_NEW_PUSH_CONSTANT_ALLOCATION.
The BRW_NEW_CURBE_OFFSETS dirty bit is signalled when changing the
partitioning of the Constant Buffer URB section between the various
shader stages, on Gen4-5.

BRW_NEW_PUSH_CONSTANT_ALLOCATION is basically the same thing on Gen7+.

So, save a bit, and use the new name.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-10 11:41:58 -07:00
Kenneth Graunke
608a65ebca i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from Gen6 code.
Gen6 doesn't have a configurable push constant region.  This is only
used on Gen7+.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-10 11:41:50 -07:00
Kenneth Graunke
3d70e00c62 i965: Only #if...#endif a single function or related section at a time.
Previously we guarded large swathes of code with #if GEN ... #endif
blocks.  This made it difficult to see which generations include what.

This patch splits up the #if..#endif sections so they surround a small
section of code - usually a single function/atom, or sometimes a group
of related functions.  It should make the code easier to work on.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-05-10 11:41:46 -07:00
Kenneth Graunke
774db15aaf i965: Turn brw_get_line_width_float() into brw_get_line_width().
Drop the old brw_get_line_width() helper which return the unsigned
fixed-point encoding of the line width - it's been dead since the
conversion to GENXML (which does the encoding for us).

Then rename brw_get_line_width_float() to the shorter name.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-05-10 11:41:42 -07:00
Kenneth Graunke
620f12a53f i965: Drop INTEL_DEBUG=stats.
For whatever reason, we had an INTEL_DEBUG=stats option that enabled
various statistics counters on Gen4-5 systems.  It's been around
forever, though I can't think of a single time that it's been useful.

On Gen6+, we enable statistics all the time because they're necessary
to support various query object targets.  Turning them off would break
those queries.

Gen4-5 don't support those queries, so the statistics counters generally
aren't useful; we disabled them by default.  This patch disables them
altogether.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-05-10 11:37:19 -07:00
Kenneth Graunke
31abfd2d35 i965: Disable ARB_pipeline_statistics_query on Gen4-5.
We apparently enabled this on all platforms in Mesa 10.6.  However, it
was only ever implemented for Gen6+.  The Gen4-5 query code goes up in
flames with an "Unrecognized query target" unreachable() error if you
even attempt to use any of the new functionality.

This wasn't caught because the Piglit tests require OpenGL 3.0, which
Gen4-5 cannot support.  The extension spec does say 3.0 is required,
though I'm not sure why - it seems like 2.1 would work fine.

We could implement it anyway, but it's a little bit of a pain due to the
lack of hardware contexts (so we have to snapshot around batches).

Given that it's been 100% broken for two years and I haven't seen a bug
report about it, I'm not terribly inclined to care.  So, let it go.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-05-10 11:37:19 -07:00
Marek Olšák
49c326420e st/mesa: move the logic of all_varyings_in_vbos into st_update_array
The function was pretty slow. This brings a substantial decrease in draw
call overhead when min/max index bounds are not needed:

Before:  DrawElements (1 VBO) w/ no state change:          5.75 million
After:   DrawElements (1 VBO) w/ no state change:          7.03 million

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
94506e5642 st/mesa: unify common code in st_draw_vbo functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
f60f14bdb3 st/mesa: make st_draw_vbo static
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
740ef228f7 radeonsi: remove upload code for zero-stride vertex attribs
st/mesa takes care of it now.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
17f776c27b st/mesa: upload zero-stride vertex attributes here
This is the best place to do it. Now drivers without u_vbuf don't have to
do it.

v2: use correct upload size and optimal alignment

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
70dcb7377d gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
The next patch will use it. This is really for svga and GL2-level drivers.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
9db1f9bcd1 st/mesa: simplify the signature of get_client_array
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
e8b2274592 st/mesa: remove vpv->num_inputs dereferences in st_update_array
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
71fde49059 st/mesa: fold error handling into setup_(non_)interleaved_attribs
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
f4d272f6f6 st/mesa: fold cso calls into setup_(non_)interleaved_attribs
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
c334c7dd75 st/mesa: don't call util_draw_init_info in st_draw_vbo 2017-05-10 19:00:16 +02:00
Marek Olšák
330d0607ed gallium: remove pipe_index_buffer and set_index_buffer
pipe_draw_info::indexed is replaced with index_size. index_size == 0 means
non-indexed.

Instead of pipe_index_buffer::offset, pipe_draw_info::start is used.
For indexed indirect draws, pipe_draw_info::start is added to the indirect
start. This is the only case when "start" affects indirect draws.

pipe_draw_info::index is a union. Use either index::resource or
index::user depending on the value of pipe_draw_info::has_user_indices.

v2: fixes for nine, svga
2017-05-10 19:00:16 +02:00
Marek Olšák
22f6624ed3 gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes
For faster initialization of non-indirect draws.
2017-05-10 19:00:16 +02:00
Marek Olšák
c24c3b94ed gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes 2017-05-10 19:00:16 +02:00
Samuel Pitoiset
de97e38290 st/glsl_to_tgsi: make sure resource file for samplers is PROGRAM_SAMPLER
Similar to how image resources are handled. That way we are sure
that inst->resource.file is PROGRAM_SAMPLER for "bound" samplers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 14:02:21 +02:00
Samuel Pitoiset
169888b55e radeonsi: silent a compiler warning
This fixes:

si_shader.c: In function ‘si_shader_dump_stats’:
si_shader.c:6704:31: warning: passing argument 1 of ‘si_get_max_workgroup_size’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
     si_get_max_workgroup_size(shader);
                               ^~~~~~
si_shader.c:5832:17: note: expected ‘struct si_shader *’ but argument is of type ‘const struct si_shader *’
 static unsigned si_get_max_workgroup_size(struct si_shader *shader)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 14:02:17 +02:00
Samuel Pitoiset
820966f9bc mesa: use u_bit_scan() in update_program_texture_state()
The check in update_single_program_texture() can also be
removed.

v2: - remove unused 's' variable

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-10 12:14:17 +02:00
Samuel Pitoiset
6a1f324e4a mesa: remove never used gl_shader_compiler_options::EmitNoFunctions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
2017-05-10 12:10:50 +02:00
Nicolai Hähnle
362f8f6798 radeonsi: dump compute descriptor lists
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:53 +02:00
Nicolai Hähnle
30267256df radeonsi: dump both enabled and required descriptor slots
This allows a meaningful dump with info == NULL (for compute shaders).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:50 +02:00
Nicolai Hähnle
571597bf47 radeonsi: dump compute shader as part of debug dump
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:48 +02:00
Nicolai Hähnle
fbb2886634 radeonsi: move struct si_compute into a header
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:46 +02:00
Nicolai Hähnle
1a3bedd4b7 radeonsi: split descriptor list dumping
Prepare for dumping CS descriptor list.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:44 +02:00
Nicolai Hähnle
83f56e531d radeonsi: split shader dumping
Prepare for dumping compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:41 +02:00
Nicolai Hähnle
0282214c72 radeonsi: more const qualifiers in shader dump functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:39 +02:00
Nicolai Hähnle
db3559da12 ddebug: implement dd_dump_launch_grid
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:37 +02:00
Nicolai Hähnle
bf4ecfec4b ddebug: extract dd_dump_shader
Will be re-used for compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:34 +02:00
Nicolai Hähnle
fa1519d0c9 gallium/util: dump tokens in util_dump_shader_state only if type is TGSI
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:32 +02:00
Nicolai Hähnle
bcc37711cd gallium/util: add util_dump_grid_info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-10 08:58:23 +02:00
Grazvydas Ignotas
45ccb661d8 radv: always free nir shaders from modules on stack
valgrind reports them as leaked, and I could not find anything making a
copy of the nir pointer. Also, radv_device_init_meta_blit_color() is
already freeing them unconditionally like this.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-05-10 01:13:44 +03:00
Grazvydas Ignotas
0ef302638f anv: don't leak DRM devices
After successful drmGetDevices2() call, drmFreeDevices() needs to be
called.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> # radv version
2017-05-10 01:13:44 +03:00
Grazvydas Ignotas
e0aee8b667 anv: fix possible stack corruption
drmGetDevices2 takes count and not size. Probably hasn't caused problems
yet in practice and was missed as setups with more than 8 DRM devices
are not very common.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-05-10 01:13:44 +03:00
Jason Ekstrand
037ce253b1 i965/vec4: Delete the system value infastructure
The only thing still using it is INVOCATION_ID for geometry shaders.
That's easily enough inlined into the nir_intrinsic_load_invocation_id
handling code.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:08:07 -07:00
Jason Ekstrand
2e9916ea04 i965/vec4: Use NIR to do GS input remapping
We're already doing this in the FS back-end.  This just does the same
thing in the vec4 back-end.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:08:07 -07:00
Jason Ekstrand
e31042ab40 i965/fs: Move remapping of gl_PointSize to the NIR level
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:08:06 -07:00
Jason Ekstrand
5b00c3cc05 i965/nir: Inline remap_inputs_with_vue_map
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:08:06 -07:00
Jason Ekstrand
0d5f89cdc3 i965/vec4: Use NIR remapping for VS attributes
The NIR pass already handles remapping system values to attributes for
us so we delete the system value code as part of the conversion.

We also change nir_lower_vs_inputs to take an explicit inputs_read
bitmask and pass in the inputs_read from prog_data instead from pulling
it out of NIR.  This is because the version in prog_data may get
EDGEFLAG added to it on some old platforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-09 15:08:06 -07:00