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mesa/src/intel/compiler
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Ian Romanick 22095c60bc nir/algebraic: Add nir_lower_int64_options::nir_lower_iadd3_64 
This allows us to not generate 64-bit iadd3 on Intel but continue
generating it for NVIDIA.

No shader-db or fossil-db changes.

v2: Add nir_lower_iadd3_64 flag so we can continue to generate 64-bit
iadd3 on NVIDIA platforms.

v3: s/bit_size == 64/s == 64/. This cut-and-paste bug prevented any of
the optimizations from ever occuring.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
2024-05-31 09:13:23 -07:00
..
elk nir: remove unpack_half_flush_to_zero 2024-05-31 09:46:35 +00:00
tests intel/brw: Remove assembler tests for Gfx8- 2024-02-24 02:10:56 +00:00
brw_asm.h intel: Rename i965_{asm,disasm} tools to brw_{asm,disasm} 2024-02-15 09:26:46 +00:00
brw_asm_tool.c intel/brw: Remove automatic_exec_sizes 2024-02-28 05:45:39 +00:00
brw_cfg.cpp intel/brw: Use fs_inst in cfg_t 2024-02-29 20:47:48 -08:00
brw_cfg.h intel/brw: Use fs_inst in cfg_t 2024-02-29 20:47:48 -08:00
brw_compile_gs.cpp intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_compile_tcs.cpp intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_compile_vs.cpp intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_compiler.c nir/algebraic: Add nir_lower_int64_options::nir_lower_iadd3_64 2024-05-31 09:13:23 -07:00
brw_compiler.h intel: Move slm functions from brw_compiler.h to intel_compute_slm.c/h 2024-05-30 16:46:16 +00:00
brw_dead_control_flow.cpp intel/brw: Do not create empty basic blocks when removing instructions 2024-04-30 17:16:39 -07:00
brw_debug_recompile.c intel/brw: Delete brw_wm_prog_key::line_aa 2024-02-29 18:00:14 +00:00
brw_device_sha1_gen_c.py intel/compiler: drop unused ray-tracing fields from cache hash 2024-03-22 00:01:28 +00:00
brw_disasm.c intel/disasm: Fix cache load/store disassembly for URB messages 2024-05-09 19:45:18 +00:00
brw_disasm.h intel/compiler: Merge intel_disasm.[ch] into corresponding brw files 2024-02-15 09:26:46 +00:00
brw_disasm_info.cpp intel/brw: Use fs_inst in disasm_annotate() 2024-02-29 21:14:13 -08:00
brw_disasm_info.h intel/brw: Use fs_inst in disasm_annotate() 2024-02-29 21:14:13 -08:00
brw_disasm_tool.c intel/brw: Remove Gfx8- code from disassembler 2024-02-28 05:45:38 +00:00
brw_eu.c intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
brw_eu.h intel/nir: add reloc delta to load_reloc_const_intel intrinsic 2024-05-15 13:13:38 +00:00
brw_eu_compact.c intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
brw_eu_defines.h intel/brw: ensure find_live_channel don't access arch register without sync 2024-05-24 07:26:17 +00:00
brw_eu_emit.c intel/brw/xe2+: Fix indirect extended descriptor setup for scratch space. 2024-05-15 17:16:51 +00:00
brw_eu_validate.c intel/brw: Update CSEL source type validation 2024-05-14 01:28:20 +00:00
brw_fs.cpp intel/brw: Simplify enabling brw_fs_test_dispatch_packing 2024-05-28 18:45:49 +00:00
brw_fs.h intel/brw: fixup wm_prog_data_barycentric_modes() 2024-04-26 05:13:02 +00:00
brw_fs_bank_conflicts.cpp intel/brw: Remove MRF type 2024-02-28 05:45:39 +00:00
brw_fs_builder.h intel/brw/xe2+: Fix 64-bit subgroup scan intrinsics not to rely on SEL instructions. 2024-05-15 17:16:51 +00:00
brw_fs_cmod_propagation.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_combine_constants.cpp intel/brw: Combine constants and constant propagation for CSEL 2024-05-14 01:28:20 +00:00
brw_fs_copy_propagation.cpp intel/brw: Combine constants and constant propagation for CSEL 2024-05-14 01:28:20 +00:00
brw_fs_cse.cpp intel/brw: Support CSE on more ops 2024-04-30 17:16:40 -07:00
brw_fs_dead_code_eliminate.cpp intel/brw: Do not create empty basic blocks when removing instructions 2024-04-30 17:16:39 -07:00
brw_fs_generator.cpp intel/brw: ensure find_live_channel don't access arch register without sync 2024-05-24 07:26:17 +00:00
brw_fs_live_variables.cpp intel/brw: Use fs_visitor instead of backend_shader in various passes 2024-02-29 19:28:05 +00:00
brw_fs_live_variables.h intel/brw: Use fs_visitor instead of backend_shader in various passes 2024-02-29 19:28:05 +00:00
brw_fs_lower.cpp intel/brw: ensure find_live_channel don't access arch register without sync 2024-05-24 07:26:17 +00:00
brw_fs_lower_dpas.cpp intel/brw: Use newer brw_type_is_* shorter names 2024-04-25 11:41:48 +00:00
brw_fs_lower_integer_multiplication.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_lower_pack.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
brw_fs_lower_regioning.cpp intel/brw/xe2+: Lower 64-bit SHUFFLE and CLUSTER_BROADCAST. 2024-05-15 17:16:51 +00:00
brw_fs_lower_simd_width.cpp intel/brw: update Xe2 max SIMD message sizes 2024-05-15 12:02:02 +00:00
brw_fs_nir.cpp nir/algebraic: Add nir_lower_int64_options::nir_lower_iadd3_64 2024-05-31 09:13:23 -07:00
brw_fs_opt.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_opt_algebraic.cpp intel/brw: Algebraic optimizations for CSEL 2024-05-14 01:28:20 +00:00
brw_fs_opt_virtual_grfs.cpp intel/brw: Move virtual GRF opts into their own file 2024-02-26 20:54:25 +00:00
brw_fs_reg_allocate.cpp intel/brw/xe2+: Round up spill/unspill data size to nearest reg_size multiple. 2024-05-15 17:16:52 +00:00
brw_fs_register_coalesce.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_saturate_propagation.cpp intel/brw: Simplify usage of reg immediate helpers 2024-03-01 17:52:09 +00:00
brw_fs_scoreboard.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_sel_peephole.cpp intel/brw/xe2+: Don't use SEL peephole on 64-bit moves. 2024-05-15 17:16:51 +00:00
brw_fs_thread_payload.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
brw_fs_validate.cpp intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_fs_visitor.cpp intel/brw: Don't emit Z coordinate interpolation if CPS isn't in use. 2024-05-15 17:16:51 +00:00
brw_fs_workaround.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
brw_gram.y intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_inst.h intel/brw: Rename brw_reg_type_to_hw_type to brw_type_encode 2024-04-25 11:41:48 +00:00
brw_ir.h intel/brw: Fold backend_reg into fs_reg 2024-03-01 17:52:09 +00:00
brw_ir_allocator.h intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium 2023-08-03 22:00:15 +00:00
brw_ir_analysis.h
brw_ir_fs.h intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_ir_performance.cpp intel/brw: ensure find_live_channel don't access arch register without sync 2024-05-24 07:26:17 +00:00
brw_ir_performance.h intel/brw: Fold backend_shader into fs_visitor 2024-02-29 19:28:05 +00:00
brw_isa_info.h intel/compiler: Remove use of thread_local for opcode tables 2022-06-30 23:46:35 +00:00
brw_kernel.c intel/clc: enable printfs support 2024-05-15 13:13:38 +00:00
brw_kernel.h intel-clc: Use correct set of nir_options when building for Gfx8 2024-02-24 00:24:32 +00:00
brw_lex.l intel/brw: Drop NF type support 2024-04-25 11:41:48 +00:00
brw_lower_logical_sends.cpp intel/brw: Blockify convergent load_shared on Gfx11-12 as well 2024-05-30 22:01:10 +00:00
brw_mesh.cpp intel/brw: Remove runtime_check_aads_emit 2024-02-28 05:45:39 +00:00
brw_nir.c intel/nir: add printf lowering 2024-05-15 13:13:38 +00:00
brw_nir.h intel/nir: add printf lowering 2024-05-15 13:13:38 +00:00
brw_nir_analyze_ubo_ranges.c intel/brw/xe2: Update brw_nir_analyze_ubo_ranges to account for 512b physical registers 2024-04-01 00:00:03 +00:00
brw_nir_lower_alpha_to_coverage.c brw/lower_a2c: fix for scalarized fs outputs 2024-04-18 23:27:22 +00:00
brw_nir_lower_cooperative_matrix.c nir: intel/brw: Remove cmat_signed_mask from dpas_intel intrinsic 2024-04-19 09:53:29 -07:00
brw_nir_lower_cs_intrinsics.c intel/compiler: Use "intel" prefix for walk_order enum 2024-02-21 00:38:35 +00:00
brw_nir_lower_fsign.py intel/brw: Use range analysis to optimize fsign 2024-05-14 01:28:21 +00:00
brw_nir_lower_intersection_shader.c intel/nir/rt: fix reportIntersection() hitT handling 2023-11-17 07:06:30 +00:00
brw_nir_lower_ray_queries.c intel/nir: only consider ray query variables in lowering 2024-02-24 12:56:30 +00:00
brw_nir_lower_rt_intrinsics.c treewide: Use nir_before/after_impl for more elaborate cases 2023-08-30 19:30:58 +00:00
brw_nir_lower_shader_calls.c intel/rt: Don't directly generate umul_32x16 2024-02-02 00:02:05 +00:00
brw_nir_lower_storage_image.c intel/brw: Remove Gfx8- code from lower storage image pass 2024-02-28 05:45:38 +00:00
brw_nir_rt.c nir: remove workgroup_id_zero_base 2024-04-24 20:18:49 +00:00
brw_nir_rt.h anv: support VK_PIPELINE_CREATE_RAY_TRACING_SKIP_* 2022-10-20 00:03:55 +00:00
brw_nir_rt_builder.h nir: Drop "SSA" from NIR language 2023-08-12 16:44:41 -04:00
brw_nir_trig_workarounds.py driconf: Add a limit_trig_input_range option 2022-05-13 06:47:53 +00:00
brw_packed_float.c
brw_predicated_break.cpp intel/brw: Use fs_inst explicitly in various passes 2024-02-29 20:47:48 -08:00
brw_prim.h intel/compiler: Split 3DPRIM_* defines out to a separate header. 2022-06-30 23:46:35 +00:00
brw_private.h intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_reg.h intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_* 2024-04-25 11:41:48 +00:00
brw_reg_type.c intel/brw: Rename brw_reg_type_to_hw_type to brw_type_encode 2024-04-25 11:41:48 +00:00
brw_reg_type.h intel/brw: Make a helper for finding the largest of two types 2024-04-29 07:51:45 +00:00
brw_rt.h intel: Use ALIGN_POT instead of ALIGN inside macro define 2024-01-03 12:46:10 +00:00
brw_schedule_instructions.cpp intel/fs: fixup instruction scheduling last grf write tracking 2024-04-05 19:46:40 +00:00
brw_shader.cpp intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_simd_selection.cpp intel/brw: fix subgroup size of geometry stages for lnl+ 2024-05-14 23:13:37 +00:00
brw_vue_map.c intel/brw: Remove Gfx8- code from VUE map 2024-02-28 05:45:38 +00:00
intel_clc.c intel/dev: Silence INTEL_FORCE_PROBE warning for intel_clc 2024-05-30 22:28:50 +00:00
intel_gfx_ver_enum.h intel/compiler: Rename brw_gfx_ver_enum.h to intel_gfx_ver_enum.h 2024-02-16 22:35:05 +00:00
intel_nir.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir.h intel/nir: add printf lowering 2024-05-15 13:13:38 +00:00
intel_nir_blockify_uniform_loads.c intel/brw: Blockify convergent load_shared on Gfx11-12 as well 2024-05-30 22:01:10 +00:00
intel_nir_clamp_image_1d_2d_array_sizes.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_clamp_per_vertex_loads.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_lower_conversions.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_lower_non_uniform_barycentric_at_sample.c intel/compiler: Ensure load_barycentric_at_sample and load_interpolated_input remain together 2024-04-04 23:42:27 +00:00
intel_nir_lower_non_uniform_resource_intel.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_lower_printf.c intel/nir: add printf lowering 2024-05-15 13:13:38 +00:00
intel_nir_lower_shading_rate_output.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_lower_sparse.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_lower_texture.c intel/compiler: Pack texture LOD and offset to a single 32-bit value 2024-02-27 00:22:46 +00:00
intel_nir_opt_peephole_ffma.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_opt_peephole_imul32x16.c intel/compiler: Rename the passes and files related to intel_nir.h 2024-02-16 22:35:05 +00:00
intel_nir_tcs_workarounds.c intel/nir: Set src_type on TCS quads workaround store_output 2024-05-02 13:58:21 -07:00
intel_shader_enums.h intel/compiler: Use "intel" prefix for walk_order enum 2024-02-21 00:38:35 +00:00
meson.build intel/nir: add printf lowering 2024-05-15 13:13:38 +00:00
test_eu_compact.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
test_eu_validate.cpp intel/brw: Rename brw_reg_type_to_hw_type to brw_type_encode 2024-04-25 11:41:48 +00:00
test_fs_cmod_propagation.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
test_fs_combine_constants.cpp intel/brw: Move validate out of fs_visitor 2024-04-22 13:38:41 -07:00
test_fs_copy_propagation.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
test_fs_saturate_propagation.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
test_fs_scoreboard.cpp intel/brw: Stop using long BRW_REGISTER_TYPE enum names 2024-04-25 11:41:48 +00:00
test_predicated_break.cpp intel/brw: Use fs_visitor instead of backend_shader in various passes 2024-02-29 19:28:05 +00:00
test_simd_selection.cpp intel: Remove brw_ prefix from process debug function 2024-02-16 22:35:05 +00:00
test_vf_float_conversions.cpp