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intel/brw: Remove Gfx8- code from VUE map

Browse source 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
This commit is contained in:
Caio Oliveira 2024-02-17 22:17:47 -08:00 • committed by Marge Bot
parent 3b3931daec
commit e0d767f5fe
3 changed files with 40 additions and 72 deletions
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11
src/intel/compiler/brw_compiler.h
View file

@ -1214,19 +1214,10 @@ struct brw_bs_prog_data {
*/
typedef enum
{
BRW_VARYING_SLOT_NDC = VARYING_SLOT_MAX,
BRW_VARYING_SLOT_PAD,
BRW_VARYING_SLOT_PAD = VARYING_SLOT_MAX,
BRW_VARYING_SLOT_COUNT
} brw_varying_slot;
/**
* We always program SF to start reading at an offset of 1 (2 varying slots)
* from the start of the vertex URB entry. This causes it to skip:
* - VARYING_SLOT_PSIZ and BRW_VARYING_SLOT_NDC on gfx4-5
* - VARYING_SLOT_PSIZ and VARYING_SLOT_POS on gfx6+
*/
#define BRW_SF_URB_ENTRY_READ_OFFSET 1
/**
* Bitmask indicating which fragment shader inputs represent varyings (and
* hence have to be delivered to the fragment shader by the SF/SBE stage).

1
src/intel/compiler/brw_fs_visitor.cpp
View file

@ -941,7 +941,6 @@ fs_visitor::emit_urb_writes(const fs_reg &gs_vertex_count)
sources[length++] = zero;
break;
}
case BRW_VARYING_SLOT_NDC:
case VARYING_SLOT_EDGE:
unreachable("unexpected scalar vs output");
break;

100
src/intel/compiler/brw_vue_map.c
View file

@ -63,13 +63,6 @@ brw_compute_vue_map(const struct intel_device_info *devinfo,
bool separate,
uint32_t pos_slots)
{
/* Keep using the packed/contiguous layout on old hardware - we only need
* the SSO layout when using geometry/tessellation shaders or 32 FS input
* varyings, which only exist on Gen >= 6. It's also a bit more efficient.
*/
if (devinfo->ver < 6)
separate = false;
if (separate) {
/* In SSO mode, we don't know whether the adjacent stage will
* read/write gl_ClipDistance, which has a fixed slot location.
@ -112,64 +105,50 @@ brw_compute_vue_map(const struct intel_device_info *devinfo,
*
* See the Sandybridge PRM, Volume 2 Part 1, section 1.5.1 (page 30),
* "Vertex URB Entry (VUE) Formats" which describes the VUE header layout.
*
* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
* dword 0-3 of the header is shading rate, indices, point width, clip flags.
* dword 4-7 is the 4D space position
* dword 8-15 of the vertex header is the user clip distance if
* enabled.
* dword 8-11 or 16-19 is the first vertex element data we fill.
*/
if (devinfo->ver < 6) {
/* There are 8 dwords in VUE header pre-Ironlake:
* dword 0-3 is indices, point width, clip flags.
* dword 4-7 is ndc position
* dword 8-11 is the first vertex data.
*
* On Ironlake the VUE header is nominally 20 dwords, but the hardware
* will accept the same header layout as Gfx4 [and should be a bit faster]
*/
assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++);
assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
} else {
/* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
* dword 0-3 of the header is shading rate, indices, point width, clip flags.
* dword 4-7 is the 4D space position
* dword 8-15 of the vertex header is the user clip distance if
* enabled.
* dword 8-11 or 16-19 is the first vertex element data we fill.
*/
assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
/* When using Primitive Replication, multiple slots are used for storing
* positions for each view.
*/
assert(pos_slots >= 1);
if (pos_slots > 1) {
for (int i = 1; i < pos_slots; i++) {
vue_map->slot_to_varying[slot++] = VARYING_SLOT_POS;
}
/* When using Primitive Replication, multiple slots are used for storing
* positions for each view.
*/
assert(pos_slots >= 1);
if (pos_slots > 1) {
for (int i = 1; i < pos_slots; i++) {
vue_map->slot_to_varying[slot++] = VARYING_SLOT_POS;
}
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1, slot++);
/* Vertex URB Formats table says: "Vertex Header shall be padded at the
* end so that the header ends on a 32-byte boundary".
*/
slot += slot % 2;
/* front and back colors need to be consecutive so that we can use
* ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
* two-sided color.
*/
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
assign_vue_slot(vue_map, VARYING_SLOT_BFC1, slot++);
}
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1, slot++);
/* Vertex URB Formats table says: "Vertex Header shall be padded at the
* end so that the header ends on a 32-byte boundary".
*/
slot += slot % 2;
/* front and back colors need to be consecutive so that we can use
* ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
* two-sided color.
*/
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++);
if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
assign_vue_slot(vue_map, VARYING_SLOT_BFC1, slot++);
/* The hardware doesn't care about the rest of the vertex outputs, so we
* can assign them however we like. For normal programs, we simply assign
* them contiguously.
@ -289,7 +268,6 @@ varying_name(brw_varying_slot slot, gl_shader_stage stage)
return gl_varying_slot_name_for_stage((gl_varying_slot)slot, stage);
static const char *brw_names[] = {
[BRW_VARYING_SLOT_NDC - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_NDC",
[BRW_VARYING_SLOT_PAD - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_PAD",
};