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intel/brw: Remove runtime_check_aads_emit

Browse source 
It was used for Gfx4 payload.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
This commit is contained in:
Caio Oliveira 2024-02-27 12:23:52 -08:00 • committed by Marge Bot
parent 35b07ab035
commit dae59e7078
10 changed files with 13 additions and 22 deletions
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2
src/intel/compiler/brw_compile_gs.cpp
View file

@ -251,7 +251,7 @@ brw_compile_gs(const struct brw_compiler *compiler,
v.payload().num_regs / reg_unit(compiler->devinfo);
fs_generator g(compiler, &params->base,
&prog_data->base.base, false, MESA_SHADER_GEOMETRY);
&prog_data->base.base, MESA_SHADER_GEOMETRY);
if (unlikely(debug_enabled)) {
const char *label =
nir->info.label ? nir->info.label : "unnamed";

2
src/intel/compiler/brw_compile_tcs.cpp
View file

@ -145,7 +145,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
prog_data->base.base.dispatch_grf_start_reg = v.payload().num_regs / reg_unit(devinfo);
fs_generator g(compiler, &params->base,
&prog_data->base.base, false, MESA_SHADER_TESS_CTRL);
&prog_data->base.base, MESA_SHADER_TESS_CTRL);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(params->base.mem_ctx,
"%s tessellation control shader %s",

2
src/intel/compiler/brw_compile_vs.cpp
View file

@ -112,7 +112,7 @@ brw_compile_vs(const struct brw_compiler *compiler,
v.payload().num_regs / reg_unit(compiler->devinfo);
fs_generator g(compiler, &params->base,
&prog_data->base.base, v.runtime_check_aads_emit,
&prog_data->base.base,
MESA_SHADER_VERTEX);
if (unlikely(debug_enabled)) {
const char *debug_name =

10
src/intel/compiler/brw_fs.cpp
View file

@ -2908,8 +2908,7 @@ fs_visitor::run_fs(bool allow_spilling, bool do_rep_send)
assert(stage == MESA_SHADER_FRAGMENT);
payload_ = new fs_thread_payload(*this, source_depth_to_render_target,
runtime_check_aads_emit);
payload_ = new fs_thread_payload(*this, source_depth_to_render_target);
if (do_rep_send) {
assert(dispatch_width == 16);
@ -3687,7 +3686,7 @@ brw_compile_fs(const struct brw_compiler *compiler,
simd8_cfg = NULL;
fs_generator g(compiler, &params->base, &prog_data->base,
v8 && v8->runtime_check_aads_emit, MESA_SHADER_FRAGMENT);
MESA_SHADER_FRAGMENT);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(params->base.mem_ctx,
@ -3932,13 +3931,12 @@ brw_compile_cs(const struct brw_compiler *compiler,
}
assert(selected_simd < 3);
fs_visitor *selected = v[selected_simd].get();
if (!nir->info.workgroup_size_variable)
prog_data->prog_mask = 1 << selected_simd;
fs_generator g(compiler, &params->base, &prog_data->base,
selected->runtime_check_aads_emit, MESA_SHADER_COMPUTE);
MESA_SHADER_COMPUTE);
if (unlikely(debug_enabled)) {
char *name = ralloc_asprintf(params->base.mem_ctx,
"%s compute shader %s",
@ -4116,7 +4114,7 @@ brw_compile_bs(const struct brw_compiler *compiler,
prog_data->num_resume_shaders = num_resume_shaders;
fs_generator g(compiler, &params->base, &prog_data->base,
false, shader->info.stage);
shader->info.stage);
if (unlikely(debug_enabled)) {
char *name = ralloc_asprintf(params->base.mem_ctx,
"%s %s shader %s",

6
src/intel/compiler/brw_fs.h
View file

@ -128,8 +128,7 @@ struct gs_thread_payload : public thread_payload {
struct fs_thread_payload : public thread_payload {
fs_thread_payload(const fs_visitor &v,
bool &source_depth_to_render_target,
bool &runtime_check_aads_emit);
bool &source_depth_to_render_target);
uint8_t subspan_coord_reg[2];
uint8_t source_depth_reg[2];
@ -371,7 +370,6 @@ public:
}
bool source_depth_to_render_target;
bool runtime_check_aads_emit;
fs_reg pixel_x;
fs_reg pixel_y;
@ -426,7 +424,6 @@ public:
fs_generator(const struct brw_compiler *compiler,
const struct brw_compile_params *params,
struct brw_stage_prog_data *prog_data,
bool runtime_check_aads_emit,
gl_shader_stage stage);
~fs_generator();
@ -488,7 +485,6 @@ private:
unsigned dispatch_width; /**< 8, 16 or 32 */
exec_list discard_halt_patches;
bool runtime_check_aads_emit;
bool debug_flag;
const char *shader_name;
gl_shader_stage stage;

3
src/intel/compiler/brw_fs_generator.cpp
View file

@ -129,13 +129,12 @@ brw_reg_from_fs_reg(const struct intel_device_info *devinfo, fs_inst *inst,
fs_generator::fs_generator(const struct brw_compiler *compiler,
const struct brw_compile_params *params,
struct brw_stage_prog_data *prog_data,
bool runtime_check_aads_emit,
gl_shader_stage stage)
: compiler(compiler), params(params),
devinfo(compiler->devinfo),
prog_data(prog_data), dispatch_width(0),
runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false),
debug_flag(false),
shader_name(NULL), stage(stage), mem_ctx(params->mem_ctx)
{
p = rzalloc(mem_ctx, struct brw_codegen);

3
src/intel/compiler/brw_fs_thread_payload.cpp
View file

@ -303,8 +303,7 @@ setup_fs_payload_gfx9(fs_thread_payload &payload,
}
fs_thread_payload::fs_thread_payload(const fs_visitor &v,
bool &source_depth_to_render_target,
bool &runtime_check_aads_emit)
bool &source_depth_to_render_target)
: subspan_coord_reg(),
source_depth_reg(),
source_w_reg(),

1
src/intel/compiler/brw_fs_visitor.cpp
View file

@ -1059,7 +1059,6 @@ fs_visitor::init()
this->payload_ = NULL;
this->source_depth_to_render_target = false;
this->runtime_check_aads_emit = false;
this->first_non_payload_grf = 0;
this->uniforms = 0;

4
src/intel/compiler/brw_mesh.cpp
View file

@ -359,7 +359,7 @@ brw_compile_task(const struct brw_compiler *compiler,
}
fs_generator g(compiler, &params->base, &prog_data->base.base,
false, MESA_SHADER_TASK);
MESA_SHADER_TASK);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(params->base.mem_ctx,
"%s task shader %s",
@ -1590,7 +1590,7 @@ brw_compile_mesh(const struct brw_compiler *compiler,
}
fs_generator g(compiler, &params->base, &prog_data->base.base,
false, MESA_SHADER_MESH);
MESA_SHADER_MESH);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(params->base.mem_ctx,
"%s mesh shader %s",

2
src/intel/compiler/brw_shader.cpp
View file

@ -1268,7 +1268,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
prog_data->base.dispatch_mode = INTEL_DISPATCH_MODE_SIMD8;
fs_generator g(compiler, &params->base,
&prog_data->base.base, false, MESA_SHADER_TESS_EVAL);
&prog_data->base.base, MESA_SHADER_TESS_EVAL);
if (unlikely(debug_enabled)) {
g.enable_debug(ralloc_asprintf(params->base.mem_ctx,
"%s tessellation evaluation shader %s",