intel/brw: Fold backend_shader into fs_visitor

The base class was used when we had vec4, but now we can fold it with
its only subclass.  Declare fs_visitor now as a struct to be able to
forward declare for C code without causing errors due to class/struct
being mixed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27861>

src/intel/compiler/brw_cfg.cpp

@@ -157,7 +157,7 @@ bblock_t::combine_with(bblock_t *that)
 void
 bblock_t::dump(FILE *file) const
 {
-   const fs_visitor *s = static_cast<const fs_visitor *>(this->cfg->s);
+   const fs_visitor *s = this->cfg->s;
 
    int ip = this->start_ip;
    foreach_inst_in_block(fs_inst, inst, this) {
@@ -617,8 +617,7 @@ sort_links(util_dynarray *scratch, exec_list *list)
 void
 cfg_t::dump(FILE *file)
 {
-   const fs_visitor *fs = static_cast<const fs_visitor *>(s);
-   const idom_tree *idom = (fs ? &fs->idom_analysis.require() : NULL);
+   const idom_tree *idom = (s ? &s->idom_analysis.require() : NULL);
 
    /* Temporary storage to sort the lists of blocks.  This normalizes the
     * output, making it possible to use it for certain tests.

src/intel/compiler/brw_fs.cpp

@@ -2432,7 +2432,6 @@ brw::register_pressure::~register_pressure()
 void
 fs_visitor::invalidate_analysis(brw::analysis_dependency_class c)
 {
-   backend_shader::invalidate_analysis(c);
    live_analysis.invalidate(c);
    regpressure_analysis.invalidate(c);
    idom_analysis.invalidate(c);
@@ -4180,7 +4179,7 @@ brw_compile_bs(const struct brw_compiler *compiler,
 static UNUSED void
 brw_fs_test_dispatch_packing(const fs_builder &bld)
 {
-   const fs_visitor *shader = static_cast<const fs_visitor *>(bld.shader);
+   const fs_visitor *shader = bld.shader;
    const gl_shader_stage stage = shader->stage;
    const bool uses_vmask =
       stage == MESA_SHADER_FRAGMENT &&

src/intel/compiler/brw_fs.h

@@ -29,6 +29,7 @@
 #define BRW_FS_H
 
 #include "brw_shader.h"
+#include "brw_ir_allocator.h"
 #include "brw_ir_fs.h"
 #include "brw_fs_live_variables.h"
 #include "brw_ir_performance.h"
@@ -39,7 +40,7 @@ namespace {
    struct acp_entry;
 }
 
-class fs_visitor;
+struct fs_visitor;
 
 namespace brw {
    /**
@@ -181,7 +182,7 @@ class instruction_scheduler;
  *
  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  */
-class fs_visitor : public backend_shader
+struct fs_visitor
 {
 public:
    fs_visitor(const struct brw_compiler *compiler,
@@ -248,7 +249,7 @@ public:
    void assign_constant_locations();
    bool get_pull_locs(const fs_reg &src, unsigned *out_surf_index,
                       unsigned *out_pull_index);
-   virtual void invalidate_analysis(brw::analysis_dependency_class c);
+   void invalidate_analysis(brw::analysis_dependency_class c);
 
 #ifndef NDEBUG
    void validate();
@@ -299,6 +300,29 @@ public:
 
    void calculate_cfg();
 
+   const struct brw_compiler *compiler;
+   void *log_data; /* Passed to compiler->*_log functions */
+
+   const struct intel_device_info * const devinfo;
+   const nir_shader *nir;
+   struct brw_stage_prog_data * const stage_prog_data;
+
+   /** ralloc context for temporary data used during compile */
+   void *mem_ctx;
+
+   /**
+    * List of either fs_inst or vec4_instruction (inheriting from
+    * backend_instruction)
+    */
+   exec_list instructions;
+
+   cfg_t *cfg;
+
+   gl_shader_stage stage;
+   bool debug_enabled;
+
+   brw::simple_allocator alloc;
+
    const brw_base_prog_key *const key;
 
    struct brw_gs_compile *gs_compile;

src/intel/compiler/brw_fs_nir.cpp

@@ -3252,7 +3252,7 @@ fs_nir_emit_gs_intrinsic(nir_to_brw_state &ntb,
 static fs_reg
 fetch_render_target_array_index(const fs_builder &bld)
 {
-   const fs_visitor *v = static_cast<const fs_visitor *>(bld.shader);
+   const fs_visitor *v = bld.shader;
 
    if (bld.shader->devinfo->ver >= 20) {
       /* Gfx20+ has separate Render Target Array indices for each pair

src/intel/compiler/brw_fs_visitor.cpp

@@ -986,7 +986,11 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler,
                        unsigned dispatch_width,
                        bool needs_register_pressure,
                        bool debug_enabled)
-   : backend_shader(compiler, params, shader, prog_data, debug_enabled),
+   : compiler(compiler), log_data(params->log_data),
+     devinfo(compiler->devinfo), nir(shader),
+     stage_prog_data(prog_data), mem_ctx(params->mem_ctx),
+     cfg(NULL), stage(shader->info.stage),
+     debug_enabled(debug_enabled),
      key(key), gs_compile(NULL), prog_data(prog_data),
      live_analysis(this), regpressure_analysis(this),
      performance_analysis(this), idom_analysis(this),
@@ -1006,8 +1010,11 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler,
                        unsigned dispatch_width, unsigned max_polygons,
                        bool needs_register_pressure,
                        bool debug_enabled)
-   : backend_shader(compiler, params, shader, &prog_data->base,
-                    debug_enabled),
+   : compiler(compiler), log_data(params->log_data),
+     devinfo(compiler->devinfo), nir(shader),
+     stage_prog_data(&prog_data->base), mem_ctx(params->mem_ctx),
+     cfg(NULL), stage(shader->info.stage),
+     debug_enabled(debug_enabled),
      key(&key->base), gs_compile(NULL), prog_data(&prog_data->base),
      live_analysis(this), regpressure_analysis(this),
      performance_analysis(this), idom_analysis(this),
@@ -1030,8 +1037,11 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler,
                        const nir_shader *shader,
                        bool needs_register_pressure,
                        bool debug_enabled)
-   : backend_shader(compiler, params, shader, &prog_data->base.base,
-                    debug_enabled),
+   : compiler(compiler), log_data(params->log_data),
+     devinfo(compiler->devinfo), nir(shader),
+     stage_prog_data(&prog_data->base.base), mem_ctx(params->mem_ctx),
+     cfg(NULL), stage(shader->info.stage),
+     debug_enabled(debug_enabled),
      key(&c->key.base), gs_compile(c),
      prog_data(&prog_data->base.base),
      live_analysis(this), regpressure_analysis(this),

src/intel/compiler/brw_ir_fs.h

@@ -25,7 +25,8 @@
 #ifndef BRW_IR_FS_H
 #define BRW_IR_FS_H
 
-#include "brw_shader.h"
+#include "brw_ir.h"
+#include "brw_ir_allocator.h"
 
 class fs_inst;
 

src/intel/compiler/brw_ir_performance.h

@@ -27,7 +27,7 @@
 
 #include "brw_ir_analysis.h"
 
-class fs_visitor;
+struct fs_visitor;
 
 namespace brw {
    /**

src/intel/compiler/brw_shader.cpp

@@ -590,27 +590,6 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg)
    return false;
 }
 
-backend_shader::backend_shader(const struct brw_compiler *compiler,
-                               const struct brw_compile_params *params,
-                               const nir_shader *shader,
-                               struct brw_stage_prog_data *stage_prog_data,
-                               bool debug_enabled)
-   : compiler(compiler),
-     log_data(params->log_data),
-     devinfo(compiler->devinfo),
-     nir(shader),
-     stage_prog_data(stage_prog_data),
-     mem_ctx(params->mem_ctx),
-     cfg(NULL),
-     stage(shader->info.stage),
-     debug_enabled(debug_enabled)
-{
-}
-
-backend_shader::~backend_shader()
-{
-}
-
 bool
 backend_reg::equals(const backend_reg &r) const
 {
@@ -1108,11 +1087,6 @@ backend_instruction::remove(bblock_t *block, bool defer_later_block_ip_updates)
    exec_node::remove();
 }
 
-void
-backend_shader::invalidate_analysis(brw::analysis_dependency_class c)
-{
-}
-
 extern "C" const unsigned *
 brw_compile_tes(const struct brw_compiler *compiler,
                 brw_compile_tes_params *params)

src/intel/compiler/brw_shader.h

@@ -30,9 +30,6 @@
 #include "compiler/nir/nir.h"
 
 #ifdef __cplusplus
-#include "brw_ir_analysis.h"
-#include "brw_ir_allocator.h"
-
 enum instruction_scheduler_mode {
    SCHEDULE_PRE,
    SCHEDULE_PRE_NON_LIFO,
@@ -42,47 +39,7 @@ enum instruction_scheduler_mode {
 };
 
 #define UBO_START ((1 << 16) - 4)
-
-struct backend_shader {
-protected:
-
-   backend_shader(const struct brw_compiler *compiler,
-                  const struct brw_compile_params *params,
-                  const nir_shader *shader,
-                  struct brw_stage_prog_data *stage_prog_data,
-                  bool debug_enabled);
-
-public:
-   virtual ~backend_shader();
-
-   const struct brw_compiler *compiler;
-   void *log_data; /* Passed to compiler->*_log functions */
-
-   const struct intel_device_info * const devinfo;
-   const nir_shader *nir;
-   struct brw_stage_prog_data * const stage_prog_data;
-
-   /** ralloc context for temporary data used during compile */
-   void *mem_ctx;
-
-   /**
-    * List of either fs_inst or vec4_instruction (inheriting from
-    * backend_instruction)
-    */
-   exec_list instructions;
-
-   cfg_t *cfg;
-
-   gl_shader_stage stage;
-   bool debug_enabled;
-
-   brw::simple_allocator alloc;
-
-   virtual void invalidate_analysis(brw::analysis_dependency_class c);
-};
-
 #else
-struct backend_shader;
 #endif /* __cplusplus */
 
 enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type);