intel: Use ALIGN_POT instead of ALIGN inside macro define

These macro define is compute from literals, so use ALIGN_POT instead of ALIGN function
so that it's can be computed at compile time

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26864>
This commit is contained in:
Yonggang Luo 2023-06-29 22:31:18 +08:00 committed by Marge Bot
parent 3a9c569177
commit 8665ce27bc
2 changed files with 11 additions and 4 deletions

View file

@ -24,6 +24,11 @@
#ifndef BRW_RT_H
#define BRW_RT_H
#include <stdint.h>
#include "compiler/shader_enums.h"
#include "util/macros.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -194,8 +199,8 @@ struct brw_rt_raygen_trampoline_params {
#define BRW_RT_OFFSETOF_HIT_ATTRIB_DATA BRW_RT_SIZEOF_HW_STACK
#define BRW_RT_ASYNC_STACK_STRIDE \
ALIGN(BRW_RT_OFFSETOF_HIT_ATTRIB_DATA + \
BRW_RT_SIZEOF_HIT_ATTRIB_DATA, 64)
ALIGN_POT(BRW_RT_OFFSETOF_HIT_ATTRIB_DATA + \
BRW_RT_SIZEOF_HIT_ATTRIB_DATA, 64)
static inline void
brw_rt_compute_scratch_layout(struct brw_rt_scratch_layout *layout,

View file

@ -26,6 +26,8 @@
#include <stdint.h>
#include "util/macros.h"
#define RING_SIZE (1 * 4096)
#define PPHWSP_SIZE (1 * 4096)
@ -72,8 +74,8 @@
#define PTE_SIZE 4
#define GFX8_PTE_SIZE 8
#define NUM_PT_ENTRIES (ALIGN(MEMORY_MAP_SIZE, 4096) / 4096)
#define PT_SIZE ALIGN(NUM_PT_ENTRIES * GFX8_PTE_SIZE, 4096)
#define NUM_PT_ENTRIES (ALIGN_POT(MEMORY_MAP_SIZE, 4096) / 4096)
#define PT_SIZE ALIGN_POT(NUM_PT_ENTRIES * GFX8_PTE_SIZE, 4096)
#define CONTEXT_FLAGS (0x339) /* Normal Priority | L3-LLC Coherency |
* PPGTT Enabled |