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20437 commits

Author SHA1 Message Date
Marek Olšák
195eea461c ac/llvm: correctly load 16-bit TCS inputs from VGPRs and simplify 
The conversions to integer and bitcasts are unnecessary because everything
is already integer.

Acked-by: Pierre-Eric
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>
 2026-04-15 18:12:10 +00:00
Marek Olšák
a48ffce4bd ac,radeonsi: stop using nir_intrinsic_base for TCS inputs passed via VGPRs 
This also removes one use of input_semantic[].

Acked-by: Pierre-Eric
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>
 2026-04-15 18:12:10 +00:00
Marek Olšák
ef44d8e9c8 ac,radeonsi: don't use nir_intrinsic_base for FS outputs 
It was only used by the PS epilog in radeonsi.

Acked-by: Pierre-Eric
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>
 2026-04-15 18:12:07 +00:00
Marek Olšák
99546f7bad ac/nir: add ac_nir_get_io_driver_location as replacement for IO bases 
Acked-by: Pierre-Eric
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>
 2026-04-15 18:12:07 +00:00
Rhys Perry
7f3900ed20 ac/nir_lower_global_access: perform range analysis if useful 
fossil-db (navi31):
Totals from 1197 (0.59% of 202426) affected shaders:
Instrs: 2117283 -> 2108380 (-0.42%); split: -0.47%, +0.05%
CodeSize: 11183776 -> 11140060 (-0.39%); split: -0.42%, +0.03%
Latency: 13568247 -> 13648044 (+0.59%); split: -0.13%, +0.72%
InvThroughput: 2389746 -> 2376716 (-0.55%); split: -0.63%, +0.09%
VClause: 43337 -> 43138 (-0.46%); split: -0.51%, +0.05%
SClause: 31035 -> 31027 (-0.03%); split: -0.22%, +0.20%
Copies: 227528 -> 227002 (-0.23%); split: -0.59%, +0.36%
Branches: 29393 -> 29392 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 64238 -> 64336 (+0.15%)
PreVGPRs: 70480 -> 70468 (-0.02%)
VALU: 1387439 -> 1379274 (-0.59%); split: -0.59%, +0.00%
SALU: 185514 -> 185382 (-0.07%); split: -0.56%, +0.49%
VOPD: 4425 -> 4400 (-0.56%); split: +0.66%, -1.22%

fossil-db (navi21):
Totals from 1197 (0.59% of 202427) affected shaders:
Instrs: 1987004 -> 1974920 (-0.61%); split: -0.64%, +0.03%
CodeSize: 10803928 -> 10745204 (-0.54%); split: -0.56%, +0.01%
VGPRs: 83848 -> 83856 (+0.01%); split: -0.01%, +0.02%
SpillSGPRs: 9843 -> 9861 (+0.18%)
Latency: 14518481 -> 14534898 (+0.11%); split: -0.17%, +0.29%
InvThroughput: 3712336 -> 3698081 (-0.38%); split: -0.52%, +0.13%
VClause: 52677 -> 52546 (-0.25%); split: -0.51%, +0.27%
SClause: 31113 -> 31050 (-0.20%); split: -0.37%, +0.17%
Copies: 219723 -> 218017 (-0.78%); split: -1.05%, +0.27%
Branches: 33717 -> 33716 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 66364 -> 66480 (+0.17%)
PreVGPRs: 71048 -> 71036 (-0.02%)
VALU: 1442585 -> 1431331 (-0.78%); split: -0.78%, +0.00%
SALU: 209617 -> 208517 (-0.52%); split: -0.88%, +0.35%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40945>
 2026-04-15 15:13:10 +00:00
Benjamin Cheng
9182da14a7 radv: Relax linear requirement to VCN1 and prior 
With the previous commit ("ac/surface: Filter swizzle modes for VCN"),
only video-compatible swizzle modes will be picked, so we can enable
tiling for VCN2+.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40948>
 2026-04-15 12:48:57 +00:00
Benjamin Cheng
fcaab2b921 ac/surface: Filter swizzle modes for VCN 
This will allow compatible swizzle modes to be picked for RADV (radeonsi
filters modifiers when creating video surfaces).

This mirrors the logic from ac_modifier_supports_video, and in
addition ensures that XOR swizzle modes are disabled for image arrays
because VCN does not support slice indices.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40948>
 2026-04-15 12:48:57 +00:00
Christian Gmeiner
81b8113a9f radv: Don't advertise any features for R10X6G10X6B10X6A10X6_UNORM_4PACK16 
The recent addition of PIPE_FORMAT_X6R10X6G10X6B10X6A10_UNORM caused
vk_format_to_pipe_format() to map VK_FORMAT_R10X6G10X6B10X6A10X6_UNORM_4PACK16
to a real pipe format, which made radv_physical_device_get_format_properties()
advertise BLIT_SRC/SAMPLED_IMAGE for it. The hardware samples the data as plain
R16G16B16A16 UNORM, which doesn't match the 10-bit UNORM semantics the spec
(and CTS) require, so dEQP-VK.api.copy_and_blit.core.blit_image.* tests with
r10x6g10x6b10x6a10x6_unorm_4pack16 as the source started failing on gfx1201.

Override the mapping to PIPE_FORMAT_NONE so RADV reports zero format features,
matching the behavior prior to the new pipe format being added. Proper support
can be restored once VK_EXT_rgba10x6_formats is implemented.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40653>
 2026-04-15 12:16:53 +00:00
Samuel Pitoiset
dc0d6100f9 radv/ci: document a descriptor heap failure 
Test bug.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40918>
 2026-04-15 11:22:10 +00:00
Samuel Pitoiset
6462055e38 radv/ci: fix setting RADV_EXPERIMENTAL=heap 
It's overwritten if manually set per jobs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40918>
 2026-04-15 11:22:10 +00:00
Samuel Pitoiset
282bb0d11b radv/ci: update flakes of VKCTS jobs 
Collected after 25 runs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40918>
 2026-04-15 11:22:10 +00:00
Samuel Pitoiset
3af1f8dc0a radv/ci: remove a hack for the number of deqp instances with RENOIR 
Latest VKCTS main uses way less memory than before, and increasing the
number of deqp instances to 16 seems to work just fine now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40918>
 2026-04-15 11:22:10 +00:00
Samuel Pitoiset
3777f7fe3b ci: uprev VKCTS main to 634a3fc62d82c34de68c3b1add25e6b7f5777524 
RADV is the only driver using VKCTS main.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40918>
 2026-04-15 11:22:10 +00:00
Georg Lehmann
5607417f57 radv: remove radv_nir_lower_viewport_to_zero
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
nir_opt_varyings does this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:17:01 +00:00
Georg Lehmann
c842186e39 radv: remove lower array vars to elem 
No Foz-DB changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:17:01 +00:00
Georg Lehmann
c7a953809a radv: don't lower io vars to scalar 
Done later on lowered IO.

Foz-DB Navi48:
Totals from 4 (0.00% of 205045) affected shaders:
Instrs: 1434 -> 1418 (-1.12%)
CodeSize: 7912 -> 7848 (-0.81%)
Latency: 5688 -> 5646 (-0.74%)
InvThroughput: 642 -> 646 (+0.62%)
PreVGPRs: 104 -> 100 (-3.85%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:17:01 +00:00
Georg Lehmann
b2e59d80b0 radv: do not shrink vectors when lowering IO vars to scalar 
I wanted to move this later, but looking at the stats, this pass
actually hurts here because it shrinks smem loads that would be better
vectorized. So just remove it.

Foz-DB Navi48:
Totals from 2268 (1.11% of 205045) affected shaders:
Instrs: 1573491 -> 1569535 (-0.25%); split: -0.35%, +0.10%
CodeSize: 8399092 -> 8378632 (-0.24%); split: -0.39%, +0.14%
SpillSGPRs: 312 -> 355 (+13.78%)
Latency: 12223349 -> 12225239 (+0.02%); split: -0.20%, +0.21%
InvThroughput: 2235646 -> 2236174 (+0.02%); split: -0.15%, +0.17%
VClause: 26526 -> 26549 (+0.09%); split: -0.02%, +0.11%
SClause: 34974 -> 34053 (-2.63%); split: -3.01%, +0.37%
Copies: 114417 -> 115513 (+0.96%); split: -0.33%, +1.28%
Branches: 28085 -> 26899 (-4.22%); split: -4.24%, +0.02%
PreSGPRs: 98109 -> 99024 (+0.93%); split: -0.10%, +1.03%
PreVGPRs: 78224 -> 78226 (+0.00%)
VALU: 929067 -> 928588 (-0.05%); split: -0.08%, +0.03%
SALU: 204756 -> 206936 (+1.06%); split: -0.19%, +1.26%
SMEM: 67181 -> 64687 (-3.71%); split: -3.83%, +0.11%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:17:00 +00:00
Georg Lehmann
f001afad23 radv: remove some unneeded passes from radv_nir_lower_io_vars_to_scalar 
No Foz-DB changes on Navi48.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:16:59 +00:00
Georg Lehmann
e0883d107a radv: do not remove dead variables 
No Foz-DB changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:16:59 +00:00
Georg Lehmann
8c98ed9e85 radv: do not vectorize io variables 
No Foz-DB changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:16:59 +00:00
Georg Lehmann
d14fc27f44 radv: do not vectorize fs out variables 
This is scalarized later anyway.

No Foz-DB changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:16:58 +00:00
Georg Lehmann
5d8c817fd7 radv: lower lowered io to scalar 
We already did this for everything except
fragment shader outputs with epilogs.

If we move it a bit earlier, we can stop lowering IO
variables to scalar.

Foz-DB Navi48:
Totals from 1001 (0.49% of 205045) affected shaders:
MaxWaves: 31252 -> 31256 (+0.01%)
Instrs: 372258 -> 372036 (-0.06%); split: -0.14%, +0.08%
CodeSize: 1999064 -> 1997836 (-0.06%); split: -0.13%, +0.06%
VGPRs: 39096 -> 39072 (-0.06%)
Latency: 1235558 -> 1235435 (-0.01%); split: -0.08%, +0.07%
InvThroughput: 213845 -> 213875 (+0.01%); split: -0.06%, +0.07%
VClause: 5840 -> 5838 (-0.03%)
SClause: 10964 -> 10969 (+0.05%); split: -0.03%, +0.07%
Copies: 21469 -> 21545 (+0.35%); split: -0.42%, +0.78%
Branches: 5326 -> 5324 (-0.04%)
PreSGPRs: 34214 -> 34206 (-0.02%); split: -0.03%, +0.01%
PreVGPRs: 21931 -> 22001 (+0.32%); split: -0.06%, +0.38%
VALU: 212386 -> 212418 (+0.02%); split: -0.07%, +0.09%
SALU: 50409 -> 50378 (-0.06%); split: -0.07%, +0.01%
VMEM: 8352 -> 8331 (-0.25%)
SMEM: 17966 -> 17963 (-0.02%)

This is mostly RA noise in GPL FS shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
 2026-04-15 09:16:58 +00:00
Natalie Vock
1f998b38f4 radv: Run nir_opt_deref after first optimization loop 
Only at this point are loads from uninitialized variables lowered to
undef and copy-propagated so that nir_opt_deref's cast-of-undef
optimization works properly.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40799>
 2026-04-15 08:42:12 +00:00
Konstantin Seurer
480a94fb16 radv: Gather debug info about shader args 
Gathers names of shader args using the added macros and stores a list of
arg names with additional information to radv_shader_debug_info.

Example output (pipeline.log, RT prolog):
ARGS:
   0. sgpr const_addr user_data offset=0 size=2 name=ac.ring_offsets
   1. sgpr const_addr user_data offset=2 size=1 name=descriptors[0]
   2. sgpr const_addr user_data offset=3 size=1 name=ac.push_constants
   3. sgpr const_addr user_data offset=4 size=1 name=ac.dynamic_descriptors
   4. sgpr const_addr user_data offset=5 size=1 name=ac.rt.traversal_shader_addr
   5. sgpr const_addr user_data offset=6 size=2 name=ac.rt.sbt_descriptors
   6. sgpr const_addr user_data offset=8 size=2 name=ac.rt.launch_size_addr
   7. sgpr value user_data offset=10 size=1 name=ac.rt.dynamic_callable_stack_base
   8. vgpr value offset=0 size=1 name=ac.local_invocation_ids_packed

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37829>
 2026-04-14 18:04:58 +00:00
Konstantin Seurer
ff2caf1513 radv: Set debug info in radv_shader_create_uncached 
Avoids patching the stats in radv_shader_create and it will allow adding
shader args debug info to some prologs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37829>
 2026-04-14 18:04:58 +00:00
Konstantin Seurer
3766985f1b radv: Refactor declaring shader args 
Adds radv_shader_args_state as well as RADV_ADD_* macros. Using those
will simplify gathering debug information.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37829>
 2026-04-14 18:04:58 +00:00
Konstantin Seurer
c485d3a356 radv: Add RT prolog information to hang reports 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37829>
 2026-04-14 18:04:57 +00:00
Konstantin Seurer
8c10eab1f3 radv: Add an option for dumping BVH stats 
The option uses the dumping already implemented for rra to gather
statistics about BVHs on the CPU and write them to a csv file. This csv
file can then be compared using a tool similar to report-fossils to
judge the impact of changes to the bvh build code.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38463>
 2026-04-14 17:27:29 +00:00
Rhys Perry
984aa6e085 aco/ra: create s_bitset 
fossil-db (navi31):
Totals from 33092 (16.35% of 202426) affected shaders:
Instrs: 16722717 -> 16696250 (-0.16%); split: -0.16%, +0.00%
CodeSize: 90003664 -> 89779940 (-0.25%); split: -0.25%, +0.00%
Latency: 123990480 -> 123934891 (-0.04%); split: -0.05%, +0.00%
InvThroughput: 20972033 -> 20971140 (-0.00%); split: -0.01%, +0.00%

fossil-db (navi21):
Totals from 6776 (3.35% of 202427) affected shaders:
Instrs: 11167123 -> 11166438 (-0.01%)
CodeSize: 62605436 -> 62573220 (-0.05%); split: -0.05%, +0.00%
Latency: 238610061 -> 238603224 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 55148639 -> 55148624 (-0.00%); split: -0.00%, +0.00%
Copies: 1211216 -> 1210612 (-0.05%); split: -0.05%, +0.00%
SALU: 1436679 -> 1435997 (-0.05%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40889>
 2026-04-14 13:19:55 +00:00
Rhys Perry
88dcda1078 aco: support s_bitset 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40889>
 2026-04-14 13:19:55 +00:00
Georg Lehmann
6a2ac18b2b radv: remove radv_remove_color_exports
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
We do this later on lowered IO anyway, in radv_nir_trim_fs_color_exports.
That pass is also per component, and not per output slot.

No Foz-DB changes on Navi48.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40928>
 2026-04-14 12:58:00 +00:00
Georg Lehmann
cbeccb0a09 radv: call radv_optimize_nir after lowering io 
We are moving more and more passes after lowering io
because they no longer operate on variables.

There doesn't really seem to be a need to optimize before
lowering io, so do it afterwards.

Foz-DB Navi48:
Totals from 2339 (1.14% of 205045) affected shaders:
MaxWaves: 66218 -> 66258 (+0.06%)
Instrs: 2009510 -> 2007711 (-0.09%); split: -0.15%, +0.06%
CodeSize: 10646476 -> 10648376 (+0.02%); split: -0.05%, +0.07%
VGPRs: 131304 -> 131232 (-0.05%)
Latency: 19249976 -> 19248715 (-0.01%); split: -0.02%, +0.02%
InvThroughput: 3133252 -> 3132291 (-0.03%); split: -0.05%, +0.02%
VClause: 32999 -> 33003 (+0.01%); split: -0.07%, +0.08%
SClause: 42959 -> 43101 (+0.33%); split: -0.27%, +0.60%
Copies: 143721 -> 143792 (+0.05%); split: -0.38%, +0.43%
Branches: 38736 -> 38738 (+0.01%)
PreSGPRs: 106104 -> 105846 (-0.24%); split: -0.27%, +0.03%
PreVGPRs: 95217 -> 95179 (-0.04%); split: -0.04%, +0.00%
VALU: 1146620 -> 1144783 (-0.16%); split: -0.22%, +0.06%
SALU: 275263 -> 275183 (-0.03%); split: -0.16%, +0.13%
VMEM: 58353 -> 58364 (+0.02%)
SMEM: 84810 -> 85215 (+0.48%); split: -0.00%, +0.48%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40928>
 2026-04-14 12:58:00 +00:00
Georg Lehmann
4598bbaea7 radv: immediately remove phis after loop unrolling 
Loop unrolling can create phis when constants are defined in the loop but
used outside of it. Ideally this should not happen, but for now we have
to remove these as soon as possible before they trip up other passes.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40928>
 2026-04-14 12:58:00 +00:00
Pierre-Eric Pelloux-Prayer
7e163fb793 ac/tests: use amdgpu shim devices 
Instead of duplicating fake devices.
This requires to move amdgpu_devices.* to the common folder so
they can be shared between shim and tests.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:20 +00:00
Pierre-Eric Pelloux-Prayer
7340442840 ac/info: constify ac_fill_compiler_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:20 +00:00
Pierre-Eric Pelloux-Prayer
8c6a18364a ac/info: add ac_fill_tess_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:19 +00:00
Pierre-Eric Pelloux-Prayer
2f8865035f ac/info: add ac_fill_hw_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:18 +00:00
Pierre-Eric Pelloux-Prayer
8b28cdc8bd ac/info: add ac_fill_feature_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:18 +00:00
Pierre-Eric Pelloux-Prayer
84dcc8b940 ac/info: add ac_fill_bug_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:17 +00:00
Pierre-Eric Pelloux-Prayer
a26ba344a3 ac/info: remove has_bo_metadata 
It's unused.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:16 +00:00
Pierre-Eric Pelloux-Prayer
44334d6de0 ac/info: move more memory properties to ac_fill_memory_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:15 +00:00
Pierre-Eric Pelloux-Prayer
5abf02362f ac/info: add ac_identify_chip 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:14 +00:00
Pierre-Eric Pelloux-Prayer
360e9503d8 ac/info: add ac_fill_hw_ip_info 
num_instances is initialized to 1 and overriden in ac_query_gpu_info.

has_graphics needs to be set early as other info fields are determined
based on its value.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:14 +00:00
Pierre-Eric Pelloux-Prayer
2bc0e5437d ac/info: add ac_fill_memory_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:13 +00:00
Pierre-Eric Pelloux-Prayer
f9c60f3699 ac/info: add ac_fill_tiling_info 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:12 +00:00
Pierre-Eric Pelloux-Prayer
79ebbf587e ac: remove ac_null_device 
Prefer AMDGPU shim.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
 2026-04-14 12:06:12 +00:00
Samuel Pitoiset
d39d846cfa radv/ci: set RADV_EXPERIMENTAL=heap 
Current VKCTS main doesn't have any tests for that, but next uprev
should contain a bunch and using that envvar will allow us to catch
them easily.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39483>
 2026-04-14 10:10:29 +00:00
Samuel Pitoiset
f4f2a966e3 radv: advertise VK_EXT_descriptor_heap with RADV_EXPERIMENTAL=heap 
It's not yet enabled by default because it's quite a big extension
and I expect bugs because test coverage isn't very good. It will be
enabled by default in one or two Mesa releases when it's more stable.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39483>
 2026-04-14 10:10:29 +00:00
Samuel Pitoiset
67ae52cdc2 radv: add support for DGC with descriptor heap 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39483>
 2026-04-14 10:10:28 +00:00
Samuel Pitoiset
17ed105a9b radv: flush caches with descriptor heap access flags 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39483>
 2026-04-14 10:10:28 +00:00