mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-09 15:28:04 +02:00
ac/info: add ac_fill_memory_info
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40656>
This commit is contained in:
parent
f9c60f3699
commit
2bc0e5437d
2 changed files with 30 additions and 24 deletions
|
|
@ -424,6 +424,32 @@ ac_fill_tiling_info(struct radeon_info *info, const struct amdgpu_gpu_info *amdi
|
|||
sizeof(amdinfo->gb_macro_tile_mode));
|
||||
}
|
||||
|
||||
void
|
||||
ac_fill_memory_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info,
|
||||
const struct drm_amdgpu_memory_info *meminfo)
|
||||
{
|
||||
/* Note: usable_heap_size values can be random and can't be relied on. */
|
||||
info->gart_size_kb = DIV_ROUND_UP(meminfo->gtt.total_heap_size, 1024);
|
||||
info->vram_size_kb = DIV_ROUND_UP(fix_vram_size(meminfo->vram.total_heap_size), 1024);
|
||||
info->vram_vis_size_kb = DIV_ROUND_UP(meminfo->cpu_accessible_vram.total_heap_size, 1024);
|
||||
/* Add some margin of error, though this shouldn't be needed in theory. */
|
||||
info->all_vram_visible = info->vram_size_kb * 0.9 < info->vram_vis_size_kb;
|
||||
|
||||
info->virtual_address_max = device_info->virtual_address_max;
|
||||
/* Set which chips have dedicated VRAM. */
|
||||
info->has_dedicated_vram = !(device_info->ids_flags & AMDGPU_IDS_FLAGS_FUSION);
|
||||
/* The kernel can split large buffers in VRAM but not in GTT, so large
|
||||
* allocations can fail or cause buffer movement failures in the kernel.
|
||||
*/
|
||||
if (info->has_dedicated_vram)
|
||||
info->max_heap_size_kb = info->vram_size_kb;
|
||||
else
|
||||
info->max_heap_size_kb = info->gart_size_kb;
|
||||
|
||||
info->vram_type = device_info->vram_type;
|
||||
info->memory_bus_width = device_info->vram_bit_width;
|
||||
}
|
||||
|
||||
enum ac_query_gpu_info_result
|
||||
ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
|
||||
bool require_pci_bus_info)
|
||||
|
|
@ -630,22 +656,13 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
|
|||
fprintf(stderr, "amdgpu: ac_drm_query_info(memory) failed.\n");
|
||||
return AC_QUERY_GPU_INFO_FAIL;
|
||||
}
|
||||
|
||||
/* Note: usable_heap_size values can be random and can't be relied on. */
|
||||
info->gart_size_kb = DIV_ROUND_UP(meminfo.gtt.total_heap_size, 1024);
|
||||
info->vram_size_kb = DIV_ROUND_UP(fix_vram_size(meminfo.vram.total_heap_size), 1024);
|
||||
info->vram_vis_size_kb = DIV_ROUND_UP(meminfo.cpu_accessible_vram.total_heap_size, 1024);
|
||||
ac_fill_memory_info(info, &device_info, &meminfo);
|
||||
|
||||
ac_drm_query_video_caps_info(dev, AMDGPU_INFO_VIDEO_CAPS_DECODE,
|
||||
sizeof(info->dec_caps), &(info->dec_caps));
|
||||
ac_drm_query_video_caps_info(dev, AMDGPU_INFO_VIDEO_CAPS_ENCODE,
|
||||
sizeof(info->enc_caps), &(info->enc_caps));
|
||||
|
||||
/* Add some margin of error, though this shouldn't be needed in theory. */
|
||||
info->all_vram_visible = info->vram_size_kb * 0.9 < info->vram_vis_size_kb;
|
||||
|
||||
info->virtual_address_max = device_info.virtual_address_max;
|
||||
|
||||
/* Set chip identification. */
|
||||
info->pci_id = device_info.device_id;
|
||||
info->pci_rev_id = device_info.pci_rev;
|
||||
|
|
@ -874,20 +891,6 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
|
|||
info->ip[AMD_IP_VPE].ver_minor,
|
||||
info->ip[AMD_IP_VPE].ver_rev);
|
||||
|
||||
/* Set which chips have dedicated VRAM. */
|
||||
info->has_dedicated_vram = !(device_info.ids_flags & AMDGPU_IDS_FLAGS_FUSION);
|
||||
|
||||
/* The kernel can split large buffers in VRAM but not in GTT, so large
|
||||
* allocations can fail or cause buffer movement failures in the kernel.
|
||||
*/
|
||||
if (info->has_dedicated_vram)
|
||||
info->max_heap_size_kb = info->vram_size_kb;
|
||||
else
|
||||
info->max_heap_size_kb = info->gart_size_kb;
|
||||
|
||||
info->vram_type = device_info.vram_type;
|
||||
info->memory_bus_width = device_info.vram_bit_width;
|
||||
|
||||
/* Set which chips have uncached device memory. */
|
||||
info->has_l2_uncached = info->gfx_level >= GFX9;
|
||||
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ extern "C" {
|
|||
|
||||
struct amdgpu_gpu_info;
|
||||
struct drm_amdgpu_info_device;
|
||||
struct drm_amdgpu_memory_info;
|
||||
|
||||
struct amd_ip_info {
|
||||
uint8_t ver_major;
|
||||
|
|
@ -488,6 +489,8 @@ enum ac_query_gpu_info_result ac_query_gpu_info(int fd, void *dev_p, struct rade
|
|||
bool require_pci_bus_info);
|
||||
void ac_fill_compiler_info(struct radeon_info *info, struct drm_amdgpu_info_device *device_info);
|
||||
void ac_fill_tiling_info(struct radeon_info *info, const struct amdgpu_gpu_info *amdinfo);
|
||||
void ac_fill_memory_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info,
|
||||
const struct drm_amdgpu_memory_info *meminfo);
|
||||
|
||||
void ac_compute_driver_uuid(char *uuid, size_t size);
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue