Marek Olšák 195eea461c ac/llvm: correctly load 16-bit TCS inputs from VGPRs and simplify ... The conversions to integer and bitcasts are unnecessary because everything is already integer. Acked-by: Pierre-Eric Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40556>		2026-04-15 18:12:10 +00:00
..
addrlib	amd/addrlib: Add more GFX1013 GPUs	2026-03-16 09:40:41 +00:00
ci	radv/ci: document a descriptor heap failure	2026-04-15 11:22:10 +00:00
common	ac/nir: add ac_nir_get_io_driver_location as replacement for IO bases	2026-04-15 18:12:07 +00:00
compiler	aco/ra: create s_bitset	2026-04-14 13:19:55 +00:00
drm-shim	ac/tests: use amdgpu shim devices	2026-04-14 12:06:20 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	ac/llvm: correctly load 16-bit TCS inputs from VGPRs and simplify	2026-04-15 18:12:10 +00:00
packets	amd: switch to new packet definitions for all packets	2026-04-10 03:42:45 +00:00
registers	amd: switch to new packet definitions for all packets	2026-04-10 03:42:45 +00:00
vpelib	amd/vpelib: Apply external CSC	2026-03-04 13:17:26 +08:00
vulkan	radv: Relax linear requirement to VCN1 and prior	2026-04-15 12:48:57 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00