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radv: don't lower io vars to scalar

Browse source 
Done later on lowered IO.

Foz-DB Navi48:
Totals from 4 (0.00% of 205045) affected shaders:
Instrs: 1434 -> 1418 (-1.12%)
CodeSize: 7912 -> 7848 (-0.81%)
Latency: 5688 -> 5646 (-0.74%)
InvThroughput: 642 -> 646 (+0.62%)
PreVGPRs: 104 -> 100 (-3.85%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40955>
This commit is contained in:
Georg Lehmann 2026-04-14 15:37:46 +02:00 • committed by Marge Bot
parent b2e59d80b0
commit c7a953809a
3 changed files with 0 additions and 13 deletions
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2
src/amd/vulkan/nir/radv_nir.h
View file

@ -61,8 +61,6 @@ bool radv_nir_lower_viewport_to_zero(nir_shader *nir);
bool radv_nir_export_multiview(nir_shader *nir);
void radv_nir_lower_io_vars_to_scalar(nir_shader *nir, nir_variable_mode mask);
unsigned radv_map_io_driver_location(unsigned semantic);
bool radv_recompute_fs_input_bases(nir_shader *nir);

8
src/amd/vulkan/nir/radv_nir_lower_io.c
View file

@ -21,14 +21,6 @@ type_size_vec4(const struct glsl_type *type, bool bindless)
return glsl_count_attribute_slots(type, false);
}
void
radv_nir_lower_io_vars_to_scalar(nir_shader *nir, nir_variable_mode mask)
{
bool progress = false;
NIR_PASS(progress, nir, nir_lower_io_vars_to_scalar, mask);
}
typedef struct {
uint64_t always_per_vertex;
uint64_t potentially_per_primitive;

3
src/amd/vulkan/radv_pipeline_graphics.c
View file

@ -1235,9 +1235,6 @@ radv_link_shaders(struct radv_shader_stage *producer_stage, struct radv_shader_s
nir_lower_io_array_vars_to_elements(producer, consumer);
nir_validate_shader(producer, "after nir_lower_io_arrays_to_elements");
nir_validate_shader(consumer, "after nir_lower_io_arrays_to_elements");
radv_nir_lower_io_vars_to_scalar(producer, nir_var_shader_out);
radv_nir_lower_io_vars_to_scalar(consumer, nir_var_shader_in);
}
static const mesa_shader_stage graphics_shader_order[] = {