Commit graph

218028 commits

Author SHA1 Message Date
Georg Lehmann
013936e250 intel/nir_opt_peephole_ffma: fix fp_math_ctlr for modifiers
If abs/neg don't preserve nan/inf/sz, the whole expressions won't.

Fixes: 1b0808adf3 ("intel/nir: Make ffma peephole optimization preserve fp_fast_math flags")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 26ec32dada)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Tapani Pälli
f7aeeb194d anv: do not use resource barrier with split barriers
Fixes failing CTS tests using asymmetric and non-asymmetric (regular)
split barriers.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15310
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit bdaf8b6b39)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Nick Hamilton
3591e2b4cd pco: fix clamping the array index when shaderImageGatherExtended is enabled
The array index value is a signed integer but the compiler was using
the unsigned version of the clamp helper function meaning the value
was not been clamped to 0 when its value was < 0.

Fix the following deqp test cases when shaderImageGatherExtended is enabled
dEQP-VK.glsl.texture_gather.basic.2d_array.*
dEQP-VK.glsl.texture_gather.offset.*.2d_array.*
dEQP-VK.glsl.texture_gather.offset_dynamic.*.2d_array.*
dEQP-VK.glsl.texture_gather.offsets.*.2d_array.*

Fixes: 854563f0f8 ("pco: fully switch over to common smp emission code")
Signed-off-by: Nick Hamilton <nick.hamilton@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
(cherry picked from commit b80a5f9b7d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Simon Perretta
2201b6ff96 pco: amend tg4 lowering
Use lower_tg4_offsets to take care of explicit offsets, and just swizzle
the texels in the order defined by textureGather*

Fixes: 46c9239c11 ("pvr, pco: initial texture gather support with gather sampler")
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
(cherry picked from commit 56b8dc92a9)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Arjob Mukherjee
2919eff898 pvr: increase value of maxPerStageDescriptorStorageBuffers
Increase past the minimum required by the Vulkan Spec to fix tests. This
was needed due to Zink requirements which splits
`maxPerStageDescriptorStorageBuffers` between atomic buffers and
`MaxShaderStorageBlocks`.

Fixes the following GLES conformance tests:
  KHR-GLES31.core.compute_shader.resources-max
  KHR-GLES31.core.draw_indirect.advanced-twoPass-Compute-arrays
  KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
  KHR-GLES31.core.shader_image_load_store.basic-allTargets-store-cs
  KHR-GLES31.core.shader_image_load_store.basic-allTargets-store-fs
  KHR-GLES31.core.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-int
  KHR-GLES31.core.shader_storage_buffer_object.basic-stdLayout_UBO_SSBO-case1-cs
  KHR-GLES31.core.shader_storage_buffer_object.basic-stdLayout_UBO_SSBO-case2-cs
  dEQP-GLES31.functional.draw_indirect.compute_interop.combined.drawelements_compute_cmd_and_data_and_indices
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_alias_overwrite
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_alias_write
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_atomic_alias_overwrite
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_atomic_alias_write
  dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.ssbo_atomic_multiple_write_read
  dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.ssbo_multiple_write_read
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_alias_overwrite
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_alias_write
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_atomic_alias_overwrite
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_atomic_alias_write

Backport-to: 26.0
Signed-off-by: Arjob Mukherjee <arjob.mukherjee@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
(cherry picked from commit 35f57a2739)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
David Rosca
3b276be9e5 frontends/va: Fix finding LTRs from POCs in HEVC decode
This should only consider valid entries, not loop over the entire array.
In addition the array size was wrong before.

Fixes: 779edc0759 ("frontends/va: Correctly derive HEVC StCurrBefore, StCurrAfter and LtCurr")
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit c2a4fa33b8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Pavel Ondračka
b07b674765 r300: dirty VS state when switching variants
When r300_pick_vertex_shader switches to a WPOS variant, it only dirtied
rs_block_state, leaving vs_state with a stale code size. This caused
cs_count warnings (offset of -4 for one extra VS instruction) but was
mostly harmless since the emitted packet stream still used the current
shader.

Factor the VS code dirtying out of r300_bind_vs_state into a helper and
call it when selecting a new variant too.

Fixes: 806dcf9db7 ("r300: only output wpos in vertex shaders when needed")
(cherry picked from commit cc7be8433a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Jesse Natalie
4083a34188 wgl: Use an hwnd xor hdc for framebuffers
It seems maybe hdcs can get recycled?

Fixes: 28058221 ("wgl: Support contexts created from non-window DCs")
(cherry picked from commit 3f35e65253)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Pavel Ondračka
d87649d8be r300: fix MSAA resolve COLORPITCH tiling after pipe_surface de-pointerization
r300_simple_msaa_resolve used to patch srcsurf->pitch with the resolve
destination's tiling bits before passing the surface to the blitter.
That worked when set_framebuffer_state kept the same pipe_surface
pointer, so r300_get_nonnull_cb returned the patched object.

After the de-pointerization, r300_framebuffer_init creates a fresh
r300_surface from the pipe_surface template, discarding the pitch
modification. The hardware then uses the MSAA source tiling for
R300_RB3D_COLORPITCH0, leading to corruption.

Move the tiling override into r300_emit_fb_state and override the tiling
bits of COLORPITCH from the destination surface at emit time.

Fixes: 2eb45daa9c ("gallium: de-pointerize pipe_surface")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15303
(cherry picked from commit 416da54cce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Simon Perretta
2aa4169765 pco: reserve additional outputs for trilinear sampled coeffs
Sampling coeffs with trilinear filtering will output 2x sets of data.
Whether bilinear or trilinear filtering is in use can't be determined
without checking state words, so unconditionally reserve 2x to avoid
clobbering output regs.

Fixes: 7df32ba09d ("pco: initial texture/sampler compiler support")
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Tested-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
(cherry picked from commit af1669d9e2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Faith Ekstrand
215cffa772 panvk/csf: Emit INDEX_BUFFER[_SIZE] even for non-indexed draws
The index buffer and index buffer size don't affect whether or not we're
actually doing indexed rendering so we should just emit them whenever
they change.  Otherwise, if someone sets an index buffer and then does a
non-indexed draw and then an indexed draw, the first draw will clear the
dirty bits without setting the index buffer registers and the second
draw won't know to re-emit them.

Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Marc Alcala Prieto <marc.alcalaprieto@arm.com>
(cherry picked from commit 9c8e8ed655)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Samuel Pitoiset
e47d584fed radv: re-introduce DGC+multiview support and enable it for vkd3d-proton only
The Vulkan spec says:
    "VUID-vkCmdExecuteGeneratedCommandsEXT-None-11062
     If a rendering pass is currently active, the view mask must be 0."

So, it's invalid with VK_EXT_device_generated_commands but it's allowed
in DX12, it seems we missed this during the spec review.

Crimson Desert uses this and emulating in vkd3d-proton would be complex,
so let's re-introduce this support only for vkd3d-proton.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 782254b820)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Derek Lesho
7294206e88 zink: Guard bo map/unmap on map_count.
Otherwise zink_bo_map can return cpu_ptr being destroyed by zink_bo_unmap.

Cc: mesa-stable
(cherry picked from commit ce45069c49)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Matt Turner
ab39d20454 radv: fix UB in radv_format_pack_clear_color for snorm formats
Casting a negative float to uint64_t is undefined behavior. GCC 15 with
-O2 produces 0xFFFFFFFFFFFFFFFF for (uint64_t)(-32767.5f), causing snorm
clear values to be packed incorrectly (e.g. 0xFFFF instead of 0x8001 for
snorm16 -1.0). This results in wrong DCC comp-to-single clear colors and
~966 CTS snorm multisample_resolve test failures.

Fix by casting through int64_t first, which is well-defined (truncation
toward zero) and preserves the two's complement bit pattern.

Fixes: 585c25be1e ("radv: fix color conversions for normalized uint/sint formats")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 2595940b0d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Duncan Brawley
64127c4bd9 pco: Fix pco_last_igrp returning the first element instead of the last
Because of a previous refactor, pco_last_igrp was incorrectly changed to return
the first entry in a linked list instead of the last. Update pco_last_igrp to
return the last entry in a linked list.

The following CTS tests now pass:
dEQP-GLES3.functional.shaders.switch.conditional_fall_through_2_dynamic_fragment
dEQP-GLES3.functional.shaders.switch.conditional_fall_through_dynamic_fragment
dEQP-GLES3.functional.shaders.switch.conditional_fall_through_uniform_fragment

Fixes: 719ece42c0 ("pco: Switch back to util/list")

Signed-off-by: Duncan Brawley <duncan.brawley@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
(cherry picked from commit 7428af29f6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Dave Airlie
05ed5acd07 nouveau: drop sector promotion.
Just like the fix for nvk, just drop this in the GL driver as well.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
(cherry picked from commit 3f5d54ab8c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Liu, Mengyang
b6de02511d aco: fix broken VGPRs reservation for 64-bit attributes in VS prologs
After 8e6bff4caa, the large attribute counts as two slots in
`num_attributes` if the vertex shader consumes more than two
channels of it, even though `misaligned_mask` marks only the
lower slot.

Fixes: 8e6bff4caa ("radv: Lower 64-bit VS inputs to 32-bit")
(cherry picked from commit 40fa195cd0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Valentine Burley
df7aa1241b freedreno/drm/virtio: Fix wait_fence ret ordering
ret was read after the timeout check, so breaking on timeout returned 0
instead of the actual fence status, potentially reporting a signaled
fence when it was still pending.

Fixes: 441f01e778 ("freedreno/drm/virtio: Drop blocking in host")

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
(cherry picked from commit 97baa27dad)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Valentine Burley
b7560252e4 tu/drm/virtio: Fix tu_wait_fence timeout handling
Fixes two bugs in the WAIT_FENCE polling loop:
1. Break on timeout returned VK_SUCCESS because ret was read too late.
2. UINT64_MAX timeout_ns overflowed end_time, causing immediate exit.

Fix by reading rsp->ret before the timeout check and using
OS_TIMEOUT_INFINITE (like virtio_pipe_wait in freedreno) to avoid
overflow.

This prevents premature BO teardown during host-side fault recovery.

Fixes: f17c5297d7 ("tu: Add virtgpu support")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
(cherry picked from commit dad72b414b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
GKraats
286c245e98 crocus: Fix shader precompilation on Gen6 and higher
By default crocus precompiles shaders, to avoid stuttering at screens,
caused by compiling shaders at the drawing phase.
Unfortunately at intel Gen 6 and higher the precompiled version of the
fragment shaders is not used and every fragment shader is compiled twice.
These double fragment shaders also are added to the memory cache
and disk cache.
This is caused by setting wrong values to variables at the key during
precompiling at routine crocus_create_fs_state() at src/gallium/drivers/crocus/crocus_program.c,
which differ from values at crocus_populate_fs_key() at src/gallium/drivers/crocus/crocus_state.c.

This commit solves 3 problems:

it adjusts the predicted value 'input_slots_valid' at Gen 6
it adjusts the predicted value 'ignore_sample_mask_out' at Gen 6 and higher
it predicts the value 'multisample_fbo' , which helps if samplemask is used

Cc: mesa-stable
Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 686266d2f1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Valentine Burley
8a4dc04589 zink/ci: Remove Cezanne job
The devices will be repurposed for a different job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
(cherry picked from commit 4e4207e639)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
David Rosca
1b996fbde9 radv/video: Fix initializing rc structs with default rate control
Fixes: 32a02720a8 ("radv/video: Init session and update rate control in ControlVideoCoding")
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 3d0239cff9)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:43 +02:00
Tapani Pälli
83b9055811 drirc: use anv_disable_drm_ccs_modifiers for any GTK version
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15297
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit a76e3c2616)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Samuel Pitoiset
a1a37bcab0 radv: fix GPU hangs with PS epilogs and secondaries properly
The previous fix was incomplete because if the same graphics pipeline
and the same PS epilog are rebind after vkCmdExecuteCommands(), the PS
epilog state wouldn't be re-emitted, and it will use a wrong VA (in case
both fragment shader user SGPRs aren't similar either).

Resetting the PS epilog to NULL in the primary should prevent any
issues, but this tracking still need to be improved because it caused
two issues recently.

Fixes: 1a00587c44 ("radv: fix a GPU hang with PS epilogs and secondary command buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15176
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit a73fc90bcd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Timothy Arceri
c0c2df0d0e glcpp: fix paste within macro function expansion
Note the tests added in 89cd6df034 were wrong (confirmed in gcc)
I've updated them to the expected outcome and enabled the paste
test from 475222b022.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13863
Fixes: d5cd40343f ("Expand macro arguments before performing argument substitution.")

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
(cherry picked from commit 5f37490855)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Tapani Pälli
8a70e47d22 drirc: set anv_disable_subgroup_size_control for bg3
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15225
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/14501
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 4394e26f52)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Tapani Pälli
b039e6ba60 drirc/anv: add flag to disable VK_EXT_subgroup_size_control
This can be used to workaround problem cases with application
controlled subgroup size.

v2: removed intel_use_jay for stable branch

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c105366165)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Faith Ekstrand
b25cd86569 pan/ci: Mark couple of WSI crashes as flakes
I don't know why but these seem to fail only intermittantly now.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
(cherry picked from commit e166027e52)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Eric Engestrom
3a67c9acb1 .pick_status.json: Mark 3256fab5a3 as denominated
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Sagar Ghuge
3c3c94532a anv: Fix Wa_14021821874, Wa_14018813551, Wa_14026600921
StackSizePerRay is the RTDispatchGlobals::AsyncStackSize and
DisableRTGlobalsKnownValues is to interpret how many Max BVH levels we
need to use. It's not relevant to Vulkan, since we have just 2 fixed BVH
levels.

Fixes: cb423ee6 ("anv: Fix Wa_14021821874, Wa_14018813551, Wa_14026600921")
Fixes: c1a44e8d ("anv: force StackIDControl value for Wa_14021821874")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 7a627fa8f3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Lionel Landwerlin
22a9e59685 anv: fixup compute queue detection
I ran into this case where genX(cmd_buffer_emit_bt_pool_base_address)
was returning immediately because it considered an RCS engine
emulating a compute queue as neither a render nor a compute queue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit d581b7282b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Lionel Landwerlin
0ab24a2f24 anv: fix debug printfs on hang
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0932d0c7e0 ("anv/xe: rework set_lost handling in xe_exec_ioctl()")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c0c324fcb2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Lionel Landwerlin
89fe35475b anv: fix compute push constant allocations on pre Gfx12.5 platforms
MEDIA_CURBE_LOAD::CURBETotalDataLength needs to be 64B aligned.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 773fef12cd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Lionel Landwerlin
9bdca3b7a1 anv: avoid C23
For some reason the android builders started noticing...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit f6306198d0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
9f5e19e05a panvk: do not enable extension without required feature
The Vulkan spec states that if VK_KHR_shader_clock is supported,
shaderSubgroupClock is a required feature. So let's not enable that
extension unless we can...

Fixes: e9c2c32409 ("panvk: enable VK_KHR_shader_clock")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit c8ae72f51d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
092f5b01c2 panvk: do not enable extension without required feature
The Vulkan spec states that if VK_ARM_shader_core_builtins is supported,
shaderCoreBuiltins is a required feature. So let's not enable that
extension unless we can...

Fixes: dff1d91c64 ("panvk: Enable VK_ARM_shader_core_builtins")
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 8cb89853b8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
b7ce708f01 radeonsi: remove old, unsupported cap
This hasn't been supported for a long time.

Fixes: 420fe1e7f9 ("radeonsi: remove TGSI")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit 261cb0e9bf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
63faa0d700 nouveau: do not report unsupported feature
This hasn't been supported since the TGSI envvar was ripped out. When
converted to NIR, we don't see these instructions at all.

Fixes: c3cbe610df ("nouveau: Delete the NV50_PROG_USE_TGSI env var.")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit b062062430)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
06197643c1 pan/lib: emit high bits of buffer-size
We can't expose large texel-buffers if we don't emit the high bits.
Whoopsie!

Fixes: 4db7958edc ("pan/bi: Change texel buffer limits")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 57a80ff78c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Erik Faye-Lund
9501cafc50 pan/lib: fix up afbc and linear layout
A few cases of UINT32_MAX were missed, whoops.

Fixes: c2c91e78fd ("pan/layout: Allow bigger size/surface stride on v12+")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 69b8372fbf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Patrick Lerda
ead15a5202 r600: fix atomic_counter_post_dec
This change was tested on plam and cayman. Here are the tests fixed:
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-fs: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit 0deac18581)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Patrick Lerda
af76112ed9 r600: update vertex emit_varying_pos
This change adds a minimal support for gl_PointSize to
be used alongside gl_ClipDistance/gl_CullDistance.

This change was tested on palm and cayman. Here is the test fixed:
khr-gl4[5-6]/gl_spirv/spirv_validation_builtin_variable_decorations_test: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit 032a2bdc1e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Patrick Lerda
c785514d5e r600: fix atomic buffer offset
The atomic offset implementation was incomplete.

This change was tested on cayman, it fixes all the
variants of this test:
khr-gl4[2-6]/shader_atomic_counters/advanced-usage-multi-stage: fail pass
khr-gles31/core/shader_atomic_counters/advanced-usage-multi-stage: fail pass

Fixes: 06993e4ee3 ("r600: add support for hw atomic counters. (v3)")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit 48902771ad)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Patrick Lerda
5ec6772843 r600: fix alpha-to-coverage and alpha-to-one used together
This change is inspired by b56f47611a ("radeonsi: fix
alpha-to-coverage + alpha-to-one used together for
gfx6-10.3") and implements the same algorithm.

This change was tested on rv770, palm and cayman. Here are the tests fixed:
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one: fail pass
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one_write-z: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit 7513f48edf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:42 +02:00
Icenowy Zheng
ca1923a820 pvr: follow other drivers' practice for copying build ID
Previously the output length of pvr_get_driver_build_sha() is changed to
BUILD_ID_EXPECTED_HASH_LENGTH, but the array defined to receive its
output, the driver_build_sha array inside struct pvr_instance, is
declared with BLAKE3_KEY_LEN, which is longer than
BUILD_ID_EXPECTED_HASH_LENGTH.

This leads to uninitialized memory being accessed when creating
pipelineCacheUUID value, and the pipelineCacheUUID value would become
random in each run, defecting the purpose of it.

Refactor the code copying the build ID to follow other drivers: changing
the parameter from the buffer to the instance pointer, inserting a
static assert thanks to being able to retrieve the destination buffer
length (as an array inside the instance structure) and using
copy_build_id_to_sha1() to do the final copy.

Fixes: 6a42493c94 ("pvr: Use BUILD_ID_EXPECTED_HASH_LENGTH")
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Ella Stanforth <ella@igalia.com>
(cherry picked from commit 9870c8d8c4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00
David Rosca
342f9fb5da d3d12: Use HEVC RefPicSet order from frontend
It is correctly sorted in frontend since 779edc0759 ("frontends/va: Correctly derive HEVC StCurrBefore, StCurrAfter and LtCurr")

This fixes RefPicSetLtCurr order which was incorrectly sorted here.

Cc: mesa-stable
(cherry picked from commit 7a8721e95c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00
Janne Grunau
64f8339209 nir/gather_info: clear interpolation qualifiers only in fragment stage
Asahi wants the the interpolation qualifiers from the shader info in the
vertex shader. Clear them only in the fragment stage so they can
propagate back.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15288
Backport-to: 26.0
Fixes: a72704d0fb ("nir/gather_info: clear interpolation qualifiers before gathering")
Signed-off-by: Janne Grunau <j@jannau.net>
(cherry picked from commit 98a97cb413)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00
Karol Herbst
d10e31b725 mesa/st: do not advertise CL subgroup features on the GL side
Fixes: 2a5227981e ("gallium: add SUBGROUP_FEATURE bits for rotate and rotate_clustered")

Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit 9fb54a2092)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00
Matt Turner
f776afb2db intel/elk: Remove dead TXL_LZ/TXF_LZ opcodes
These opcodes were only emitted for Gen9+ hardware, but elk only targets
Gen8 and below.

Fixes: 05d78994a7 ("intel/elk: Remove Gfx9+ sampler messages and modes")
(cherry picked from commit d36a578bc0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00
Ryan Zhang
e1733d1b38 panvk: add VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL to host copy layouts
Add the missing layout which do not need implemented anything in
mali gpu.

Fixed: dEQP-VK.image.host_image_copy.properties.properties
unifiedImageLayouts feature is supported, but layout
VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL was not included in
VkPhysicalDeviceHostImageCopyProperties::pCopySrcLayouts.

Fixes: 1cd61ee ("panvk: implement VK_EXT_host_image_copy for linear color images")

Signed-off-by: Ryan Zhang <ryan.zhang@nxp.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit 62e7120384)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
2026-04-29 17:54:41 +02:00