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freedreno/drm/virtio: Fix wait_fence ret ordering

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ret was read after the timeout check, so breaking on timeout returned 0
instead of the actual fence status, potentially reporting a signaled
fence when it was still pending.

Fixes: 441f01e778 ("freedreno/drm/virtio: Drop blocking in host")

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
(cherry picked from commit 97baa27dad)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
This commit is contained in:
Valentine Burley 2026-04-22 13:39:18 +02:00 • committed by Eric Engestrom
parent b7560252e4
commit df7aa1241b
2 changed files with 3 additions and 3 deletions
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2
.pick_status.json
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@ -2484,7 +2484,7 @@
"description": "freedreno/drm/virtio: Fix wait_fence ret ordering",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "441f01e778184be8e5f99d3c40f47ee49402dd03",
"notes": null

4
src/freedreno/drm/virtio/virtio_pipe.c
View file

@ -138,11 +138,11 @@ virtio_pipe_wait(struct fd_pipe *pipe, const struct fd_fence *fence, uint64_t ti
if (ret)
goto out;
ret = rsp->ret;
if ((timeout != OS_TIMEOUT_INFINITE) &&
(os_time_get_nano() >= end_time))
break;
ret = rsp->ret;
} while (ret == -ETIMEDOUT);
out: