intel/elk: Remove dead TXL_LZ/TXF_LZ opcodes

These opcodes were only emitted for Gen9+ hardware, but elk only targets
Gen8 and below.

Fixes: 05d78994a7 ("intel/elk: Remove Gfx9+ sampler messages and modes")
(cherry picked from commit d36a578bc0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
This commit is contained in:
Matt Turner 2026-04-16 16:03:47 -04:00 committed by Eric Engestrom
parent e1733d1b38
commit f776afb2db
8 changed files with 3 additions and 24 deletions

View file

@ -4574,7 +4574,7 @@
"description": "intel/elk: Remove dead TXL_LZ/TXF_LZ opcodes",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "05d78994a763d220f69cb9770fcc6c4e9cb40275",
"notes": null

View file

@ -145,10 +145,8 @@ enum elk_opcode {
ELK_SHADER_OPCODE_TXD_LOGICAL,
ELK_SHADER_OPCODE_TXF,
ELK_SHADER_OPCODE_TXF_LOGICAL,
ELK_SHADER_OPCODE_TXF_LZ,
ELK_SHADER_OPCODE_TXL,
ELK_SHADER_OPCODE_TXL_LOGICAL,
ELK_SHADER_OPCODE_TXL_LZ,
ELK_SHADER_OPCODE_TXS,
ELK_SHADER_OPCODE_TXS_LOGICAL,
ELK_FS_OPCODE_TXB,

View file

@ -265,13 +265,11 @@ elk_fs_inst::is_control_source(unsigned arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:
@ -305,13 +303,11 @@ elk_fs_inst::is_payload(unsigned arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:
@ -878,13 +874,11 @@ elk_fs_inst::size_read(int arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:

View file

@ -830,9 +830,7 @@ namespace {
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:

View file

@ -847,15 +847,12 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, elk_fs_inst *inst, elk_op
bld.MOV(sources[length++], elk_imm_ud(0));
break;
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
/* Unfortunately, the parameters for LD are intermixed: u, lod, v, r. */
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], coordinate);
if (op != ELK_SHADER_OPCODE_TXF_LZ) {
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], lod);
}
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], lod);
for (unsigned i = 1; i < coord_components; i++) {
sources[length] = retype(sources[length], payload_signed_type);

View file

@ -278,9 +278,7 @@ elk_schedule_node::set_latency_gfx7(const struct elk_isa_info *isa)
case ELK_SHADER_OPCODE_TEX:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
/* 18 cycles:
* mov(8) g115<1>F 0F { align1 WE_normal 1Q };
* mov(8) g114<1>F 0F { align1 WE_normal 1Q };

View file

@ -216,14 +216,10 @@ elk_instruction_name(const struct elk_isa_info *isa, enum elk_opcode op)
return "txf";
case ELK_SHADER_OPCODE_TXF_LOGICAL:
return "txf_logical";
case ELK_SHADER_OPCODE_TXF_LZ:
return "txf_lz";
case ELK_SHADER_OPCODE_TXL:
return "txl";
case ELK_SHADER_OPCODE_TXL_LOGICAL:
return "txl_logical";
case ELK_SHADER_OPCODE_TXL_LZ:
return "txl_lz";
case ELK_SHADER_OPCODE_TXS:
return "txs";
case ELK_SHADER_OPCODE_TXS_LOGICAL:

View file

@ -294,13 +294,11 @@ vec4_instruction::can_do_writemask(const struct intel_device_info *devinfo)
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4: