anv: do not use resource barrier with split barriers

Fixes failing CTS tests using asymmetric and non-asymmetric (regular)
split barriers.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15310
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit bdaf8b6b39)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
This commit is contained in:
Tapani Pälli 2026-04-28 07:41:47 +03:00 committed by Eric Engestrom
parent 3591e2b4cd
commit f7aeeb194d
2 changed files with 11 additions and 14 deletions

View file

@ -654,7 +654,7 @@
"description": "anv: do not use resource barrier with split barriers",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

View file

@ -1937,22 +1937,19 @@ can_use_resource_barrier(const struct intel_device_info *devinfo,
engine_class != INTEL_ENGINE_CLASS_COMPUTE)
return false;
/* Wa_18039014283:
/* Split barriers (VkEvent) are tricky to support with resource barrier.
*
* RESOURCE_BARRIER instructions with a Type=Signal, SignalStage=GPGPU are
* not functional. Since the main use case for this is VkEvent and VkEvent
* might not have exactly matching informations on both signal/wait sides
* (see
* https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/vkCmdWaitEvents.html),
* this is somewhat unusable.
* From Bspec 56054 (RESOURCE_BARRIER_BODY):
* "Split barrier pairs need to have identical values for all
* fields other than the barrier type."
*
* We're also seeing other problems with this, for example with
* dEQP-VK.synchronization2.op.single_queue.event.write_blit_image_read_copy_image_to_buffer.image_128_r32_uint
* So HW might be more broken than expected.
* Vulkan does not require signal and wait barriers to have identical values, see:
* https://registry.khronos.org/vulkan/specs/1.3-extensions/man/html/vkCmdWaitEvents.html
*
* This rule handles also Wa_18039014283.
*/
if (intel_needs_workaround(devinfo, 18039014283) &&
(!anv_address_is_null(signal_addr) ||
!anv_address_is_null(wait_addr)))
if (!anv_address_is_null(signal_addr) ||
!anv_address_is_null(wait_addr))
return false;
/* The HW doesn't support signaling from the top of pipeline */