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intel/elk: Remove dead TXL_LZ/TXF_LZ opcodes
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These opcodes were only emitted for Gen9+ hardware, but elk only targets
Gen8 and below.

Fixes: 05d78994a7 ("intel/elk: Remove Gfx9+ sampler messages and modes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41009>
This commit is contained in:
Matt Turner 2026-04-16 16:03:47 -04:00 • committed by Marge Bot
parent 6856ebe00d
commit d36a578bc0
7 changed files with 2 additions and 23 deletions
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2
src/intel/compiler/elk/elk_eu_opcodes.h
View file

@ -145,10 +145,8 @@ enum elk_opcode {
ELK_SHADER_OPCODE_TXD_LOGICAL,
ELK_SHADER_OPCODE_TXF,
ELK_SHADER_OPCODE_TXF_LOGICAL,
ELK_SHADER_OPCODE_TXF_LZ,
ELK_SHADER_OPCODE_TXL,
ELK_SHADER_OPCODE_TXL_LOGICAL,
ELK_SHADER_OPCODE_TXL_LZ,
ELK_SHADER_OPCODE_TXS,
ELK_SHADER_OPCODE_TXS_LOGICAL,
ELK_FS_OPCODE_TXB,

6
src/intel/compiler/elk/elk_fs.cpp
View file

@ -247,13 +247,11 @@ elk_fs_inst::is_control_source(unsigned arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:
@ -287,13 +285,11 @@ elk_fs_inst::is_payload(unsigned arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:
@ -860,13 +856,11 @@ elk_fs_inst::size_read(int arg) const
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4:

2
src/intel/compiler/elk/elk_ir_performance.cpp
View file

@ -812,9 +812,7 @@ namespace {
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:

7
src/intel/compiler/elk/elk_lower_logical_sends.cpp
View file

@ -829,15 +829,12 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, elk_fs_inst *inst, elk_op
bld.MOV(sources[length++], elk_imm_ud(0));
break;
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
/* Unfortunately, the parameters for LD are intermixed: u, lod, v, r. */
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], coordinate);
if (op != ELK_SHADER_OPCODE_TXF_LZ) {
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], lod);
}
sources[length] = retype(sources[length], payload_signed_type);
bld.MOV(sources[length++], lod);
for (unsigned i = 1; i < coord_components; i++) {
sources[length] = retype(sources[length], payload_signed_type);

2
src/intel/compiler/elk/elk_schedule_instructions.cpp
View file

@ -256,9 +256,7 @@ elk_schedule_node::set_latency_gfx7(const struct elk_isa_info *isa)
case ELK_SHADER_OPCODE_TEX:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
/* 18 cycles:
* mov(8) g115<1>F 0F { align1 WE_normal 1Q };
* mov(8) g114<1>F 0F { align1 WE_normal 1Q };

4
src/intel/compiler/elk/elk_shader.cpp
View file

@ -198,14 +198,10 @@ elk_instruction_name(const struct elk_isa_info *isa, enum elk_opcode op)
return "txf";
case ELK_SHADER_OPCODE_TXF_LOGICAL:
return "txf_logical";
case ELK_SHADER_OPCODE_TXF_LZ:
return "txf_lz";
case ELK_SHADER_OPCODE_TXL:
return "txl";
case ELK_SHADER_OPCODE_TXL_LOGICAL:
return "txl_logical";
case ELK_SHADER_OPCODE_TXL_LZ:
return "txl_lz";
case ELK_SHADER_OPCODE_TXS:
return "txs";
case ELK_SHADER_OPCODE_TXS_LOGICAL:

2
src/intel/compiler/elk/elk_vec4.cpp
View file

@ -276,13 +276,11 @@ vec4_instruction::can_do_writemask(const struct intel_device_info *devinfo)
case ELK_FS_OPCODE_TXB:
case ELK_SHADER_OPCODE_TXD:
case ELK_SHADER_OPCODE_TXF:
case ELK_SHADER_OPCODE_TXF_LZ:
case ELK_SHADER_OPCODE_TXF_CMS:
case ELK_SHADER_OPCODE_TXF_CMS_W:
case ELK_SHADER_OPCODE_TXF_UMS:
case ELK_SHADER_OPCODE_TXF_MCS:
case ELK_SHADER_OPCODE_TXL:
case ELK_SHADER_OPCODE_TXL_LZ:
case ELK_SHADER_OPCODE_TXS:
case ELK_SHADER_OPCODE_LOD:
case ELK_SHADER_OPCODE_TG4: