Commit graph

222991 commits

Author SHA1 Message Date
Vishnu Vardan
f046e4d2fe mesa/st: remove has_pipeline_stat from st_context
has_pipeline_stat is a direct copy of
screen->caps.query_pipeline_statistics.
Read the cap from the screen directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:42 +00:00
Vishnu Vardan
e4535b5c07 mesa/st: remove has_single_pipe_stat from st_context
has_single_pipe_stat is a direct copy of
screen->caps.query_pipeline_statistics_single.
Read the cap from the screen directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:41 +00:00
Vishnu Vardan
69aa46f63e mesa/st: remove has_occlusion_query from st_context
has_occlusion_query is a direct copy of
screen->caps.occlusion_query.
Read the cap from the screen directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:41 +00:00
Vishnu Vardan
de3a22ba1d mesa/st: remove has_indirect_partial_stride from st_context
has_indirect_partial_stride is a direct copy of
screen->caps.multi_draw_indirect_partial_stride.
Read the cap from the screen directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:40 +00:00
Vishnu Vardan
ec13dc4a38 mesa/st: remove has_multi_draw_indirect from st_context
has_multi_draw_indirect is a direct copy of
screen->caps.multi_draw_indirect.
Read the cap from the screen directly at each call site.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:40 +00:00
Vishnu Vardan
3b092a7950 mesa/st: remove has_time_elapsed from st_context
has_time_elapsed is a direct copy of screen->caps.query_time_elapsed.
Read the cap from the screen directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:40 +00:00
Vishnu Vardan
9455710aaf mesa/st: remove emulate_gl_clamp from st_context
emulate_gl_clamp is the negation of screen->caps.gl_clamp.
Replace all call sites with !screen->caps.gl_clamp directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:39 +00:00
Vishnu Vardan
22c321327c mesa/st: remove redundant needs_texcoord_semantic from st_context
needs_texcoord_semantic is a direct copy of screen->caps.tgsi_texcoord.
Read the cap from the screen directly at each call site.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:39 +00:00
Vishnu Vardan
a080330b94 mesa/st: remove redundant has_shareable_shaders from st_context
has_shareable_shaders is a direct copy of screen->caps.shareable_shaders.
Read the cap from the screen directly at each call site.

Fix st_format_test which was missing st_context.screen initialization,
exposed by this change.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:39 +00:00
Vishnu Vardan
91e4c9e33b mesa/st: remove redundant astc_void_extents_need_denorm_flush from st_context
This cap is a direct alias of screen->caps.astc_void_extents_need_denorm_flush.
Replace all st_context usages with the screen cap directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:38 +00:00
Vishnu Vardan
4fd17e53f3 mesa/st: remove redundant has_stencil_export from st_context
This cap is a direct alias of screen->caps.shader_stencil_export.
Replace all st_context usages with the screen cap directly.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41184>
2026-05-25 17:22:38 +00:00
Samuel Pitoiset
e2e7fce6e9 radv: rename radv_zero_vram to vk_zero_vram
More common and this implicitly enables this for Path Of Exile and X4
Foundations. Though, zero VRAM allocs is already the default in AMDGPU,
so that doesn't change anything in practice (except for very old
kernels).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41735>
2026-05-25 16:49:28 +00:00
Samuel Pitoiset
e2631eca0f radv: close the local fd immediately after the winsys is created
Some checks are pending
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libdrm dups the fd internally, so local_fd and get_fd() are different
fd number but they point to the same file descriptor. Close it right
after the amdgpu device is initialized to avoid keeping two fds open
for the same thing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41753>
2026-05-25 16:26:19 +00:00
Thong Thai
25ba73ef6e meson: Make with_gfx_compute depend on video encode support
Update the with_gfx_compute flag so decode-only builds do not
unnecessarily compile gfx/compute code.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41493>
2026-05-25 15:44:12 +00:00
Thong Thai
77ca4da673 gallium/auxiliary: Simplify auxiliary for non-gfx/compute builds
Removes gfx, tgsi and driver_trace code from auxiliary for
non-gfx/compute builds, to reduce the number of files that gets
compiled.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41493>
2026-05-25 15:44:12 +00:00
Thong Thai
931dba218e nir: Only build NIR headers when with_gfx_compute is false
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41493>
2026-05-25 15:44:12 +00:00
squidbus
c07a203ef4 kk: Enable code formatting enforcement
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41784>
2026-05-25 15:30:32 +00:00
Collabora's Gfx CI Team
01faf29bef Uprev VVL to 36187ee9f2074609d3ec56fa1a315c191366b688
d55be6264a...36187ee9f2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41611>
2026-05-25 14:49:29 +00:00
Karol Herbst
a9da8ec49b nvk: enable VK_KHR_shader_fma
Some checks are pending
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This allows rusticl to make use of the native fma instructions giving us
better OpenCL performance.

e.g. ProjectPhysX_OpenCL-Benchmark on my GA102:

FP32 0.610 -> 11.474 TFLOPs/s

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41720>
2026-05-25 14:27:51 +00:00
squidbus
22f61a4eb5 kk: Fix pre-compiled compute grid size
Vulkan dispatch commands should multiply group count by local size,
but pre-compiled dispatches should not. For example, the predicate
indirect shader has a local size of 32 and a grid size equal to the
max draw count, which was resulting in a dispatch total grid size of
(max_draw_count * 32), overrunning the buffer.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41740>
2026-05-25 14:08:30 +00:00
squidbus
b8f0fe6bdc kk: Allocate temporary command memory from pool
Ported from HoneyKrisp upload pools, with some adaptations such as
providing the MTLBuffer and offset for use with certain commands.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41740>
2026-05-25 14:08:30 +00:00
Marek Olšák
1b45a8aee2 radv: select frag_coord_xy and pixel_coord conditionally based on dynamic state
the code explains it

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> (shader parts)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41689>
2026-05-25 13:38:08 +00:00
Marek Olšák
22e40edfb9 radv: move SPI_PS_INPUT_ENA emission into radv_emit_ps_state
The register values will depend on new fields in PS_STATE and it doesn't
seem like dynamic state belongs in radv_emit_fragment_shader_state.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41689>
2026-05-25 13:38:07 +00:00
Marek Olšák
caef0aebba radv: remove dead load_sample_pos code
lowered by radv_nir_lower_opt_fs_frag_pos

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41689>
2026-05-25 13:38:06 +00:00
Marek Olšák
6cd04ca6e5 radv: add a pass that selects either frag_coord_xy or pixel_coord, but not both
to reduce the number of initialized PS VGPRs, increasing the PS wave launch
rate.

The pass will have more RADV-specific stuff.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41689>
2026-05-25 13:38:06 +00:00
Marek Olšák
a5ba7694b5 nir/opt_frag_coord_to_pixel_coord: factor out helper nir_all_uses_of_float_are_integer
to be used in a new RADV pass

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41689>
2026-05-25 13:38:05 +00:00
Timur Kristóf
b0b61a4bf8 nir/divergence: Consider ttmp_register_amd and load_scalar_arg_amd as workgroup divergent
These are SGPR inputs, so they are uniform in subgroups but may
have different values in different subgroups.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41584>
2026-05-25 12:29:27 +00:00
Timur Kristóf
dd5b6f3940 nir/divergence: Consider uniformity of read_invocation accross subgroups
These intrinsics are generally divergent between different
subgroups, but they can be uniform when all their sources
are also uniform.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41584>
2026-05-25 12:29:27 +00:00
Timur Kristóf
5b385b703b nir/divergence: Consider ACCESS_SMEM_AMD divergence across subgroups
AMD SMEM instructions are always uniform within a subgroup,
but they may be divergent across subgroups, ie. each subgroup
may have a different value from the same SMEM instruction.

This needs to be considered for divergence across subgroups
as well as for vertex divergence, because vertices of the
same primitive may be split between different waves.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41584>
2026-05-25 12:29:27 +00:00
Georg Lehmann
f43bc8e8be radv: support VK_KHR_shader_fma
Some checks are pending
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41649>
2026-05-25 11:50:38 +00:00
Georg Lehmann
3ea594f42b ac/llvm: never create ffmaz for broken llvm
The workaround wasn't proper fused ffma.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41649>
2026-05-25 11:50:38 +00:00
Georg Lehmann
015b1d9e6d ac/llvm: don't assert on 32bit ffma before gfx9
Yes it's slow, but it's better than nothing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41649>
2026-05-25 11:50:38 +00:00
Georg Lehmann
a92d0356eb nir: seperate ffmaz from has_fmulz
There is no hardware which supports ffmaz with denorms.
We also need this to be seperate because there is AMD hardware
with ffma but not ffmaz.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41649>
2026-05-25 11:50:38 +00:00
Georg Lehmann
19e56904f2 aco/optimizer: only create v_fma_legacy_f32 when denorms are disabled
For some reasons, this instruction always flushes denorms.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41649>
2026-05-25 11:50:38 +00:00
Patrick Lerda
ea54dea3a4 i915: fix emit_hw_vertex() unbounded memory access
This change adds the DRAW_ATTR_NONEXIST functionality
which fixes the memory access issue.

For instance, this issue is triggered with "piglit/bin/glsl-routing -auto -fbo":
==8384==ERROR: AddressSanitizer: heap-use-after-free on address 0xa11dfd84 at pc 0xae573fbd bp 0xbf87f688 sp 0xbf87f67c
READ of size 4 at 0xa11dfd84 thread T0
    #0 0xae573fbc in emit_hw_vertex ../src/gallium/drivers/i915/i915_prim_emit.c:92
    #1 0xae574ab0 in emit_prim ../src/gallium/drivers/i915/i915_prim_emit.c:154
    #2 0xae574ab0 in setup_tri ../src/gallium/drivers/i915/i915_prim_emit.c:160
    #3 0xad65d322 in do_triangle ../src/gallium/auxiliary/draw/draw_pipe.c:173
    #4 0xad65d322 in pipe_run_linear ../src/gallium/auxiliary/draw/draw_decompose_tmp.h:181
    #5 0xad663375 in draw_pipeline_run_linear ../src/gallium/auxiliary/draw/draw_pipe.c:337
    #6 0xad86d9ac in pipeline ../src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c:476
    #7 0xad86d9ac in llvm_pipeline_generic ../src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c:701
    #8 0xad86ed75 in llvm_middle_end_linear_run ../src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c:784
    #9 0xad6aaaee in vsplit_segment_simple_linear ../src/gallium/auxiliary/draw/draw_pt_vsplit_tmp.h:223
    #10 0xad6aaaee in vsplit_run_linear ../src/gallium/auxiliary/draw/draw_split_tmp.h:64
    #11 0xad68a74b in draw_pt_arrays ../src/gallium/auxiliary/draw/draw_pt.c:161
    #12 0xad68b7ca in draw_pt_arrays_restart ../src/gallium/auxiliary/draw/draw_pt.c:430
    #13 0xad68b7ca in draw_instances ../src/gallium/auxiliary/draw/draw_pt.c:491
    #14 0xad68ce0a in draw_vbo ../src/gallium/auxiliary/draw/draw_pt.c:628
    #15 0xae5651d4 in i915_draw_vbo ../src/gallium/drivers/i915/i915_context.c:115
    #16 0xae5651d4 in i915_draw_vbo ../src/gallium/drivers/i915/i915_context.c:51
    #17 0xac7f50d3 in _mesa_draw_arrays ../src/mesa/main/draw.c:1204

Fixes: 247cee92df ("i915g: replace "uint" with normal uint32_t.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27571>
2026-05-25 11:36:07 +00:00
Karol Herbst
d1af3d95c7 gallium: add fp16_no_denorms cap
Rusticl has to know whether a driver always flushes fp16 denorms in order
to set the correct nir float execution mode.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41703>
2026-05-25 11:11:50 +00:00
Karol Herbst
5a8d4b28b5 rusticl/spirv: properly set float execution mode at spirv_to_nir time
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41703>
2026-05-25 11:11:50 +00:00
Karol Herbst
e6ed0094af rusticl/spirv: silence GenericPointer cap warning
Not much we can do about it anyway.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41703>
2026-05-25 11:11:50 +00:00
Karol Herbst
3cb3e9890d rusticl/spirv: add SPIRVToNirOptions type
Makes it easier to pass around the options needed.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41703>
2026-05-25 11:11:49 +00:00
squidbus
37faa2c56f kk: Fix some missed NIR debug asserts
Some checks are pending
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* `msl_ensure_vertex_point_size_output` is missing some NIR pass logic
  after being converted to use lowered I/O, and only needs to be called
  for point primitives.

* `nir_separate_merged_clip_cull_io` requires the `compact_arrays` NIR
  option be enabled for compact clip/cull distance arrays.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41741>
2026-05-25 02:56:26 -07:00
Juan A. Suarez Romero
3df406633e vc4/ci: update expected results
Add new failures and timeouts.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41778>
2026-05-25 10:22:12 +02:00
Karol Herbst
64eba87a67 rusticl: more intel compat stuff
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41475>
2026-05-25 01:07:44 +00:00
Karol Herbst
b618cbb5e9 rusticl/kernel: handle nir shader compilation failures gracefully
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41475>
2026-05-25 01:07:44 +00:00
Mary Guillemard
b8fa4fd258 nak: Allow YY swizzle for SM20 and SM32 asserts
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We now handle that specific form on F2F and F2I but were still
asserting.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: 67bfbc7535 ("nak: rework swizzling on scalar FP16 ops")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41771>
2026-05-24 12:48:01 +02:00
Vinson Lee
e0eefe5999 gfxstream: codegen: drop const from let-param scalar cast
Some checks are pending
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Let-parameters (e.g. hasRasterization, hasTessellation for
VkGraphicsPipelineCreateInfo) are local variables initialized by
reading a value from the stream. The codegen was creating them
with isConst=True, which caused streamPrimitive() to emit a cast
like:

    hasRasterization = (const uint32_t)vkStream->getBe32();

The const qualifier on a scalar rvalue cast result is discarded
and triggers -Werror=ignored-qualifiers once that flag is enabled
for Soong compatibility, breaking the build:

    src/gfxstream/guest/vulkan_enc/goldfish_vk_marshaling_guest.cpp:
    In function 'void gfxstream::vk::unmarshal_VkGraphicsPipelineCreateInfo(
    VulkanStreamGuest*, VkStructureType, VkGraphicsPipelineCreateInfo*)':
    goldfish_vk_marshaling_guest.cpp:4202:28: error: type qualifiers
    ignored on cast result type [-Werror=ignored-qualifiers]
     4202 |         hasRasterization = (const uint32_t)vkStream->getBe32();
          |                            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    goldfish_vk_marshaling_guest.cpp:4207:27: error: type qualifiers
    ignored on cast result type [-Werror=ignored-qualifiers]
     4207 |         hasTessellation = (const uint32_t)vkStream->getBe32();
          |                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    cc1plus: some warnings being treated as errors

Mark the let-param as non-const since it is a local that gets
assigned.

Fixes: 190ce8280f ("meson: Add Soong compatibility compiler flags to Vulkan drivers")
Assisted-by: Claude Code (Opus 4.7)
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gurchetan Singh <gurchetan.singh.foss@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41763>
2026-05-23 06:54:37 +00:00
Caio Oliveira
c88e30f0e4 anv, brw: Use previous shader VUE map for FS input layout when available
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The FS compilation needs the VUE map from the previous stage when the FS
has more inputs than SBE_SWIZ can remap.  Recomputing a VUE map just
from FS inputs loses certain slots like multiview slots and extra
position slots (for primitive replication), so high-numbered attributes
can read the wrong source.

When available, pass the previous stage VUE map to the FS compilation
and use it.  Make sure that the payload is sized based on what is read,
in case the previous stage has more outputs than FS reads.

Bugs did not surface when there were just 16 or fewer varying inputs,
because the driver can program SBE_SWIZ to translate the positions in
the previous shader VUE into what the FS wants.  For more inputs, this
mapping is not used, and the FS must use the exact same slots.

Note this is not a problem for pipeline libraries because they use
a different fixed layout.  This is also not an issue with
EXT_shader_object because multiview draws are not allowed with that
extension.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41747>
2026-05-23 05:17:37 +00:00
Caio Oliveira
3ded84870f spirv: Stop warning about ignored invalid ArrayStride decorations
In practice, these warnings produce more noise than signal.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41758>
2026-05-23 04:39:46 +00:00
Nanley Chery
d74a03a70d anv: Flush previous aux-mode changes
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
If the aux-usage changes, we need to flush out the previous mode from
the cache (see iris's flush_previous_aux_mode()).

I ran into this while testing layout-based compression toggling with the
Hogwarts Legacy trace on DG2. The trace exhibited graphical corruption
unless the DATA_CACHE was flushed.

On an unmodified driver, this currently only affects transitions from
AUX_NONE->AUX_CCS_D.

Backport-to: *
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41034>
2026-05-22 20:51:27 +00:00
Nanley Chery
c49674188e anv: Move storage check out of CCS-compat helper
Provides clearer reasons for INTEL_DEBUG=perf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41034>
2026-05-22 20:51:27 +00:00
Nanley Chery
4b9561c733 anv: Allow CCS on more storage images for gfx12.5
To do this, we use a heuristic that depends on the image format and size
(see HSD 18014810884).

Average of two runs on an A750 from the performance CI:

* Naraka    +0.89%
* TWWH3     +0.45%
* Control   +0.37%
* Cyberpunk +0.35%

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41034>
2026-05-22 20:51:27 +00:00