Commit graph

198209 commits

Author SHA1 Message Date
Samuel Pitoiset
ab64109c01 radv/sqtt: delay VMID reservation at capture time
If two devices/instances are created, the VMID reservation will just
fail. It seems fine as long as it's reserved before SPM is used.

Fixes: a7a4abc8d8 ("radv: Move VMID reservation to vkCreateDevice")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Samuel Pitoiset
25b6338eff radv: fix capturing performance counters with SPM
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14333
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Samuel Pitoiset
dae41919b9 ac/sdma: fix stencil only copies on GFX9
Use the correct pitch per elements for stencil only surfaces.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Konstantin Seurer
b135da68fd radv: Fix crash if proceed comes before initialize
"initialize" can be NULL if the rq_proceed was visited before
rq_initialize.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14626
cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 58a35647e1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Yiwei Zhang
0c5a8a3af5 venus: fix aliased image memory requirement caching
The spec doesn't guarantee that the aliased and non-alised image shares
the same memory requirement.

Fixes: 63cac09d74 ("venus: improve image memory requirement cache for image aliasing")
(cherry picked from commit 2e683eb738)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Marek Olšák
8d6c1b6abf nir/clip_cull_distance_utils: fix assertion failures with GL_EXT_mesh_shader
Those outputs are never compact in GLSL mesh shaders. The assertions might
not be needed.

Cc: mesa-stable

Reviewed-by: Qiang Yu <yuq825@gmail.com>
(cherry picked from commit bba2536bb0)

Conflicts:
	src/compiler/nir/nir_lower_clip_cull_distance_array_vars.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
730bbfc804 brw: fix derivatives on non 32bit floats
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14600
Meh'd-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>

(cherry picked from commit 081c5bc6a5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
b4c2042b06 brw: enable SIMD32 compute shaders with ray queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11020
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit a97b01801a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
c381c5d717 brw: enable topology opcodes in SIMD32
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit b996b03f21)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
31e993831f brw: handle lowering of a couple of opcodes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit 286073f6eb)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
dad71b4dea brw: enable ray query spilling in SIMD32
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit 2fa09500a2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
5f119bb7af anv/brw: prep work for SIMD32 ray queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit 6d19b898e7)

Conflicts:
	src/intel/compiler/brw/brw_lower_logical_sends.cpp

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Lionel Landwerlin
4bdf4f3e89 nir: add missing divergence handling for ray_query_global_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit c84760a185)

Conflicts:
	src/compiler/nir/nir_divergence_analysis.c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Ian Romanick
51d4875dbb nir/algebraic: Detect missing f on F-strings
Missing f in other cases seems to be caught either elsewhere in the
script or by the C compiler.

Fixes: c49d6e0480 ("nir/algebraic: Elide range clamping of f2u sources")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit aba079b3af)

Conflicts:
	src/compiler/nir/nir_algebraic.py

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Pierre-Eric Pelloux-Prayer
34ca0c3fa2 mesa: add assert to validate the no atomic path
Comparing the ctx values and then updating the refcounts is not
thread-safe so add an assert to make sure the ctx wasn't updated
by another thread (via detach_ctx_from_buffer).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 090f4d9a5d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Pierre-Eric Pelloux-Prayer
302ebe2082 Revert "glthread: mark internal bufferobjs for the ctx they belong to"
This reverts commit 45b6aa1eb7.

This is not thread safe and will lead to buffer leaks, eg:

[threadA] _mesa_reference_buffer_object_       ctx=0x60bc07fa33f0 buf=0x60bc09b90020 CtxRefCount-=993187
[threadB] _mesa_glthread_release_upload_buffer ctx=0x60bc07fa33f0 buf=0x60bc09b90020 ref=7768 CtxRefCount=993212 -> 954
[threadB] _mesa_glthread_upload                ctx=0x60bc07fa33f0 buf=0x60bc09eb7d00 CtxRefCount=1000000
[threadA] _mesa_reference_buffer_object_       ctx=0x60bc07fa33f0 buf=0x60bc09b90020 CtxRefCount-=993186
 ../src/mesa/main/bufferobj.h:201: _mesa_reference_buffer_object_: Assertion `oldObj->Ctx == ctx' failed.

The assert is one added by the previous commit.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14483
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 68ef044b3b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Mike Blumenkrantz
a058d3b074 zink: explicitly null pipe_resource::next when creating transients
this otherwise blows up the aux resources

cc: mesa-stable

(cherry picked from commit 34ba521acd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:52 -08:00
Mike Blumenkrantz
86752ce4e8 zink: create new transient image if the sample count doesn't match
otherwise this will keep reusing the previous transient

cc: mesa-stable

(cherry picked from commit 9fd8041d24)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Mike Blumenkrantz
067cbd9d82 zink: delete all the no-op checks when rewriting clears
there's no harm in calling this on a no-op, and generally if
this function is called then it won't be a no-op. plus most of
these checks are broken in some way

cc: mesa-stable

(cherry picked from commit 193b7cb29d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Lakshman Chandu Kondreddy
58a09138d3 dri: Add R32F,RG32F,RGBA32F format mappings for DRIImage
Add pipe format to sized internal format mappings for R32F,
RG32F and RGBA32F in the DRIImage format table. This fixes shader
image store operations on EGL images imported from DMA-BUF with
respective DRM formats.

Without these mappings, DMA-BUF imported textures received base internal
formats instead of sized internal formats, causing shader image unit
validation to fail and DispatchCompute write zeroes on compute shader
imageStore operation.

Fixes: 6d3f266406 ("dri: Add additional 16/32b float/int formats")
Signed-off-by: Lakshman Chandu Kondreddy <lkondred@qti.qualcomm.com>
(cherry picked from commit ffb5d5d224)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Yiwei Zhang
a39cc49adf venus: workaround to consider ALIAS for image mem req cache
ANV can return different memory requirements with and w/o the ALIAS bit.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/14671 for details.

Meanwhile, venus has a driver side cache for image memory requirements.
As blessed per spec for memory aliasing, venus strips the ALIAS bit when
populating the cache key. Because of the use of imageless mem req query,
the ALIAS mem req now can hit the cache first, leaving a smaller/relaxed
requirement in the cache...busted.

Venus is unable to fix ANV behavior behind the scene, so this workaround
is only to align Venus behavior with ANV to not suffer from Venus-only
rendering artifacts.

Cc: mesa-stable
(cherry picked from commit c2c9266fed)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Icenowy Zheng
fec205f2ed mesa: fix GL_INVALID_OPERATION when releasing buffer in GLES1/2 ctx
The Function glInternalReleaseBufferMESA is called whenever a
intermediate buffer is used by MESA internal and being released, however
it's only exported for GLES3, which leads to drawing w/o VBO not
operational for GLES1/2.

Fixes invalid operation warning in `glmark2-es2 -b build:use-vbo=false` for
GLES2 HW / any HW with MESA_GLES_VERSION_OVERRIDE=2.0 .

VBO-less drawing is possible for GLES 1.0 too, so this function is also
exported with GLES1. Tested on GLES1 with mesa-demos gears demo with
VBO allocation commented out.

Fixes: ae75b59cb5 ("glthread, tc: Fix buffer release with glthread and tc")
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
(cherry picked from commit ba43568f4b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Icenowy Zheng
3936155db6 mesa: fix GL_INVALID_OPERATION with GLES1/2 + Kopper
Kopper draw codepath calls an internal helper called
InternalInvalidateFramebufferAncillaryMESA, which is currently only
exported for GLES3 contexts.

This leads to a warning when the underlying Vulkan driver capability
isn't enough for GLES3 or GLES version number is forced to 2.0 or the
program is a GLES1 one.

Export this internal helper for GLES1/2 too.

Fixes: 0c7994bb2d ("mapi: add InternalInvalidateFramebufferAncillaryMESA")
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
(cherry picked from commit f1d199285a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Icenowy Zheng
93b090dda4 mesa: workaround GL_INVALID_OPERATION in GLES 2.0 draws
Mesa internally converts some draw calls to DrawArraysInstancedBaseInstance
or DrawElementsInstancedBaseVertexBaseInstance, which are only available
in GLES contexts via GL_EXT_base_instance, a GLES3-only extension.

Export these two functions into the internal namespace for GLES 2.0
contexts too.

This fixes black screen for `glmark2-es2 -b build:use-vbo=false` (which is
the first test item for glmark2 auto test sequence) on GLES 2 HW / GLES
3 HW with MESA_GLES_VERSION_OVERRIDE=2.0 .

Fixes: 7c1f8b63ad ("glthread: work around GL_INVALID_OPERATION with OpenGL ES 1.x draws")
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
(cherry picked from commit 2c770a8dce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
llyyr
fd1967317d vulkan/wsi/headless: implement vkReleaseSwapchainImagesKHR for headless
We need to support this if we advertise KHR_swapchain_maintenance1

Cc: mesa-stable
Signed-off-by: llyyr <llyyr.public@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
(cherry picked from commit c3763b12e2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
llyyr
ac572e6009 vulkan/wsi/headless: add stub for VkSurfacePresentScalingCapabilitiesKHR
Similar to last MR, since we advertise support for
KHR_swapchain_maintenance1, we need to advertise this

Cc: mesa-stable
Signed-off-by: llyyr <llyyr.public@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
(cherry picked from commit a1dd7eec87)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
llyyr
a95ee25b13 vulkan/wsi/headless: populate VkSurfacePresentModeCompatibilityKHR
Previously, we ignored this struct which caused VVL to treat the
compatible mode list as NULL, causing false positive validation errors
on headless applications.

Closes: #14622

Cc: mesa-stable
Signed-off-by: llyyr <llyyr.public@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
(cherry picked from commit 9cd5a4849a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Alyssa Rosenzweig
1e52e81180 agx: fix SSA repair with phis with constants
For large constants inlined into phis, this would overread the remap[] array,
which could crash. No CTS tests affected though.

Christoph found the bug and fixed it for Bifrost over in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305. I just did a
quick CTS run of the obvious AGX backport over this morning's breakfast.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
(cherry picked from commit e4520b1dda)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Faith Ekstrand
c24849fd03 pan/bi: Mark whole flat variables
Otherwise, we'll only mark the first location for matrix and array
variables.  Ideally, someone would split these before we get here but we
should at least be correct.

Cc: mesa-stable
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 871875d0ce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Faith Ekstrand
cdc1a74977 panvk/csf: Stop calling blend_emit_descs() with no FS
This is what the JM code is doing and it lets us assume we always have a
fragment shader.  Right now, we're already making that assumption, we
just haven't been bitten by it yet because no one has tried to use a
shader-requiring blend configuration with no FS yet.

Cc: mesa-stable
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 9cab0c4bf0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Caio Oliveira
aac49e31f1 brw: Fix and properly use increment_a64_address()
Since the move to MEMORY_*_LOGICAL the result value was being ignored, so
change to use that.

Since the conversion to use new registers, some issues were introduced:
- Even with `has_64bit_int` ADD with 64-bit immediate value is not supported;
- `dst_high` was not being filled if there was no overflow;
- Only `dst_low` returned.

Found when writing some new code involving large block loads.

Fixes: b79e85a93f ("brw: always use new registers for load address increments")
Fixes: b55f77161d ("intel/brw: Switch to emitting MEMORY_*_LOGICAL opcodes")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit b542ac4ca0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Emma Anholt
3f3b7e4aa3 nir: Fix constant evaluation of non-32-bit bitfield_extract.
Caught by nir_opt_algebraic_pattern_tests.

Fixes: 226b0e28db ("nir: generalize bitfield insert/extract sizes")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit f6008645f6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Samuel Pitoiset
81de75b0d7 ac/cmdbuf: disable ENABLE_PING_PONG_BIN_ORDER on GFX11.5
Might be a hardware bug.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14240
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit ae34627e54)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Mike Blumenkrantz
6aee181cad zink: correctly use GENERAL layout for dynamic texture clears
missed this case

Fixes: 622612f67e ("zink: hook up global GENERAL image layouts")
(cherry picked from commit cf9c23a5e2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Rob Clark
6a5d21de3f tu: Fix TU_DRAW_STATE_VB size
vi_bindings_valid doesn't necessarily match the # of VBOs emitted,
resulting an invalid size in the CP_SET_DRAW_STATE packet.  Somehow
this didn't seem to cause problems prior to Dxx (although may
potentially have been a source of flakes, depending on what random
cmds followed in memory).  But caused hangs on Dxx.

See, for example, dEQP-VK.pipeline.fast_linked_library.vertex_input.misc.unused_binding

Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
(cherry picked from commit 63243bcc3e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-23 08:05:51 -08:00
Dave Airlie
043544961c gallivm: swap 1d array coords before casting.
This fixes a llvm validation error seen in dEQP-VK.robustness.robustness2.push.notemplate.rgba32f.dontunroll.nonvolatile.sampled_image.no_fmt_qual.img.samples_1.1d_array.rgen

Cc: mesa-stable
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
(cherry picked from commit 1e59dbf66b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:24:43 -08:00
Yiwei Zhang
2556e10273 venus: respect VK_SUBOPTIMAL_KHR returned from wsi image acquire
When suboptimal is returned, the fence payload is missed to be installed
unexpectedly. Instead, we can directly return errors from sync import.
With this change, dEQP-VK.wsi.xcb.maintenance1.release_images.* can pass
robustly now.

Fixes: a312bb4285 ("venus: refactor wsi acquire to use semaphore and fence SYNC_FD import")
(cherry picked from commit c8c6ee1dd7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:24:43 -08:00
Lars-Ivar Hesselberg Simonsen
7ea63a6c22 panfrost/bi: Fix potential out-of-bounds writes
panfrost_emit_image_attribs is only called when the context's image
state is dirtied and uses the context's image_mask to write attributes
and attribute buffers.

However, it uses the shader's attribute_count (which in this context is
the last bit of the shader's images_used) to calculate the size of the
buffers.

In case more images are bound than the currently bound shader uses, this
would lead to out-of-bounds writes.

This change updates the allocation to use the last bit in the context's
image_mask for size calculations.

It also removes an unused parameter from emit_image_bufs and updates a
parameter name in emit_image_attribs to be more descriptive and match
the documentation.

Fixes: dc85f65e05 ("panfrost: emit shader image attribute descriptors")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
(cherry picked from commit cdaf6b5d5e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:24:43 -08:00
Ian Romanick
844314f39b mesa: Fix segfaults in _mesa_delete_program and _mesa_reference_program_
`_mesa_delete_program` and `_mesa_reference_program_` both use fields
in `sh` without determining whether `sh` or `arb` is valid. Herein
lies the problem. I cannot see any reliable way to determine which is
valid without knowing what call path you are in.

There are two possible methods, but neither seems particularly
reliable. We could check whether `shader_program` is `NULL`, or we
could check whether `Parameters` (only used for ARB assembly shaders)
is `NULL`.

Instead of doing that, I chose to add a new field that captures the
`is_arb_asm` parameter already passed to `_mesa_init_gl_program`. This
seemed the most reliable. It is possible that more
`assert(!prog->is_arb_asm)` and `assert(prog->is_arb_asm)` should be
sprinkled throughout the code base.

I don't know how this has not already been a problem. Starting with
492a176cbb ("util: increase SHA1_DIGEST_LENGTH to 32
(BLAKE3_KEY_LEN)"), I observed segfaults in
`_mesa_uniform_detach_all_driver_storage` while freeing ARB assembly
shaders. Those shaders should never hit this path.

Not all assembly shaders hit this path. In fact, **nothing** in the
open shader-db encounters this problem. This is presumably why
pre-merge CI didn't catch this problem. In my closed shader-db,
shaders from the following applications hit this:

 - rocketbirds-hardboiled-chicken
 - shadowrun-returns
 - windward
 - ziggurat

I believe it was just blind luck that most of the time the fields of
`sh::data` that were access through this path, `sh::BindlessSamplers`,
and `sh::BindlessImages` happened to line up with fields of `arb` that
contained `NULL`. Changing the size of the hash key changed that luck.

Fixes: ca16c271fa ("mesa: make struct in gl_program a union and remove FIXME")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 884cf1d39e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:59 -08:00
Erik Faye-Lund
35ce79bf47 pvr: add missing forward-declaration
Not sure how we missed this, but we need the declaration here. This
probably only worked because of transitative includes, which we shound't
rely on.

Fixes: 82fad3f258 ("pvr: Enable PBE_FILTERABLE_F16")
Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
(cherry picked from commit ae6ddec410)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:59 -08:00
Faith Ekstrand
38d3342583 pan/bi: Use bi_emit_collect_to() for load_const
This helper is shorter and it also caches the result in the collect
cache so it can be used as a vector (or, in this case, a 64-bit value).

Cc: mesa-stable
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 87f924d91f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:58 -08:00
Danylo Piliaiev
708706c75a tu: Fix misleading lrz_disabled_at_draw values for RP
tu_render_pass_state_merge checks if lrz_disable_reason is NULL,
but it wasn't initialized to NULL.

Fixes: d6684aedf4 ("tu: Track at which draw call LRZ is disabled")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit d5199e2d29)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:57 -08:00
David Rosca
1fb1a3a51a frontends/va: Fix RGB/YUV conversion in Get/PutImage
This needs to set some matrix, otherwise identity would be used for
RGB/YUV conversion. For YUV/YUV or RGB/RGB conversion vlVaPostProcCompositor
will ignore the matrices, so it's okay to always set bt709.
Also set color range.

Fixes: 9393a0510b ("frontends/va: Use new RGB YUV conversion matrix")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14456
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
(cherry picked from commit 94f2d110a1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:56 -08:00
David Rosca
2b51e87caa frontends/va: Also treat PRI/TRC_RESERVED0 as unspecified
PIPE_VIDEO_VPP_PRI_RESERVED0 and PIPE_VIDEO_VPP_TRC_RESERVED0 have value 0,
and this is what we will get from apps that doesn't set primaries and transfer
characteristics at all.

Fixes: a284bff8ad ("frontends/va: Set color properties when not using explicit color standard")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
(cherry picked from commit 1395d806ba)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:55 -08:00
Danylo Piliaiev
df3d834bd3 tu: Restore PC_TESS_BASE after BIN preemption save/restore
Preamble save/restore for BINs doesn't handle PC_TESS_BASE, so we
assume that PC_TESS_BASE is invalid after any GMEM pass.

In addition on A7XX PC_TESS_BASE doesn't require WFI.

Fixes misrendering on A750 in "Industria", "Resident Evil 2" and
any other game that uses tesselation.

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit 12416c9fca)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:52 -08:00
Lionel Landwerlin
92544a389b brw/nir/rt: ensure we can load 2 RT_DISPATCH_GLOBALS
Each group of 16 lanes inside a SIMD32 shader will load different globals.

In SIMD8/16 shaders, the divergence analysis will turn this load into
nir_load_global_constant_uniform_block_intel.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit 527ae448e5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:47 -08:00
Dave Airlie
b9797ce180 radv/coopmat: fix deref stride
This at least fixes the nir debug output to have correct values.

Fixes: 48fc8c8d1c ("radv/nir/lower_cmat: set optimal load/store alignment")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
(cherry picked from commit ab9e904f24)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:32 -08:00
Mary Guillemard
40743daaea hk: Hash the multiview mask for both vertex and fragment stages
We were only accounting for the multiview mask when the fragment stage
was present causing wrong cached shaders to be possibly used.

This fixes
"dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.*_multiview"
failures.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
(cherry picked from commit 9a6c57b5c7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:32 -08:00
Alyssa Ross
8cec4096bf rocket: fix building for musl
musl follows POSIX and provides ioctl as int ioctl(int, int, ...).

Fixes: 5b829658f7 ("rocket: Initial commit occf a driver for Rockchip's NPU")
Signed-off-by: Alyssa Ross <hi@alyssa.is>
Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
(cherry picked from commit f677b3eb48)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-14 10:22:30 -08:00
Benjamin Cheng
6115add0e0 radeonsi/vcn: Allocate DPBs aligned to rec_alignment
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14618
Reviewed-by: David Rosca <david.rosca@amd.com>
(cherry picked from commit d02ba9bb9c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39462>
2026-01-09 12:40:33 -08:00