Commit graph

4644 commits

Author SHA1 Message Date
Lionel Landwerlin
a0844458b8 brw: enable opt_register_coalesce to work with multiple EOT blocks
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36883>
2025-08-20 15:01:50 +00:00
Lionel Landwerlin
c4c7ff3f8f brw: enable register allocation to deal with multiple EOTs
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36883>
2025-08-20 15:01:50 +00:00
Caio Oliveira
4fda724fd4 brw: Avoid invalid access when compacting out-of-bounds JIP/UIP
Some checks are pending
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Usually JIP will be valid, but as part of other changes, it will be
possible to have a shader that have multiple EOT messages and end with
and ENDIF instruction.  Its JIP will point after the program ends.
This is fine but was tripping up the compaction code.

Change compaction to not read its internal structures beyond the last
instruction.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36822>
2025-08-20 00:54:41 +00:00
Caio Oliveira
148063670d brw: If the instruction is already a SEND, no need to resize sources
Some checks are pending
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Kept an assert as a placeholder in case we had something odd going on
that this code was protecting.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36817>
2025-08-19 13:54:43 +00:00
Caio Oliveira
cebac156c4 brw: Only access valid sources in lower_btd_logical_send()
Only the SHADER_OPCODE_BTD_SPAWN_LOGICAL has sources, so
only reach for them when handling that instruction.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36817>
2025-08-19 13:54:43 +00:00
Caio Oliveira
dc960936fc brw: Move resize_sources() earlier when lowering FIND_LIVE_CHANNELS
Move it before the new source is used.  This currently works because all
instructions have a minimum amount of sources allocated, but a later commit
will change that.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36817>
2025-08-19 13:54:43 +00:00
Caio Oliveira
fe2e2fabcd brw: Make sure copied instruction don't copy the list pointers
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36817>
2025-08-19 13:54:43 +00:00
Caio Oliveira
5a34f676a5 brw: Define order for fixes in 3-src operand fix
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36817>
2025-08-19 13:54:43 +00:00
Sagar Ghuge
49b917baaf intel/compiler: Fix ray geometry index
Some checks are pending
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We have only 24-bit wide geometry index, not the 28-bit wide.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36796>
2025-08-19 09:32:55 +00:00
Matt Turner
6fd4dc353c elk/algebraic: Protect SHUFFLE from OOB indices
Akin to b67230de63 ("intel/fs: Protect opt_algebraic from OOB BROADCAST
indices"), we need to protect SHUFFLE as well.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36779>
2025-08-19 09:15:19 +00:00
Matt Turner
b4b692c486 brw/algebraic: Protect SHUFFLE from OOB indices
Akin to b67230de63 ("intel/fs: Protect opt_algebraic from OOB BROADCAST
indices"), we need to protect SHUFFLE as well.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13351
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36779>
2025-08-19 09:15:19 +00:00
Lionel Landwerlin
c871a62a75 brw: move URB channel mask shifting to the lowering pass
For example Xe2 uses the LSC and doesn´t need the shifting, so let's
just apply it where it's needed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36757>
2025-08-13 12:01:49 +00:00
Lionel Landwerlin
68838d7001 brw: reorder reloc enums to leave embedded samplers at the end
So that the driver can allocate an array of relocations using
BRW_SHADER_RELOC_EMBEDDED_SAMPLER_HANDLE + number_of_embedded_samplers

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36757>
2025-08-13 12:01:49 +00:00
Lionel Landwerlin
46c16f854e brw: compute consistent clip/cull distance masks with VUE
We can optimize the VUE layout in cases where all shaders are compiled
together and some outputs are unused. So we need to have consistent
clip/cull_distance_mask with the VUE.

Previously we could have a VUE without ClipDistance present in the
header and yet have a non zero clip_distance_mask. This would trip the
HW into taking into account a VUE field that doesn't exist.

Here we set the clip/cull_distance_mask to 0 if the associated output
is not written by the shader. The written outputs are always
consistent with what's in the VUE.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2d396f6085 ("intel: prepare VUE layout for more than 2 layouts")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13685
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36734>
2025-08-13 06:24:44 +00:00
Sagar Ghuge
cac3b4f404 anv: Mask off excessive invocations
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
For unaligned invocations, don't launch two COMPUTE_WALKER, instead we
can mask off excessive invocations in the shader itself at nir level and
launch one additional workgroup.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36245>
2025-08-12 23:17:02 +00:00
Kenneth Graunke
5e9de5317e brw: Validate that send payloads can't be imms or have source mods
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
To ensure we haven't missed resolving these things.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:11 +00:00
Kenneth Graunke
22165defb5 brw: Drop interlock and memory fence logical opcodes from is_payload()
These are lowered to sends prior to any callers of this helper.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:11 +00:00
Kenneth Graunke
ed4fadbb16 brw: Drop INTERPOLATE_AT_* opcodes from is_payload()
These are lowered to sends prior to any callers of this helper.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:10 +00:00
Kenneth Graunke
e2022017ce brw: Drop uniform pull constant load virtual opcode from is_send()
The logical send lowering already resolves sources when constructing
the send payload, so prior to that lowering, we don't need to apply
any special restrictions here.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:10 +00:00
Kenneth Graunke
9d5cd03ea8 brw: Drop interlock and memory fence logical opcodes from is_send()
The logical send lowering already resolves sources when constructing
the send payload, so prior to that lowering, we don't need to apply
any special restrictions here.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:09 +00:00
Kenneth Graunke
342ff81df0 brw: Drop INTERPOLATE_AT_* opcodes from is_send()
The goal here was to avoid propagating source modifiers, unusual
regions, and other things that couldn't be used as a send source.

A few patches ago ("brw: Properly resolve non-sendable sources in a few
logical opcodes") we fixed the logical send lowering to handle these
by resolving them when constructing the send payload.  So now prior
to lowering, we don't need to treat these opcodes specially.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:08 +00:00
Kenneth Graunke
47fe9d28e7 brw: Enumerate SHADER_OPCODE_SEND sources and standardize how many
This introduces enums for SHADER_OPCODE_SEND[_GATHER] sources, similar
similar to what we've done for most of the newer logical opcodes.  This
allows us to use actual names for sources rather than remembering their
order, or leaving ourselves comments like /* ex_desc */ all over.  It
will also make it easier to add or reorder sources in the future.

While we're at it, we also standardize on the number of sources.
Previously, we allowed SHADER_OPCODE_SEND to have either 3 (monosend) or
4 (split send) sources, but this is mostly for haphazard historical
reasons.  We now specify all sources every time, eliminating the need
for careful inst->source checks before accessing the last source.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:08 +00:00
Kenneth Graunke
00d38b980d brw: Properly resolve non-sendable sources in a few logical opcodes
Sources decorated with source modifiers, immediates, or particular
stride combinations may not be directly usable as SEND operands.  We
have to resolve them to an ordinary VGRF first.

Most opcodes do this as part of broader payload construction, but these
send directly because the messages are very simple.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:06 +00:00
Kenneth Graunke
b848fa4595 brw: Rename is_send_from_grf to is_send, replace other is_send() helper
The is_send() helper is just a wrapper around inst->is_send_from_grf()
now, so we can combine the two.  Trim the name from is_send_from_grf()
to is_send(), as it's shorter, and also matches is_math().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Kenneth Graunke
e7d20bc86a brw: Drop inst->mlen check from is_send()
We used to have inst->mlen set on various virtual opcodes, but these
days the only instructions that should have inst->mlen set are
SHADER_OPCODE_SEND and SHADER_OPCODE_SEND_GATHER, which are already
covered in inst->is_send_from_grf().  So we don't need to check for mlen
specifically.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Kenneth Graunke
3c455c3532 brw: Stop using is_send_from_grf() in CSE pass
Explicitly list FS_OPCODE_INTERPOLATE_AT_* as allowed, as they were
already allowed by the default case.  Interlock, memory fence, and
barrier were disallowed and remain so.  Uniform pull constant load
was allowed and remains so.  SHADER_OPCODE_SEND and SEND_GATHER get
explicit handling.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Kenneth Graunke
e5ed6f64d9 brw: Stop checking inst->is_send_from_grf() for g127 register hack
Every case but SHADER_OPCODE_SEND and SHADER_OPCODE_BARRIER will be
lowered to SEND before register allocation happens.  And the barrier
send has a null destination, so the restriction doesn't apply.

Note that this hack is for Gfx9 only, so we don't need to worry about
Xe3's SHADER_OPCODE_SEND_GATHER feature.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Kenneth Graunke
b0eb90ddb1 brw: Assert that EOT is always SHADER_OPCODE_SEND on pre-Xe3
We used to have other opcodes as well, but we've since transitioned
entirely to logical send lowering prior to register allocation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Kenneth Graunke
90dbbc69bb brw: Use BAD_FILE instead of ARF null for second send payload
A number of places emit monolithic sends, where the second payload is
empty.  Some places were using a BAD_FILE register, while others were
specifying the hardware ARF null register.  Switch to BAD_FILE for
consistency - this is usually what we do for "source isn't present".

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:04 +00:00
Lionel Landwerlin
6d863fda2d anv/brw: move sample_shading_enable to wm_prog_data
The vulkan runtime doesn´t store this parameter in the dynamic state
(since it's not a dynamic state). Just capture it at compile time and
leave on the wm_prog_data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:58 +00:00
Lionel Landwerlin
f2696b441d anv/brw: store min_sample_shading on wm_prog_data
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
2025-08-08 14:06:57 +00:00
Lionel Landwerlin
4c65aef155 brw: implement ACCESS_COHERENT on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36595>
2025-08-08 08:44:22 +00:00
Rohan Garg
c978394e00 intel/compiler: use the WA framework when emitting WA 14014595444
Fixes: d276ad4 "intel/compiler: implement Wa_14014595444 for DG2"
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36262>
2025-08-06 13:34:28 +00:00
Qiang Yu
c135ed1eb9 all: rename gl_shader_stage_name to mesa_shader_stage_name
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
e0397b1ee0 all: rename gl_shader_stage_can_set_fragment_shading_rate
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
260bdad074 all: rename gl_shader_stage_is_rt to mesa_shader_stage_is_rt
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
4847e0b380 all: rename gl_shader_stage_uses_workgroup to mesa_shader_stage_uses_workgroup
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
b27c8c9eb8 all: rename gl_shader_stage_is_mesh to mesa_shader_stage_is_mesh
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
7a91473192 all: rename gl_shader_stage_is_compute to mesa_shader_stage_is_compute
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:41 +08:00
Qiang Yu
196569b1a4 all: rename gl_shader_stage to mesa_shader_stage
It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:40 +08:00
Qiang Yu
07a3a54d37 all: rename PIPE_SHADER_TYPES to MESA_SHADER_STAGES
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bPIPE_SHADER_TYPES\b/MESA_SHADER_STAGES/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:39 +08:00
Qiang Yu
11027dd3f8 all: rename PIPE_SHADER_FRAGMENT to MESA_SHADER_FRAGMENT
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/PIPE_SHADER_FRAGMENT/MESA_SHADER_FRAGMENT/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:39 +08:00
Qiang Yu
197c183d2d all: rename PIPE_SHADER_TESS_EVAL to MESA_SHADER_TESS_EVAL
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/PIPE_SHADER_TESS_EVAL/MESA_SHADER_TESS_EVAL/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:39 +08:00
Qiang Yu
6cb38f9418 all: rename PIPE_SHADER_TESS_CTRL to MESA_SHADER_TESS_CTRL
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/PIPE_SHADER_TESS_CTRL/MESA_SHADER_TESS_CTRL/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:39 +08:00
Kenneth Graunke
c12497f943 brw: Update copy propagation into EOT sends handling for Xe2 units
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We're counting in REG_SIZE units here, but g112-127 is twice as large on
Xe2.  Check against 15 * reg_unit() to avoid missing out on propagation.

fossil-db results on Arc B580:

   Totals:
   Instrs: 233779396 -> 233779098 (-0.00%)
   Cycle count: 32601212742 -> 32601187382 (-0.00%); split: -0.00%, +0.00%
   Max live registers: 72695253 -> 72694326 (-0.00%); split: -0.00%, +0.00%

   Totals from 232 (0.03% of 789301) affected shaders:
   Instrs: 41071 -> 40773 (-0.73%)
   Cycle count: 1756714 -> 1731354 (-1.44%); split: -2.01%, +0.57%
   Max live registers: 22092 -> 21165 (-4.20%); split: -4.48%, +0.28%

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
2025-08-05 23:57:25 +00:00
Kenneth Graunke
946f768359 brw: Fix units in copy propagation EOT restriction size calculation
size_read() counts in bytes.  s.alloc.sizes[] counts in REG_SIZE units.

(Affects 4 raytracing shaders in Cyberpunk 2077.)

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
2025-08-05 23:57:25 +00:00
Kenneth Graunke
4151a39b8a brw: Refactor copy propagation checks for EOT send restrictions
These are identical, pull them into a helper so we only have one place
to fix bugs.

(Marked fixes because the next two patches depend on the refactor.)

Fixes: ec2e8bc33f ("intel/compiler: Avoid copy propagating large registers into EOT messages")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36577>
2025-08-05 23:57:25 +00:00
Marek Olšák
b769d5dcde nir: don't use variables as ralloc parents, use the shader instead
so that we can switch variables to gc_ctx

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36538>
2025-08-05 22:55:13 +00:00
Marek Olšák
96ffc24e4e nir: add nir_variable_{set,append,steal}_name{f}() to modify nir_variable names
Setting variable names currently always uses ralloc, but the new
nir_variable_* helpers will mostly eliminate ralloc/malloc in a later
commit.

This just updates all places that touch nir_variable names to use the new
helpers.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36538>
2025-08-05 22:55:12 +00:00
Marek Olšák
ae5b168051 ralloc/linalloc: allow adding custom code to LINEAR_ALLOC new operator
for GLSL IR

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36539>
2025-08-04 02:07:00 +00:00