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all: rename PIPE_SHADER_TESS_EVAL to MESA_SHADER_TESS_EVAL

Browse source 
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/PIPE_SHADER_TESS_EVAL/MESA_SHADER_TESS_EVAL/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
This commit is contained in:
Qiang Yu 2025-08-05 12:23:05 +08:00
parent 6cb38f9418
commit 197c183d2d
81 changed files with 203 additions and 203 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/auxiliary/cso_cache/cso_context.c
View file

@ -371,7 +371,7 @@ cso_unbind_context(struct cso_context *cso)
continue;
break;
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (!ctx->has_tessellation)
continue;
break;

4
src/gallium/auxiliary/draw/draw_context.c
View file

@ -462,7 +462,7 @@ draw_set_mapped_constant_buffer(struct draw_context *draw,
assert(shader_type == MESA_SHADER_VERTEX ||
shader_type == PIPE_SHADER_GEOMETRY ||
shader_type == MESA_SHADER_TESS_CTRL ||
shader_type == PIPE_SHADER_TESS_EVAL);
shader_type == MESA_SHADER_TESS_EVAL);
assert(slot < PIPE_MAX_CONSTANT_BUFFERS);
draw_do_flush(draw, DRAW_FLUSH_PARAMETER_CHANGE);
@ -481,7 +481,7 @@ draw_set_mapped_shader_buffer(struct draw_context *draw,
assert(shader_type == MESA_SHADER_VERTEX ||
shader_type == PIPE_SHADER_GEOMETRY ||
shader_type == MESA_SHADER_TESS_CTRL ||
shader_type == PIPE_SHADER_TESS_EVAL);
shader_type == MESA_SHADER_TESS_EVAL);
assert(slot < PIPE_MAX_SHADER_BUFFERS);
draw_do_flush(draw, DRAW_FLUSH_PARAMETER_CHANGE);

6
src/gallium/auxiliary/draw/draw_llvm.c
View file

@ -3843,11 +3843,11 @@ draw_tes_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
for (unsigned i = 0 ; i < key->nr_samplers; i++) {
lp_sampler_static_sampler_state(&draw_sampler[i].sampler_state,
llvm->draw->samplers[PIPE_SHADER_TESS_EVAL][i]);
llvm->draw->samplers[MESA_SHADER_TESS_EVAL][i]);
}
for (unsigned i = 0 ; i < key->nr_sampler_views; i++) {
lp_sampler_static_texture_state(&draw_sampler[i].texture_state,
llvm->draw->sampler_views[PIPE_SHADER_TESS_EVAL][i]);
llvm->draw->sampler_views[MESA_SHADER_TESS_EVAL][i]);
}
draw_image = draw_tes_llvm_variant_key_images(key);
@ -3855,7 +3855,7 @@ draw_tes_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
key->nr_images * sizeof *draw_image);
for (unsigned i = 0; i < key->nr_images; i++) {
lp_sampler_static_texture_state_image(&draw_image[i].image_state,
llvm->draw->images[PIPE_SHADER_TESS_EVAL][i]);
llvm->draw->images[MESA_SHADER_TESS_EVAL][i]);
}
return key;
}

2
src/gallium/auxiliary/draw/draw_tess.c
View file

@ -592,7 +592,7 @@ draw_create_tess_eval_shader(struct draw_context *draw,
tes->tes_input = align_malloc(sizeof(struct draw_tes_inputs), 16);
memset(tes->tes_input, 0, sizeof(struct draw_tes_inputs));
tes->jit_resources = &draw->llvm->jit_resources[PIPE_SHADER_TESS_EVAL];
tes->jit_resources = &draw->llvm->jit_resources[MESA_SHADER_TESS_EVAL];
llvm_tes->variant_key_size =
draw_tes_llvm_variant_key_size(
tes->info.file_max[TGSI_FILE_SAMPLER]+1,

8
src/gallium/auxiliary/driver_ddebug/dd_draw.c
View file

@ -157,8 +157,8 @@ dd_num_active_viewports(struct dd_draw_state *dstate)
if (dstate->shaders[PIPE_SHADER_GEOMETRY])
tokens = dstate->shaders[PIPE_SHADER_GEOMETRY]->state.shader.tokens;
else if (dstate->shaders[PIPE_SHADER_TESS_EVAL])
tokens = dstate->shaders[PIPE_SHADER_TESS_EVAL]->state.shader.tokens;
else if (dstate->shaders[MESA_SHADER_TESS_EVAL])
tokens = dstate->shaders[MESA_SHADER_TESS_EVAL]->state.shader.tokens;
else if (dstate->shaders[MESA_SHADER_VERTEX])
tokens = dstate->shaders[MESA_SHADER_VERTEX]->state.shader.tokens;
else
@ -266,14 +266,14 @@ dd_dump_shader(struct dd_draw_state *dstate, enum pipe_shader_type sh, FILE *f)
shader_str[MESA_SHADER_VERTEX] = "VERTEX";
shader_str[MESA_SHADER_TESS_CTRL] = "TESS_CTRL";
shader_str[PIPE_SHADER_TESS_EVAL] = "TESS_EVAL";
shader_str[MESA_SHADER_TESS_EVAL] = "TESS_EVAL";
shader_str[PIPE_SHADER_GEOMETRY] = "GEOMETRY";
shader_str[PIPE_SHADER_FRAGMENT] = "FRAGMENT";
shader_str[PIPE_SHADER_COMPUTE] = "COMPUTE";
if (sh == MESA_SHADER_TESS_CTRL &&
!dstate->shaders[MESA_SHADER_TESS_CTRL] &&
dstate->shaders[PIPE_SHADER_TESS_EVAL])
dstate->shaders[MESA_SHADER_TESS_EVAL])
fprintf(f, "tess_state: {default_outer_level = {%f, %f, %f, %f}, "
"default_inner_level = {%f, %f}}\n",
dstate->tess_default_levels[0],

2
src/gallium/auxiliary/tgsi/tgsi_dump.c
View file

@ -316,7 +316,7 @@ iter_declaration(
(iter->processor.Processor == PIPE_SHADER_GEOMETRY ||
(!patch &&
(iter->processor.Processor == MESA_SHADER_TESS_CTRL ||
iter->processor.Processor == PIPE_SHADER_TESS_EVAL)))) {
iter->processor.Processor == MESA_SHADER_TESS_EVAL)))) {
TXT("[]");
}

2
src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
View file

@ -64,7 +64,7 @@ pipe_shader_type_from_mesa(gl_shader_stage stage)
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_VERTEX == MESA_SHADER_VERTEX);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_FRAGMENT == PIPE_SHADER_FRAGMENT);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_EVAL == PIPE_SHADER_TESS_EVAL);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_EVAL == MESA_SHADER_TESS_EVAL);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_GEOMETRY == PIPE_SHADER_GEOMETRY);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_COMPUTE == PIPE_SHADER_COMPUTE);
return (enum pipe_shader_type)stage;

4
src/gallium/auxiliary/tgsi/tgsi_sanity.c
View file

@ -418,7 +418,7 @@ iter_declaration(
if (file == TGSI_FILE_INPUT && !patch && (
processor == PIPE_SHADER_GEOMETRY ||
processor == MESA_SHADER_TESS_CTRL ||
processor == PIPE_SHADER_TESS_EVAL)) {
processor == MESA_SHADER_TESS_EVAL)) {
unsigned vert;
for (vert = 0; vert < ctx->implied_array_size; ++vert) {
scan_register *reg = MALLOC(sizeof(scan_register));
@ -502,7 +502,7 @@ prolog(struct tgsi_iterate_context *iter)
{
struct sanity_check_ctx *ctx = (struct sanity_check_ctx *) iter;
if (iter->processor.Processor == MESA_SHADER_TESS_CTRL ||
iter->processor.Processor == PIPE_SHADER_TESS_EVAL)
iter->processor.Processor == MESA_SHADER_TESS_EVAL)
ctx->implied_array_size = 32;
return true;
}

2
src/gallium/auxiliary/tgsi/tgsi_scan.c
View file

@ -614,7 +614,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
procType == MESA_SHADER_VERTEX ||
procType == PIPE_SHADER_GEOMETRY ||
procType == MESA_SHADER_TESS_CTRL ||
procType == PIPE_SHADER_TESS_EVAL ||
procType == MESA_SHADER_TESS_EVAL ||
procType == PIPE_SHADER_COMPUTE);
info->processor = procType;

6
src/gallium/auxiliary/tgsi/tgsi_text.c
View file

@ -341,7 +341,7 @@ static bool parse_header( struct translate_ctx *ctx )
else if (str_match_nocase_whole( &ctx->cur, "TESS_CTRL" ))
processor = MESA_SHADER_TESS_CTRL;
else if (str_match_nocase_whole( &ctx->cur, "TESS_EVAL" ))
processor = PIPE_SHADER_TESS_EVAL;
processor = MESA_SHADER_TESS_EVAL;
else if (str_match_nocase_whole( &ctx->cur, "COMP" ))
processor = PIPE_SHADER_COMPUTE;
else {
@ -731,7 +731,7 @@ parse_register_dcl(
/* tessellation has similar constraints to geometry shader */
if ((ctx->processor == PIPE_SHADER_GEOMETRY && is_in) ||
(ctx->processor == PIPE_SHADER_TESS_EVAL && is_in) ||
(ctx->processor == MESA_SHADER_TESS_EVAL && is_in) ||
(ctx->processor == MESA_SHADER_TESS_CTRL && (is_in || is_out))) {
brackets[0] = brackets[1];
*num_brackets = 1;
@ -1811,7 +1811,7 @@ static bool translate( struct translate_ctx *ctx )
return false;
if (ctx->processor == MESA_SHADER_TESS_CTRL ||
ctx->processor == PIPE_SHADER_TESS_EVAL)
ctx->processor == MESA_SHADER_TESS_EVAL)
ctx->implied_array_size = 32;
while (*ctx->cur != '\0') {

4
src/gallium/auxiliary/tgsi/tgsi_ureg.c
View file

@ -2114,7 +2114,7 @@ const struct tgsi_token *ureg_finalize( struct ureg_program *ureg )
switch (ureg->processor) {
case MESA_SHADER_VERTEX:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
ureg_property(ureg, TGSI_PROPERTY_NEXT_SHADER,
ureg->next_shader_processor == -1 ?
PIPE_SHADER_FRAGMENT :
@ -2186,7 +2186,7 @@ void *ureg_create_shader( struct ureg_program *ureg,
return pipe->create_vs_state(pipe, &state);
case MESA_SHADER_TESS_CTRL:
return pipe->create_tcs_state(pipe, &state);
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return pipe->create_tes_state(pipe, &state);
case PIPE_SHADER_GEOMETRY:
return pipe->create_gs_state(pipe, &state);

2
src/gallium/auxiliary/util/u_live_shader_cache.c
View file

@ -103,7 +103,7 @@ util_live_shader_cache_get(struct pipe_context *ctx,
_mesa_sha1_init(&sha1_ctx);
_mesa_sha1_update(&sha1_ctx, ir_binary, ir_size);
if ((stage == MESA_SHADER_VERTEX ||
stage == PIPE_SHADER_TESS_EVAL ||
stage == MESA_SHADER_TESS_EVAL ||
stage == PIPE_SHADER_GEOMETRY) &&
state->stream_output.num_outputs) {
_mesa_sha1_update(&sha1_ctx, &state->stream_output,

6
src/gallium/auxiliary/util/u_threaded_context.c
View file

@ -916,7 +916,7 @@ tc_add_all_gfx_bindings_to_buffer_list(struct threaded_context *tc)
if (tc->seen_tcs)
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_TESS_CTRL);
if (tc->seen_tes)
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_TESS_EVAL);
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_TESS_EVAL);
if (tc->seen_gs)
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_GEOMETRY);
@ -960,7 +960,7 @@ tc_rebind_buffer(struct threaded_context *tc, uint32_t old_id, uint32_t new_id,
if (tc->seen_tcs)
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_TESS_CTRL, rebind_mask);
if (tc->seen_tes)
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_TESS_EVAL, rebind_mask);
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_TESS_EVAL, rebind_mask);
if (tc->seen_gs)
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_GEOMETRY, rebind_mask);
@ -1016,7 +1016,7 @@ tc_is_buffer_bound_for_write(struct threaded_context *tc, uint32_t id)
return true;
if (tc->seen_tes &&
tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_TESS_EVAL))
tc_is_buffer_shader_bound_for_write(tc, id, MESA_SHADER_TESS_EVAL))
return true;
if (tc->seen_gs &&

2
src/gallium/drivers/asahi/agx_blit.c
View file

@ -463,7 +463,7 @@ agx_blitter_save(struct agx_context *ctx, struct blitter_context *blitter,
util_blitter_save_tessctrl_shader(blitter,
ctx->stage[MESA_SHADER_TESS_CTRL].shader);
util_blitter_save_tesseval_shader(blitter,
ctx->stage[PIPE_SHADER_TESS_EVAL].shader);
ctx->stage[MESA_SHADER_TESS_EVAL].shader);
util_blitter_save_geometry_shader(blitter,
ctx->stage[PIPE_SHADER_GEOMETRY].shader);
util_blitter_save_so_targets(blitter, ctx->streamout.num_targets,

4
src/gallium/drivers/asahi/agx_disk_cache.c
View file

@ -35,7 +35,7 @@ agx_disk_cache_compute_key(struct disk_cache *cache,
int hash_size = sizeof(uncompiled->nir_sha1);
int key_size;
if (uncompiled->type == MESA_SHADER_VERTEX ||
uncompiled->type == PIPE_SHADER_TESS_EVAL)
uncompiled->type == MESA_SHADER_TESS_EVAL)
key_size = sizeof(shader_key->vs);
else if (uncompiled->type == PIPE_SHADER_FRAGMENT)
key_size = sizeof(shader_key->fs);
@ -94,7 +94,7 @@ read_shader(struct agx_screen *screen, struct blob_reader *blob,
size_t size = binary->b.info.binary_size;
if (uncompiled->type == MESA_SHADER_VERTEX ||
uncompiled->type == PIPE_SHADER_TESS_EVAL ||
uncompiled->type == MESA_SHADER_TESS_EVAL ||
uncompiled->type == PIPE_SHADER_FRAGMENT) {
binary->b.binary = malloc(size);

2
src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
View file

@ -382,7 +382,7 @@ lay_out_uniforms(struct agx_compiled_shader *shader, struct state *state)
unsigned uniform = 0;
if (state->stage == MESA_SHADER_VERTEX ||
state->stage == PIPE_SHADER_TESS_EVAL) {
state->stage == MESA_SHADER_TESS_EVAL) {
unsigned count =
DIV_ROUND_UP(BITSET_LAST_BIT(shader->attrib_components_read), 4);

26
src/gallium/drivers/asahi/agx_state.c
View file

@ -1717,7 +1717,7 @@ agx_get_shader_variant(struct agx_screen *screen, struct pipe_context *pctx,
if (so->type == PIPE_SHADER_FRAGMENT) {
memcpy(cloned_key, key, sizeof(struct asahi_fs_shader_key));
} else if (so->type == MESA_SHADER_VERTEX ||
so->type == PIPE_SHADER_TESS_EVAL) {
so->type == MESA_SHADER_TESS_EVAL) {
memcpy(cloned_key, key, sizeof(struct asahi_vs_shader_key));
} else {
/* No key */
@ -1966,7 +1966,7 @@ agx_create_shader_state(struct pipe_context *pctx,
union asahi_shader_key key = {0};
switch (so->type) {
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
/* TODO: Tessellation shaders with shader-db */
return so;
@ -2162,14 +2162,14 @@ agx_update_vs(struct agx_batch *batch, unsigned index_size_B)
* vb_mask, attributes, vertex_buffers: VERTEX
*/
if (!((ctx->dirty & (AGX_DIRTY_VS_PROG | AGX_DIRTY_VERTEX | AGX_DIRTY_XFB)) ||
ctx->stage[PIPE_SHADER_TESS_EVAL].dirty ||
ctx->stage[MESA_SHADER_TESS_EVAL].dirty ||
ctx->stage[PIPE_SHADER_GEOMETRY].dirty ||
ctx->stage[PIPE_SHADER_TESS_EVAL].shader ||
ctx->stage[MESA_SHADER_TESS_EVAL].shader ||
ctx->stage[PIPE_SHADER_GEOMETRY].shader || ctx->in_tess))
return false;
struct asahi_vs_shader_key key = {
.hw = !((ctx->stage[PIPE_SHADER_TESS_EVAL].shader && !ctx->in_tess) ||
.hw = !((ctx->stage[MESA_SHADER_TESS_EVAL].shader && !ctx->in_tess) ||
ctx->stage[PIPE_SHADER_GEOMETRY].shader),
};
@ -2433,7 +2433,7 @@ agx_bind_tcs_state(struct pipe_context *pctx, void *cso)
static void
agx_bind_tes_state(struct pipe_context *pctx, void *cso)
{
agx_bind_shader_state(pctx, cso, PIPE_SHADER_TESS_EVAL);
agx_bind_shader_state(pctx, cso, MESA_SHADER_TESS_EVAL);
}
static void
@ -3861,7 +3861,7 @@ agx_ia_update(struct agx_batch *batch, const struct pipe_draw_info *info,
* they are written along with IA.
*/
if (ctx->stage[PIPE_SHADER_GEOMETRY].shader ||
ctx->stage[PIPE_SHADER_TESS_EVAL].shader) {
ctx->stage[MESA_SHADER_TESS_EVAL].shader) {
c_prims = AGX_SCRATCH_PAGE_ADDRESS;
c_invs = AGX_SCRATCH_PAGE_ADDRESS;
@ -4308,7 +4308,7 @@ agx_needs_passthrough_gs(struct agx_context *ctx,
* feedback is used, we need a GS.
*/
struct agx_uncompiled_shader *last_vtx =
ctx->stage[PIPE_SHADER_TESS_EVAL].shader
ctx->stage[MESA_SHADER_TESS_EVAL].shader
?: ctx->stage[MESA_SHADER_VERTEX].shader;
if (last_vtx->has_xfb_info && ctx->streamout.num_targets) {
@ -4383,8 +4383,8 @@ agx_apply_passthrough_gs(struct agx_context *ctx,
const struct pipe_draw_start_count_bias *draws,
unsigned num_draws, bool xfb_passthrough)
{
enum pipe_shader_type prev_stage = ctx->stage[PIPE_SHADER_TESS_EVAL].shader
? PIPE_SHADER_TESS_EVAL
enum pipe_shader_type prev_stage = ctx->stage[MESA_SHADER_TESS_EVAL].shader
? MESA_SHADER_TESS_EVAL
: MESA_SHADER_VERTEX;
struct agx_uncompiled_shader *prev_cso = ctx->stage[prev_stage].shader;
@ -4597,7 +4597,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
agx_update_tcs(ctx, info);
/* XXX */
ctx->stage[MESA_SHADER_TESS_CTRL].dirty = ~0;
ctx->stage[PIPE_SHADER_TESS_EVAL].dirty = ~0;
ctx->stage[MESA_SHADER_TESS_EVAL].dirty = ~0;
agx_update_descriptors(batch, ctx->vs);
agx_update_descriptors(batch, ctx->tcs);
@ -4721,7 +4721,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
/* Run TES as VS */
void *vs_cso = ctx->stage[MESA_SHADER_VERTEX].shader;
void *tes_cso = ctx->stage[PIPE_SHADER_TESS_EVAL].shader;
void *tes_cso = ctx->stage[MESA_SHADER_TESS_EVAL].shader;
ctx->base.bind_vs_state(&ctx->base, tes_cso);
ctx->in_tess = true;
@ -4958,7 +4958,7 @@ agx_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
ctx->pipeline_statistics[PIPE_STAT_QUERY_VS_INVOCATIONS] ||
((ctx->pipeline_statistics[PIPE_STAT_QUERY_C_PRIMITIVES] ||
ctx->pipeline_statistics[PIPE_STAT_QUERY_C_INVOCATIONS]) &&
!ctx->stage[PIPE_SHADER_TESS_EVAL].shader &&
!ctx->stage[MESA_SHADER_TESS_EVAL].shader &&
!ctx->stage[PIPE_SHADER_GEOMETRY].shader))) {
uint64_t ptr;

2
src/gallium/drivers/asahi/agx_state.h
View file

@ -92,7 +92,7 @@ static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_VERTEX) == AGX_SYSVAL_TABLE_VS,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_TESS_CTRL) == AGX_SYSVAL_TABLE_TCS,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_TESS_EVAL) == AGX_SYSVAL_TABLE_TES,
static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_TESS_EVAL) == AGX_SYSVAL_TABLE_TES,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_GEOMETRY) == AGX_SYSVAL_TABLE_GS,
"fixed enum orderings");

2
src/gallium/drivers/d3d12/d3d12_blit.cpp
View file

@ -274,7 +274,7 @@ util_blit_save_state(struct d3d12_context *ctx)
util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_EVAL]);
util_blitter_save_framebuffer(ctx->blitter, &ctx->fb);
util_blitter_save_viewport(ctx->blitter, ctx->viewport_states);

34
src/gallium/drivers/d3d12/d3d12_compiler.cpp
View file

@ -675,7 +675,7 @@ validate_tess_ctrl_shader_variant(struct d3d12_selection_context *sel_ctx)
if (tcs != NULL && !tcs->is_variant)
return;
d3d12_shader_selector *tes = ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
d3d12_shader_selector *tes = ctx->gfx_stages[MESA_SHADER_TESS_EVAL];
struct d3d12_tcs_variant_key key = {0};
bool variant_needed = tes != nullptr;
@ -725,7 +725,7 @@ d3d12_compare_shader_keys(struct d3d12_selection_context* sel_ctx, const d3d12_s
if (expect->hs.all != have->hs.all)
return false;
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (expect->ds.tcs_vertices_out != have->ds.tcs_vertices_out ||
expect->ds.prev_patch_outputs != have->ds.prev_patch_outputs)
return false;
@ -817,7 +817,7 @@ d3d12_shader_key_hash(const d3d12_shader_key *key)
case MESA_SHADER_TESS_CTRL:
hash += static_cast<uint32_t>(key->hs.all);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
hash += key->ds.tcs_vertices_out;
hash += key->ds.prev_patch_outputs;
break;
@ -855,7 +855,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
case MESA_SHADER_TESS_CTRL:
key->hs.all = 0;
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
key->ds.tcs_vertices_out = 0;
key->ds.prev_patch_outputs = 0;
break;
@ -874,7 +874,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
key->prev_has_frac_outputs = prev->has_frac_outputs;
key->prev_varying_frac_outputs = prev->varying_frac_outputs;
if (stage == PIPE_SHADER_TESS_EVAL)
if (stage == MESA_SHADER_TESS_EVAL)
key->ds.prev_patch_outputs = prev->initial->info.patch_outputs_written;
/* Set the provoking vertex based on the previous shader output. Only set the
@ -903,7 +903,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
}
if (stage == PIPE_SHADER_GEOMETRY ||
((stage == MESA_SHADER_VERTEX || stage == PIPE_SHADER_TESS_EVAL) &&
((stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL) &&
(!next || next->stage == PIPE_SHADER_FRAGMENT))) {
key->last_vertex_processing_stage = 1;
key->invert_depth = sel_ctx->ctx->reverse_depth_range;
@ -969,7 +969,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
key->hs.spacing = TESS_SPACING_EQUAL;
}
key->hs.patch_vertices_in = MAX2(sel_ctx->ctx->patch_vertices, 1);
} else if (stage == PIPE_SHADER_TESS_EVAL) {
} else if (stage == MESA_SHADER_TESS_EVAL) {
if (prev && prev->initial->info.stage == MESA_SHADER_TESS_CTRL)
key->ds.tcs_vertices_out = prev->initial->info.tess.tcs_vertices_out;
else
@ -1207,10 +1207,10 @@ get_prev_shader(struct d3d12_context *ctx, pipe_shader_type current)
return ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
FALLTHROUGH;
case PIPE_SHADER_GEOMETRY:
if (ctx->gfx_stages[PIPE_SHADER_TESS_EVAL])
return ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
if (ctx->gfx_stages[MESA_SHADER_TESS_EVAL])
return ctx->gfx_stages[MESA_SHADER_TESS_EVAL];
FALLTHROUGH;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (ctx->gfx_stages[MESA_SHADER_TESS_CTRL])
return ctx->gfx_stages[MESA_SHADER_TESS_CTRL];
FALLTHROUGH;
@ -1230,10 +1230,10 @@ get_next_shader(struct d3d12_context *ctx, pipe_shader_type current)
return ctx->gfx_stages[MESA_SHADER_TESS_CTRL];
FALLTHROUGH;
case MESA_SHADER_TESS_CTRL:
if (ctx->gfx_stages[PIPE_SHADER_TESS_EVAL])
return ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
if (ctx->gfx_stages[MESA_SHADER_TESS_EVAL])
return ctx->gfx_stages[MESA_SHADER_TESS_EVAL];
FALLTHROUGH;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (ctx->gfx_stages[PIPE_SHADER_GEOMETRY])
return ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
FALLTHROUGH;
@ -1518,10 +1518,10 @@ d3d12_select_shader_variants(struct d3d12_context *ctx, const struct pipe_draw_i
next = get_next_shader(ctx, MESA_SHADER_TESS_CTRL);
select_shader_variant(&sel_ctx, stages[MESA_SHADER_TESS_CTRL], prev, next);
}
if (stages[PIPE_SHADER_TESS_EVAL]) {
prev = get_prev_shader(ctx, PIPE_SHADER_TESS_EVAL);
next = get_next_shader(ctx, PIPE_SHADER_TESS_EVAL);
select_shader_variant(&sel_ctx, stages[PIPE_SHADER_TESS_EVAL], prev, next);
if (stages[MESA_SHADER_TESS_EVAL]) {
prev = get_prev_shader(ctx, MESA_SHADER_TESS_EVAL);
next = get_next_shader(ctx, MESA_SHADER_TESS_EVAL);
select_shader_variant(&sel_ctx, stages[MESA_SHADER_TESS_EVAL], prev, next);
}
if (stages[PIPE_SHADER_GEOMETRY]) {
prev = get_prev_shader(ctx, PIPE_SHADER_GEOMETRY);

8
src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
View file

@ -1166,20 +1166,20 @@ static void *
d3d12_create_tes_state(struct pipe_context *pctx,
const struct pipe_shader_state *shader)
{
return d3d12_create_shader(d3d12_context(pctx), PIPE_SHADER_TESS_EVAL, shader);
return d3d12_create_shader(d3d12_context(pctx), MESA_SHADER_TESS_EVAL, shader);
}
static void
d3d12_bind_tes_state(struct pipe_context *pctx, void *tess)
{
bind_stage(d3d12_context(pctx), PIPE_SHADER_TESS_EVAL,
bind_stage(d3d12_context(pctx), MESA_SHADER_TESS_EVAL,
(struct d3d12_shader_selector *)tess);
}
static void
d3d12_delete_tes_state(struct pipe_context *pctx, void *tes)
{
delete_shader(d3d12_context(pctx), PIPE_SHADER_TESS_EVAL,
delete_shader(d3d12_context(pctx), MESA_SHADER_TESS_EVAL,
(struct d3d12_shader_selector *)tes);
}
@ -1954,7 +1954,7 @@ d3d12_clear_render_target(struct pipe_context *pctx,
util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_EVAL]);
util_blitter_save_framebuffer(ctx->blitter, &ctx->fb);
util_blitter_save_viewport(ctx->blitter, ctx->viewport_states);

2
src/gallium/drivers/d3d12/d3d12_draw.cpp
View file

@ -745,7 +745,7 @@ d3d12_last_vertex_stage(struct d3d12_context *ctx)
{
struct d3d12_shader_selector *sel = ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
if (!sel || sel->is_variant)
sel = ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
sel = ctx->gfx_stages[MESA_SHADER_TESS_EVAL];
if (!sel)
sel = ctx->gfx_stages[MESA_SHADER_VERTEX];
return sel;

4
src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
View file

@ -295,8 +295,8 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
last_vertex_stage_nir = shader->nir;
}
if (state->stages[PIPE_SHADER_TESS_EVAL]) {
auto shader = state->stages[PIPE_SHADER_TESS_EVAL];
if (state->stages[MESA_SHADER_TESS_EVAL]) {
auto shader = state->stages[MESA_SHADER_TESS_EVAL];
pso_desc.DS = D3D12_SHADER_BYTECODE{ shader->bytecode, shader->bytecode_length };
last_vertex_stage_nir = shader->nir;
}

2
src/gallium/drivers/d3d12/d3d12_root_signature.cpp
View file

@ -49,7 +49,7 @@ get_shader_visibility(enum pipe_shader_type stage)
return D3D12_SHADER_VISIBILITY_GEOMETRY;
case MESA_SHADER_TESS_CTRL:
return D3D12_SHADER_VISIBILITY_HULL;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return D3D12_SHADER_VISIBILITY_DOMAIN;
case PIPE_SHADER_COMPUTE:
return D3D12_SHADER_VISIBILITY_ALL;

2
src/gallium/drivers/d3d12/d3d12_screen.cpp
View file

@ -154,7 +154,7 @@ d3d12_init_shader_caps(struct d3d12_screen *screen)
caps->max_inputs = D3D12_HS_CONTROL_POINT_PHASE_INPUT_REGISTER_COUNT;
caps->max_outputs = D3D12_HS_CONTROL_POINT_PHASE_OUTPUT_REGISTER_COUNT;
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
caps->max_inputs = D3D12_DS_INPUT_CONTROL_POINT_REGISTER_COUNT;
caps->max_outputs = D3D12_DS_OUTPUT_REGISTER_COUNT;
break;

2
src/gallium/drivers/freedreno/a6xx/fd6_const.cc
View file

@ -352,7 +352,7 @@ fd6_build_user_consts(struct fd6_emit *emit)
if (PIPELINE == HAS_TESS_GS) {
if (emit->hs) {
emit_user_consts<CHIP>(emit->hs, constobj, &ctx->constbuf[MESA_SHADER_TESS_CTRL]);
emit_user_consts<CHIP>(emit->ds, constobj, &ctx->constbuf[PIPE_SHADER_TESS_EVAL]);
emit_user_consts<CHIP>(emit->ds, constobj, &ctx->constbuf[MESA_SHADER_TESS_EVAL]);
}
if (emit->gs) {
emit_user_consts<CHIP>(emit->gs, constobj, &ctx->constbuf[PIPE_SHADER_GEOMETRY]);

4
src/gallium/drivers/freedreno/a6xx/fd6_context.cc
View file

@ -181,7 +181,7 @@ setup_state_map(struct fd_context *ctx)
BIT(FD6_GROUP_VS_TEX));
fd_context_add_shader_map(ctx, MESA_SHADER_TESS_CTRL, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_HS_TEX));
fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL, FD_DIRTY_SHADER_TEX,
fd_context_add_shader_map(ctx, MESA_SHADER_TESS_EVAL, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_DS_TEX));
fd_context_add_shader_map(ctx, PIPE_SHADER_GEOMETRY, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_GS_TEX));
@ -196,7 +196,7 @@ setup_state_map(struct fd_context *ctx)
fd_context_add_shader_map(ctx, MESA_SHADER_TESS_CTRL,
FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
BIT(FD6_GROUP_HS_BINDLESS));
fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL,
fd_context_add_shader_map(ctx, MESA_SHADER_TESS_EVAL,
FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
BIT(FD6_GROUP_DS_BINDLESS));
fd_context_add_shader_map(ctx, PIPE_SHADER_GEOMETRY,

4
src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
View file

@ -667,7 +667,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
fd6_state_take_group(&emit->state, state, FD6_GROUP_HS_BINDLESS);
break;
case FD6_GROUP_DS_BINDLESS:
state = fd6_build_bindless_state<CHIP>(ctx, PIPE_SHADER_TESS_EVAL, false);
state = fd6_build_bindless_state<CHIP>(ctx, MESA_SHADER_TESS_EVAL, false);
fd6_state_take_group(&emit->state, state, FD6_GROUP_DS_BINDLESS);
break;
case FD6_GROUP_GS_BINDLESS:
@ -701,7 +701,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
fd6_state_take_group(&emit->state, state, FD6_GROUP_HS_TEX);
break;
case FD6_GROUP_DS_TEX:
state = tex_state(ctx, PIPE_SHADER_TESS_EVAL);
state = tex_state(ctx, MESA_SHADER_TESS_EVAL);
fd6_state_take_group(&emit->state, state, FD6_GROUP_DS_TEX);
break;
case FD6_GROUP_GS_TEX:

2
src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
View file

@ -624,7 +624,7 @@ build_texture_state(struct fd_context *ctx, enum pipe_shader_type type,
tex_const_reg = REG_A6XX_SP_HS_TEXMEMOBJ_BASE;
tex_count_reg = REG_A6XX_SP_HS_TSIZE;
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
sb = SB6_DS_TEX;
opcode = CP_LOAD_STATE6_GEOM;
tex_samp_reg = REG_A6XX_SP_DS_SAMPLER_BASE;

4
src/gallium/drivers/freedreno/freedreno_program.c
View file

@ -90,8 +90,8 @@ fd_tes_state_bind(struct pipe_context *pctx, void *hwcso) in_dt
{
struct fd_context *ctx = fd_context(pctx);
ctx->prog.ds = hwcso;
fd_context_dirty_shader(ctx, PIPE_SHADER_TESS_EVAL, FD_DIRTY_SHADER_PROG);
update_bound_stage(ctx, PIPE_SHADER_TESS_EVAL, !!hwcso);
fd_context_dirty_shader(ctx, MESA_SHADER_TESS_EVAL, FD_DIRTY_SHADER_PROG);
update_bound_stage(ctx, MESA_SHADER_TESS_EVAL, !!hwcso);
}
static void

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -209,7 +209,7 @@ fd_init_shader_caps(struct fd_screen *screen)
switch (i) {
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
case PIPE_SHADER_GEOMETRY:
if (!is_a6xx(screen))
continue;

2
src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
View file

@ -37,7 +37,7 @@ ir3_shader_descriptor_set(enum pipe_shader_type shader)
switch (shader) {
case MESA_SHADER_VERTEX: return 0;
case MESA_SHADER_TESS_CTRL: return 1;
case PIPE_SHADER_TESS_EVAL: return 2;
case MESA_SHADER_TESS_EVAL: return 2;
case PIPE_SHADER_GEOMETRY: return 3;
case PIPE_SHADER_FRAGMENT: return 4;
case PIPE_SHADER_COMPUTE: return 0;

12
src/gallium/drivers/llvmpipe/lp_draw_arrays.c
View file

@ -116,8 +116,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
lp->num_sampler_views[MESA_SHADER_TESS_CTRL],
lp->sampler_views[MESA_SHADER_TESS_CTRL]);
llvmpipe_prepare_tess_eval_sampling(lp,
lp->num_sampler_views[PIPE_SHADER_TESS_EVAL],
lp->sampler_views[PIPE_SHADER_TESS_EVAL]);
lp->num_sampler_views[MESA_SHADER_TESS_EVAL],
lp->sampler_views[MESA_SHADER_TESS_EVAL]);
llvmpipe_prepare_vertex_images(lp,
lp->num_images[MESA_SHADER_VERTEX],
@ -129,8 +129,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
lp->num_images[MESA_SHADER_TESS_CTRL],
lp->images[MESA_SHADER_TESS_CTRL]);
llvmpipe_prepare_tess_eval_images(lp,
lp->num_images[PIPE_SHADER_TESS_EVAL],
lp->images[PIPE_SHADER_TESS_EVAL]);
lp->num_images[MESA_SHADER_TESS_EVAL],
lp->images[MESA_SHADER_TESS_EVAL]);
if (lp->gs && lp->gs->no_tokens) {
/* we have an empty geometry shader with stream output, so
attach the stream output info to the current vertex shader */
@ -171,12 +171,12 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_VERTEX);
llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_GEOMETRY);
llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_TESS_CTRL);
llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_TESS_EVAL);
llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_TESS_EVAL);
llvmpipe_cleanup_stage_images(lp, MESA_SHADER_VERTEX);
llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_GEOMETRY);
llvmpipe_cleanup_stage_images(lp, MESA_SHADER_TESS_CTRL);
llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_TESS_EVAL);
llvmpipe_cleanup_stage_images(lp, MESA_SHADER_TESS_EVAL);
/*
* TODO: Flush only when a user vertex/index buffer is present

2
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -134,7 +134,7 @@ llvmpipe_init_shader_caps(struct pipe_screen *screen)
gallivm_init_shader_caps(caps);
break;
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
draw_init_shader_caps(caps);

6
src/gallium/drivers/llvmpipe/lp_state_fs.c
View file

@ -4247,7 +4247,7 @@ llvmpipe_set_constant_buffer(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL: {
case MESA_SHADER_TESS_EVAL: {
const unsigned size = cb ? cb->buffer_size : 0;
const uint8_t *data = NULL;
@ -4304,7 +4304,7 @@ llvmpipe_set_shader_buffers(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL: {
case MESA_SHADER_TESS_EVAL: {
const unsigned size = buffer ? buffer->buffer_size : 0;
const uint8_t *data = NULL;
if (buffer && buffer->buffer)
@ -4364,7 +4364,7 @@ llvmpipe_set_shader_images(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
draw_set_images(llvmpipe->draw, shader, llvmpipe->images[shader],
start_slot + count);
break;

8
src/gallium/drivers/llvmpipe/lp_state_sampler.c
View file

@ -100,7 +100,7 @@ llvmpipe_bind_sampler_states(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
draw_set_samplers(llvmpipe->draw,
shader,
llvmpipe->samplers[shader],
@ -183,7 +183,7 @@ llvmpipe_set_sampler_views(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
draw_set_sampler_views(llvmpipe->draw,
shader,
llvmpipe->sampler_views[shader],
@ -426,7 +426,7 @@ llvmpipe_prepare_tess_eval_sampling(struct llvmpipe_context *lp,
unsigned num,
struct pipe_sampler_view **views)
{
prepare_shader_sampling(lp, num, views, PIPE_SHADER_TESS_EVAL);
prepare_shader_sampling(lp, num, views, MESA_SHADER_TESS_EVAL);
}
@ -585,7 +585,7 @@ llvmpipe_prepare_tess_eval_images(struct llvmpipe_context *lp,
unsigned num,
struct pipe_image_view *views)
{
prepare_shader_images(lp, num, views, PIPE_SHADER_TESS_EVAL);
prepare_shader_images(lp, num, views, MESA_SHADER_TESS_EVAL);
}

2
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
View file

@ -1242,7 +1242,7 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
{
info_out->target = info->target;
info_out->type = info->type;
if (info->type == MESA_SHADER_TESS_CTRL || info->type == PIPE_SHADER_TESS_EVAL) {
if (info->type == MESA_SHADER_TESS_CTRL || info->type == MESA_SHADER_TESS_EVAL) {
info_out->prop.tp.domain = MESA_PRIM_COUNT;
info_out->prop.tp.outputPrim = MESA_PRIM_COUNT;
}

2
src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
View file

@ -984,7 +984,7 @@ nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
info_out->prop.vp.usesDrawParameters ? "true" : "false");
break;
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
INFO(" \"tp\":{\n");
INFO(" \"outputPatchSize\":\"%d\"\n", info_out->prop.tp.outputPatchSize);
INFO(" \"partitioning\":\"%d\"\n", info_out->prop.tp.partitioning);

4
src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
View file

@ -113,7 +113,7 @@ nv50_ir_prog_info_out_serialize(struct blob *blob,
blob_write_bytes(blob, &info_out->prop.vp, sizeof(info_out->prop.vp));
break;
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
blob_write_bytes(blob, &info_out->prop.tp, sizeof(info_out->prop.tp));
break;
case PIPE_SHADER_GEOMETRY:
@ -233,7 +233,7 @@ nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
blob_copy_bytes(&reader, &info_out->prop.vp, sizeof(info_out->prop.vp));
break;
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
blob_copy_bytes(&reader, &info_out->prop.tp, sizeof(info_out->prop.tp));
break;
case PIPE_SHADER_GEOMETRY:

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -108,7 +108,7 @@ nv50_init_shader_caps(struct nv50_screen *screen)
struct pipe_shader_caps *caps =
(struct pipe_shader_caps *)&screen->base.base.shader_caps[i];
if (i == MESA_SHADER_TESS_CTRL || i == PIPE_SHADER_TESS_EVAL)
if (i == MESA_SHADER_TESS_CTRL || i == MESA_SHADER_TESS_EVAL)
continue;
caps->max_instructions =

2
src/gallium/drivers/nouveau/nvc0/nvc0_context.h
View file

@ -298,7 +298,7 @@ nvc0_shader_stage(unsigned pipe)
switch (pipe) {
case MESA_SHADER_VERTEX: return 0;
case MESA_SHADER_TESS_CTRL: return 1;
case PIPE_SHADER_TESS_EVAL: return 2;
case MESA_SHADER_TESS_EVAL: return 2;
case PIPE_SHADER_GEOMETRY: return 3;
case PIPE_SHADER_FRAGMENT: return 4;
case PIPE_SHADER_COMPUTE: return 5;

2
src/gallium/drivers/nouveau/nvc0/nvc0_program.c
View file

@ -696,7 +696,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
case MESA_SHADER_TESS_CTRL:
ret = nvc0_tcp_gen_header(prog, &info_out);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
ret = nvc0_tep_gen_header(prog, &info_out);
break;
case PIPE_SHADER_GEOMETRY:

2
src/gallium/drivers/nouveau/nvc0/nvc0_state.c
View file

@ -703,7 +703,7 @@ static void *
nvc0_tep_state_create(struct pipe_context *pipe,
const struct pipe_shader_state *cso)
{
return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_TESS_EVAL);
return nvc0_sp_state_create(pipe, cso, MESA_SHADER_TESS_EVAL);
}
static void

16
src/gallium/drivers/r600/evergreen_state.c
View file

@ -2399,7 +2399,7 @@ static void evergreen_emit_tes_constant_buffers(struct r600_context *rctx, struc
{
if (!rctx->tes_shader)
return;
evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_EVAL],
evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[MESA_SHADER_TESS_EVAL],
EG_FETCH_CONSTANTS_OFFSET_VS,
R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
R_028980_ALU_CONST_CACHE_VS_0,
@ -2501,7 +2501,7 @@ static void evergreen_emit_tes_sampler_views(struct r600_context *rctx, struct r
{
if (!rctx->tes_shader)
return;
evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].views,
evergreen_emit_sampler_views(rctx, &rctx->samplers[MESA_SHADER_TESS_EVAL].views,
EG_FETCH_CONSTANTS_OFFSET_VS + R600_MAX_CONST_BUFFERS, 0);
}
@ -2870,7 +2870,7 @@ static void evergreen_emit_tes_sampler_states(struct r600_context *rctx, struct
{
if (!rctx->tes_shader)
return;
evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL], 18,
evergreen_emit_sampler_states(rctx, &rctx->samplers[MESA_SHADER_TESS_EVAL], 18,
R_00A414_TD_VS_SAMPLER0_BORDER_INDEX, 0);
}
@ -4822,7 +4822,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, evergreen_emit_gs_constant_buffers, 0);
r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, evergreen_emit_ps_constant_buffers, 0);
r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_TESS_CTRL].atom, id++, evergreen_emit_tcs_constant_buffers, 0);
r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_EVAL].atom, id++, evergreen_emit_tes_constant_buffers, 0);
r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_TESS_EVAL].atom, id++, evergreen_emit_tes_constant_buffers, 0);
r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_COMPUTE].atom, id++, evergreen_emit_cs_constant_buffers, 0);
/* shader program */
r600_init_atom(rctx, &rctx->cs_shader_state.atom, id++, evergreen_emit_cs_shader, 0);
@ -4830,7 +4830,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].states.atom, id++, evergreen_emit_vs_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, evergreen_emit_gs_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL].states.atom, id++, evergreen_emit_tcs_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].states.atom, id++, evergreen_emit_tes_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_EVAL].states.atom, id++, evergreen_emit_tes_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, evergreen_emit_ps_sampler_states, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].states.atom, id++, evergreen_emit_cs_sampler_states, 0);
/* resources */
@ -4839,7 +4839,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views.atom, id++, evergreen_emit_vs_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, evergreen_emit_gs_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL].views.atom, id++, evergreen_emit_tcs_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].views.atom, id++, evergreen_emit_tes_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_EVAL].views.atom, id++, evergreen_emit_tes_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, evergreen_emit_ps_sampler_views, 0);
r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].views.atom, id++, evergreen_emit_cs_sampler_views, 0);
@ -4951,7 +4951,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_CTRL,
R600_LDS_INFO_CONST_BUFFER, false, NULL);
rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_EVAL,
R600_LDS_INFO_CONST_BUFFER, false, NULL);
return;
}
@ -5014,7 +5014,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_CTRL,
R600_LDS_INFO_CONST_BUFFER, false,
&rctx->lds_constbuf_pipe);
rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_EVAL,
R600_LDS_INFO_CONST_BUFFER, true,
&rctx->lds_constbuf_pipe);
}

2
src/gallium/drivers/r600/r600_asm.c
View file

@ -1832,7 +1832,7 @@ int r600_bytecode_build(struct r600_bytecode *bc)
if (bc->stack.max_entries)
bc->nstack = bc->stack.max_entries;
else if (bc->type == MESA_SHADER_VERTEX ||
bc->type == PIPE_SHADER_TESS_EVAL ||
bc->type == MESA_SHADER_TESS_EVAL ||
bc->type == MESA_SHADER_TESS_CTRL)
bc->nstack = 1;
}

2
src/gallium/drivers/r600/r600_pipe.c
View file

@ -279,7 +279,7 @@ static void r600_init_shader_caps(struct r600_screen *rscreen)
switch (i) {
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
case PIPE_SHADER_COMPUTE:
if (rscreen->b.family < CHIP_CEDAR)
continue;

2
src/gallium/drivers/r600/r600_pipe_common.h
View file

@ -52,7 +52,7 @@ struct u_log_context;
#define DBG_PS (1 << PIPE_SHADER_FRAGMENT)
#define DBG_GS (1 << PIPE_SHADER_GEOMETRY)
#define DBG_TCS (1 << MESA_SHADER_TESS_CTRL)
#define DBG_TES (1 << PIPE_SHADER_TESS_EVAL)
#define DBG_TES (1 << MESA_SHADER_TESS_EVAL)
#define DBG_CS (1 << PIPE_SHADER_COMPUTE)
#define DBG_ALL_SHADERS (DBG_FS - 1)
#define DBG_FS (1 << 6) /* fetch shader */

2
src/gallium/drivers/r600/r600_shader.c
View file

@ -230,7 +230,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
case MESA_SHADER_TESS_CTRL:
evergreen_update_hs_state(ctx, shader);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (key.tes.as_es)
evergreen_update_es_state(ctx, shader);
else

22
src/gallium/drivers/r600/r600_state_common.c
View file

@ -267,7 +267,7 @@ static void r600_set_clip_state(struct pipe_context *ctx,
rctx->driver_consts[MESA_SHADER_VERTEX].vs_ucp_dirty = true;
rctx->driver_consts[PIPE_SHADER_GEOMETRY].vs_ucp_dirty = true;
if (rctx->b.family >= CHIP_CEDAR)
rctx->driver_consts[PIPE_SHADER_TESS_EVAL].vs_ucp_dirty = true;
rctx->driver_consts[MESA_SHADER_TESS_EVAL].vs_ucp_dirty = true;
}
static void r600_set_stencil_ref(struct pipe_context *ctx,
@ -756,7 +756,7 @@ static int r600_get_hw_atomic_count(const struct pipe_context *ctx,
value = rctx->ps_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
rctx->vs_shader->info.file_count[TGSI_FILE_HW_ATOMIC];
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
value = rctx->ps_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
rctx->vs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
(rctx->gs_shader ? rctx->gs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] : 0);
@ -832,9 +832,9 @@ static inline void r600_shader_selector_key(const struct pipe_context *ctx,
}
break;
}
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
key->tes.as_es = (rctx->gs_shader != NULL);
key->tes.first_atomic_counter = r600_get_hw_atomic_count(ctx, PIPE_SHADER_TESS_EVAL);
key->tes.first_atomic_counter = r600_get_hw_atomic_count(ctx, MESA_SHADER_TESS_EVAL);
break;
case MESA_SHADER_TESS_CTRL:
key->tcs.prim_mode = rctx->tes_shader->info.properties[TGSI_PROPERTY_TES_PRIM_MODE];
@ -856,7 +856,7 @@ r600_shader_precompile_key(const struct pipe_context *ctx,
switch (sel->type) {
case MESA_SHADER_VERTEX:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
/* Assume no tess or GS for setting .as_es. In order to
* precompile with es, we'd need the other shaders we're linked
* with (see the link_shader screen method)
@ -1059,7 +1059,7 @@ static void *r600_create_tcs_state(struct pipe_context *ctx,
static void *r600_create_tes_state(struct pipe_context *ctx,
const struct pipe_shader_state *state)
{
return r600_create_shader_state(ctx, state, PIPE_SHADER_TESS_EVAL);
return r600_create_shader_state(ctx, state, MESA_SHADER_TESS_EVAL);
}
static void r600_bind_ps_state(struct pipe_context *ctx, void *state)
@ -1328,7 +1328,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
int last_vertex_stage = MESA_SHADER_VERTEX;
if (rctx->tes_shader)
last_vertex_stage = PIPE_SHADER_TESS_EVAL;
last_vertex_stage = MESA_SHADER_TESS_EVAL;
if (rctx->gs_shader)
last_vertex_stage = PIPE_SHADER_GEOMETRY;
@ -1346,7 +1346,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
if (info->vs_ucp_dirty) {
assert(sh == MESA_SHADER_VERTEX ||
sh == PIPE_SHADER_GEOMETRY ||
sh == PIPE_SHADER_TESS_EVAL);
sh == MESA_SHADER_TESS_EVAL);
if (!size) {
ptr = rctx->clip_state.state.ucp;
size = R600_UCP_SIZE;
@ -1601,7 +1601,7 @@ static void update_gs_block_state(struct r600_context *rctx, unsigned enable)
r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_GEOMETRY,
R600_GS_RING_CONST_BUFFER, false, &rctx->gs_rings.esgs_ring);
if (rctx->tes_shader) {
r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_EVAL,
R600_GS_RING_CONST_BUFFER, false, &rctx->gs_rings.gsvs_ring);
} else {
r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
@ -1612,7 +1612,7 @@ static void update_gs_block_state(struct r600_context *rctx, unsigned enable)
R600_GS_RING_CONST_BUFFER, false, NULL);
r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
R600_GS_RING_CONST_BUFFER, false, NULL);
r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_EVAL,
R600_GS_RING_CONST_BUFFER, false, NULL);
}
}
@ -2030,7 +2030,7 @@ static bool r600_update_derived_state(struct r600_context *rctx)
need_buf_const = rctx->tes_shader->current->shader.uses_tex_buffers ||
rctx->tes_shader->current->shader.has_txq_cube_array_z_comp;
if (need_buf_const) {
eg_setup_buffer_constants(rctx, PIPE_SHADER_TESS_EVAL);
eg_setup_buffer_constants(rctx, MESA_SHADER_TESS_EVAL);
}
if (rctx->tcs_shader) {
need_buf_const = rctx->tcs_shader->current->shader.uses_tex_buffers ||

2
src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp
View file

@ -222,7 +222,7 @@ TESShader::process_stage_intrinsic(nir_intrinsic_instr *intr)
void
TESShader::do_get_shader_info(r600_shader *sh_info)
{
sh_info->processor_type = PIPE_SHADER_TESS_EVAL;
sh_info->processor_type = MESA_SHADER_TESS_EVAL;
m_export_processor->get_shader_info(sh_info);
}

2
src/gallium/drivers/radeonsi/si_build_pm4.h
View file

@ -578,7 +578,7 @@ si_get_user_data_base(enum amd_gfx_level gfx_level, enum si_has_tess has_tess,
return R_00B430_SPI_SHADER_USER_DATA_HS_0;
}
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
/* TES can be bound as ES, VS, or not bound. */
if (has_tess) {
if (gfx_level >= GFX10) {

10
src/gallium/drivers/radeonsi/si_descriptors.c
View file

@ -2065,12 +2065,12 @@ void si_shader_change_notify(struct si_context *sctx)
sctx->ngg ? NGG_ON : NGG_OFF,
MESA_SHADER_VERTEX));
si_set_user_data_base(sctx, PIPE_SHADER_TESS_EVAL,
si_set_user_data_base(sctx, MESA_SHADER_TESS_EVAL,
si_get_user_data_base(sctx->gfx_level,
sctx->shader.tes.cso ? TESS_ON : TESS_OFF,
sctx->shader.gs.cso ? GS_ON : GS_OFF,
sctx->ngg ? NGG_ON : NGG_OFF,
PIPE_SHADER_TESS_EVAL));
MESA_SHADER_TESS_EVAL));
/* Update as_* flags in shader keys. Ignore disabled shader stages.
* as_ls = VS before TCS
@ -2238,7 +2238,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
sh_base[MESA_SHADER_VERTEX], gfx);
gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
sh_base[PIPE_SHADER_TESS_EVAL], gfx);
sh_base[MESA_SHADER_TESS_EVAL], gfx);
gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
sh_base[PIPE_SHADER_FRAGMENT], gfx);
gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),
@ -2268,7 +2268,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
sh_base[MESA_SHADER_VERTEX], gfx);
gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
sh_base[PIPE_SHADER_TESS_EVAL], gfx);
sh_base[MESA_SHADER_TESS_EVAL], gfx);
gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
sh_base[PIPE_SHADER_FRAGMENT], gfx);
gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),
@ -2299,7 +2299,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
sh_base[MESA_SHADER_VERTEX], gfx);
si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
sh_base[PIPE_SHADER_TESS_EVAL], gfx);
sh_base[MESA_SHADER_TESS_EVAL], gfx);
si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
sh_base[PIPE_SHADER_FRAGMENT], gfx);
si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),

2
src/gallium/drivers/radeonsi/si_sqtt.c
View file

@ -711,7 +711,7 @@ si_sqtt_pipe_to_rgp_shader_stage(union si_shader_key *key, enum pipe_shader_type
return RGP_HW_STAGE_VS;
case MESA_SHADER_TESS_CTRL:
return RGP_HW_STAGE_HS;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (key->ge.as_es)
return RGP_HW_STAGE_ES;
else if (key->ge.as_ngg)

6
src/gallium/drivers/radeonsi/si_state.c
View file

@ -1416,7 +1416,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
if (old_rs->clip_plane_enable != rs->clip_plane_enable) {
sctx->dirty_shaders_mask |=
BITFIELD_BIT(MESA_SHADER_VERTEX) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
}
@ -1761,7 +1761,7 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
si_update_ps_inputs_read_or_disabled(sctx);
sctx->dirty_shaders_mask |=
BITFIELD_BIT(MESA_SHADER_VERTEX) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_GEOMETRY) |
BITFIELD_BIT(PIPE_SHADER_FRAGMENT);
}
@ -2803,7 +2803,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
si_update_vrs_flat_shading(sctx);
sctx->dirty_shaders_mask |=
BITFIELD_BIT(MESA_SHADER_VERTEX) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_GEOMETRY) |
BITFIELD_BIT(PIPE_SHADER_FRAGMENT);

6
src/gallium/drivers/radeonsi/si_state_draw.cpp
View file

@ -45,7 +45,7 @@ static bool si_update_shaders(struct si_context *sctx)
bool is_vs_state_changed =
(sctx->dirty_shaders_mask & BITFIELD_BIT(MESA_SHADER_VERTEX)) != 0;
bool is_tess_state_changed =
((sctx->dirty_shaders_mask & (BITFIELD_BIT(MESA_SHADER_TESS_CTRL) | BITFIELD_BIT(PIPE_SHADER_TESS_EVAL))) != 0);
((sctx->dirty_shaders_mask & (BITFIELD_BIT(MESA_SHADER_TESS_CTRL) | BITFIELD_BIT(MESA_SHADER_TESS_EVAL))) != 0);
bool is_gs_state_changed =
(sctx->dirty_shaders_mask & BITFIELD_BIT(PIPE_SHADER_GEOMETRY)) != 0;
bool is_ps_state_changed =
@ -1021,7 +1021,7 @@ static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)
unsigned vs_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
MESA_SHADER_VERTEX);
unsigned tes_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
PIPE_SHADER_TESS_EVAL);
MESA_SHADER_TESS_EVAL);
unsigned gs_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
PIPE_SHADER_GEOMETRY);
unsigned gs_copy_base = R_00B130_SPI_SHADER_USER_DATA_VS_0;
@ -2358,7 +2358,7 @@ static void si_draw(struct pipe_context *ctx,
if (needs_shader_update) {
sctx->dirty_shaders_mask |=
(HAS_GS ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
(HAS_TESS ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
(HAS_TESS ? BITFIELD_BIT(MESA_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
}
}

14
src/gallium/drivers/radeonsi/si_state_shaders.cpp
View file

@ -2380,7 +2380,7 @@ void si_update_ps_inputs_read_or_disabled(struct si_context *sctx)
sctx->ps_inputs_read_or_disabled = ps_inputs_read_or_disabled;
sctx->dirty_shaders_mask |=
(sctx->shader.gs.cso ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
(sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
(sctx->shader.tes.cso ? BITFIELD_BIT(MESA_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
}
}
@ -2431,7 +2431,7 @@ void si_vs_ps_key_update_rast_prim_smooth_stipple(struct si_context *sctx)
if (vs_key->ge.opt.kill_pointsize != old_kill_pointsize) {
sctx->dirty_shaders_mask |=
BITFIELD_BIT(MESA_SHADER_VERTEX) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
}
@ -3677,7 +3677,7 @@ void si_update_common_shader_state(struct si_context *sctx, struct si_shader_sel
else
sctx->uses_bindless_images &= ~BITFIELD_BIT(type);
if (type == MESA_SHADER_VERTEX || type == PIPE_SHADER_TESS_EVAL || type == PIPE_SHADER_GEOMETRY)
if (type == MESA_SHADER_VERTEX || type == MESA_SHADER_TESS_EVAL || type == PIPE_SHADER_GEOMETRY)
sctx->ngg_culling = 0; /* this will be enabled on the first draw if needed */
si_invalidate_inlinable_uniforms(sctx, type);
@ -3891,7 +3891,7 @@ static void si_bind_tes_shader(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->atoms.s.tess_io_layout);
}
si_update_common_shader_state(sctx, sel, PIPE_SHADER_TESS_EVAL);
si_update_common_shader_state(sctx, sel, MESA_SHADER_TESS_EVAL);
si_select_draw_vbo(sctx);
bool ngg_changed = si_update_ngg(sctx);
@ -4668,7 +4668,7 @@ void si_update_tess_io_layout_state(struct si_context *sctx)
struct si_shader_selector *tcs = sctx->shader.tcs.cso;
bool tess_uses_primid = sctx->ia_multi_vgt_param_key.u.tess_uses_prim_id;
bool has_primid_instancing_bug = sctx->gfx_level == GFX6 && sctx->screen->info.max_se == 1;
unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL];
unsigned tes_sh_base = sctx->shader_pointers.sh_base[MESA_SHADER_TESS_EVAL];
uint8_t num_tcs_input_cp = sctx->patch_vertices;
assert(sctx->shader.tcs.current);
@ -4821,7 +4821,7 @@ static void gfx6_emit_tess_io_layout_state(struct si_context *sctx, unsigned ind
}
/* Set userdata SGPRs for TES. */
unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL];
unsigned tes_sh_base = sctx->shader_pointers.sh_base[MESA_SHADER_TESS_EVAL];
assert(tes_sh_base);
/* TES (as ES or VS) reuses the BaseVertex and DrawID user SGPRs that are used when
@ -4877,7 +4877,7 @@ static void gfx12_emit_tess_io_layout_state(struct si_context *sctx, unsigned in
sctx->tes_offchip_ring_va_sgpr);
/* Set userdata SGPRs for TES. */
unsigned tes_sh_base = sctx->shader_pointers.sh_base[PIPE_SHADER_TESS_EVAL];
unsigned tes_sh_base = sctx->shader_pointers.sh_base[MESA_SHADER_TESS_EVAL];
assert(tes_sh_base);
/* TES (as ES or VS) reuses the BaseVertex and DrawID user SGPRs that are used when

4
src/gallium/drivers/radeonsi/si_state_streamout.c
View file

@ -229,7 +229,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx, unsigned num_targ
/* to keep/remove streamout shader code as an optimization */
sctx->dirty_shaders_mask |=
BITFIELD_BIT(MESA_SHADER_VERTEX) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
}
@ -496,7 +496,7 @@ void si_update_prims_generated_query_state(struct si_context *sctx, unsigned typ
si_shader_change_notify(sctx);
sctx->dirty_shaders_mask |=
(sctx->shader.gs.cso ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
(sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
(sctx->shader.tes.cso ? BITFIELD_BIT(MESA_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
}
}
}

4
src/gallium/drivers/svga/svga_pipe_constants.c
View file

@ -74,7 +74,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
svga->dirty |= SVGA_NEW_GS_CONSTS;
else if (shader == MESA_SHADER_TESS_CTRL)
svga->dirty |= SVGA_NEW_TCS_CONSTS;
else if (shader == PIPE_SHADER_TESS_EVAL)
else if (shader == MESA_SHADER_TESS_EVAL)
svga->dirty |= SVGA_NEW_TES_CONSTS;
else if (shader == PIPE_SHADER_COMPUTE)
svga->dirty |= SVGA_NEW_CS_CONSTS;
@ -87,7 +87,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
svga->dirty |= SVGA_NEW_GS_CONST_BUFFER;
else if (shader == MESA_SHADER_TESS_CTRL)
svga->dirty |= SVGA_NEW_TCS_CONST_BUFFER;
else if (shader == PIPE_SHADER_TESS_EVAL)
else if (shader == MESA_SHADER_TESS_EVAL)
svga->dirty |= SVGA_NEW_TES_CONST_BUFFER;
else if (shader == PIPE_SHADER_COMPUTE)
svga->dirty |= SVGA_NEW_CS_CONST_BUFFER;

4
src/gallium/drivers/svga/svga_pipe_ts.c
View file

@ -131,7 +131,7 @@ svga_create_tes_state(struct pipe_context *pipe,
SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATETES);
tes = (struct svga_tes_shader *)
svga_create_shader(pipe, templ, PIPE_SHADER_TESS_EVAL,
svga_create_shader(pipe, templ, MESA_SHADER_TESS_EVAL,
sizeof(struct svga_tes_shader));
if (!tes)
@ -158,7 +158,7 @@ svga_bind_tes_state(struct pipe_context *pipe, void *shader)
svga->dirty |= SVGA_NEW_TES;
/* Check if the shader uses samplers */
svga_set_curr_shader_use_samplers_flag(svga, PIPE_SHADER_TESS_EVAL,
svga_set_curr_shader_use_samplers_flag(svga, MESA_SHADER_TESS_EVAL,
svga_shader_use_samplers(&tes->base));
}

4
src/gallium/drivers/svga/svga_screen.c
View file

@ -262,7 +262,7 @@ vgpu10_init_shader_caps(struct svga_screen *svgascreen)
switch (i) {
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (!sws->have_sm5)
continue;
break;
@ -296,7 +296,7 @@ vgpu10_init_shader_caps(struct svga_screen *svgascreen)
caps->max_inputs = VGPU11_MAX_HS_INPUT_CONTROL_POINTS;
caps->max_outputs = VGPU11_MAX_HS_OUTPUTS;
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
caps->max_inputs = VGPU11_MAX_DS_INPUT_CONTROL_POINTS;
caps->max_outputs = VGPU11_MAX_DS_OUTPUTS;
break;

2
src/gallium/drivers/svga/svga_shader.c
View file

@ -785,7 +785,7 @@ svga_new_shader_variant(struct svga_context *svga, enum pipe_shader_type type)
case MESA_SHADER_VERTEX:
variant = CALLOC(1, sizeof(struct svga_vs_variant));
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
variant = CALLOC(1, sizeof(struct svga_tes_variant));
break;
case MESA_SHADER_TESS_CTRL:

2
src/gallium/drivers/svga/svga_shader.h
View file

@ -540,7 +540,7 @@ svga_shader_type(enum pipe_shader_type shader)
return SVGA3D_SHADERTYPE_PS;
case MESA_SHADER_TESS_CTRL:
return SVGA3D_SHADERTYPE_HS;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return SVGA3D_SHADERTYPE_DS;
case PIPE_SHADER_COMPUTE:
return SVGA3D_SHADERTYPE_CS;

12
src/gallium/drivers/svga/svga_state_constants.c
View file

@ -365,7 +365,7 @@ svga_get_extra_tes_constants(struct svga_context *svga, float *dest)
/* common constants */
count += svga_get_extra_constants_common(svga, variant,
PIPE_SHADER_TESS_EVAL,
MESA_SHADER_TESS_EVAL,
dest);
assert(count <= MAX_EXTRA_CONSTS);
@ -887,7 +887,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
shader == PIPE_SHADER_GEOMETRY ||
shader == PIPE_SHADER_FRAGMENT ||
shader == MESA_SHADER_TESS_CTRL ||
shader == PIPE_SHADER_TESS_EVAL ||
shader == MESA_SHADER_TESS_EVAL ||
shader == PIPE_SHADER_COMPUTE);
cbuf = &svga->curr.constbufs[shader][0];
@ -909,7 +909,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
variant = svga->state.hw_draw.tcs;
extra_count = svga_get_extra_tcs_constants(svga, (float *) extras);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
variant = svga->state.hw_draw.tes;
extra_count = svga_get_extra_tes_constants(svga, (float *) extras);
break;
@ -1308,7 +1308,7 @@ emit_tes_consts(struct svga_context *svga, uint64_t dirty)
if (!variant)
return PIPE_OK;
ret = emit_consts_vgpu10(svga, PIPE_SHADER_TESS_EVAL);
ret = emit_consts_vgpu10(svga, MESA_SHADER_TESS_EVAL);
return ret;
}
@ -1328,7 +1328,7 @@ emit_tes_constbuf(struct svga_context *svga, uint64_t dirty)
/* SVGA_NEW_TES_CONSTBUF
*/
assert(svga_have_vgpu10(svga));
ret = emit_constbuf_vgpu10(svga, PIPE_SHADER_TESS_EVAL);
ret = emit_constbuf_vgpu10(svga, MESA_SHADER_TESS_EVAL);
return ret;
}
@ -1454,7 +1454,7 @@ update_rawbuf(struct svga_context *svga, uint64 dirty)
SVGA_NEW_FS_RAW_BUFFER, /* PIPE_SHADER_FRAGMENT */
SVGA_NEW_GS_RAW_BUFFER, /* PIPE_SHADER_GEOMETRY */
SVGA_NEW_TCS_RAW_BUFFER, /* MESA_SHADER_TESS_CTRL */
SVGA_NEW_TES_RAW_BUFFER, /* PIPE_SHADER_TESS_EVAL */
SVGA_NEW_TES_RAW_BUFFER, /* MESA_SHADER_TESS_EVAL */
};
for (enum pipe_shader_type shader = MESA_SHADER_VERTEX;

4
src/gallium/drivers/svga/svga_state_tgsi_transform.c
View file

@ -67,7 +67,7 @@ bind_shader(struct svga_context *svga,
case MESA_SHADER_TESS_CTRL:
svga->pipe.bind_tcs_state(&svga->pipe, shader);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
svga->pipe.bind_tes_state(&svga->pipe, shader);
break;
default:
@ -99,7 +99,7 @@ create_shader(struct svga_context *svga,
return svga->pipe.create_gs_state(&svga->pipe, state);
case MESA_SHADER_TESS_CTRL:
return svga->pipe.create_tcs_state(&svga->pipe, state);
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return svga->pipe.create_tes_state(&svga->pipe, state);
default:
return NULL;

2
src/gallium/drivers/svga/svga_state_ts.c
View file

@ -142,7 +142,7 @@ make_tes_key(struct svga_context *svga, struct svga_compile_key *key)
/*
* SVGA_NEW_TEXTURE_BINDING | SVGA_NEW_SAMPLER
*/
svga_init_shader_key_common(svga, PIPE_SHADER_TESS_EVAL, &tes->base, key);
svga_init_shader_key_common(svga, MESA_SHADER_TESS_EVAL, &tes->base, key);
assert(svga->curr.tcs);

2
src/gallium/drivers/svga/svga_tgsi.c
View file

@ -478,7 +478,7 @@ svga_tgsi_scan_shader(struct svga_shader *shader)
}
}
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
info->tes.prim_mode =
tgsi_info->properties[TGSI_PROPERTY_TES_PRIM_MODE];

38
src/gallium/drivers/svga/svga_tgsi_vgpu10.c
View file

@ -667,7 +667,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
index >= VGPU10_MAX_PS_INPUTS) ||
(emit->unit == MESA_SHADER_TESS_CTRL &&
index >= VGPU11_MAX_HS_INPUT_CONTROL_POINTS) ||
(emit->unit == PIPE_SHADER_TESS_EVAL &&
(emit->unit == MESA_SHADER_TESS_EVAL &&
index >= VGPU11_MAX_DS_INPUT_CONTROL_POINTS)) {
emit->register_overflow = true;
}
@ -690,7 +690,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
index >= VGPU10_MAX_PS_OUTPUTS) ||
(emit->unit == MESA_SHADER_TESS_CTRL &&
index >= VGPU11_MAX_HS_OUTPUTS + 2) ||
(emit->unit == PIPE_SHADER_TESS_EVAL &&
(emit->unit == MESA_SHADER_TESS_EVAL &&
index >= VGPU11_MAX_DS_OUTPUTS)) {
emit->register_overflow = true;
}
@ -823,7 +823,7 @@ translate_shader_type(unsigned type)
return VGPU10_PIXEL_SHADER;
case MESA_SHADER_TESS_CTRL:
return VGPU10_HULL_SHADER;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return VGPU10_DOMAIN_SHADER;
case PIPE_SHADER_COMPUTE:
return VGPU10_COMPUTE_SHADER;
@ -1276,7 +1276,7 @@ emit_dst_register(struct svga_shader_emitter_v10 *emit,
if (file == TGSI_FILE_OUTPUT) {
if (emit->unit == MESA_SHADER_VERTEX ||
emit->unit == PIPE_SHADER_GEOMETRY ||
emit->unit == PIPE_SHADER_TESS_EVAL) {
emit->unit == MESA_SHADER_TESS_EVAL) {
if (index == emit->vposition.out_index &&
emit->vposition.tmp_index != INVALID_INDEX) {
/* replace OUTPUT[POS] with TEMP[POS]. We need to store the
@ -1762,7 +1762,7 @@ emit_src_register(struct svga_shader_emitter_v10 *emit,
}
}
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
if (file == TGSI_FILE_SYSTEM_VALUE) {
if (index == emit->tes.tesscoord_sys_index) {
/**
@ -3198,7 +3198,7 @@ emit_domain_shader_declarations(struct svga_shader_emitter_v10 *emit)
{
VGPU10OpcodeToken0 opcode0;
assert(emit->unit == PIPE_SHADER_TESS_EVAL);
assert(emit->unit == MESA_SHADER_TESS_EVAL);
/* Emit the input control point count */
assert(emit->key.tes.vertices_per_patch >= 0 &&
@ -4850,7 +4850,7 @@ emit_system_value_declaration(struct svga_shader_emitter_v10 *emit,
if (emit->unit == MESA_SHADER_TESS_CTRL) {
emit->tcs.prim_id_index = index;
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
emit->tes.prim_id_index = index;
emit_input_declaration(emit, VGPU10_OPCODE_DCL_INPUT,
VGPU10_OPERAND_TYPE_INPUT_PRIMITIVEID,
@ -5506,7 +5506,7 @@ emit_input_declarations(struct svga_shader_emitter_v10 *emit)
case MESA_SHADER_TESS_CTRL:
emit_tcs_input_declarations(emit);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
emit_tes_input_declarations(emit);
break;
case PIPE_SHADER_COMPUTE:
@ -5546,7 +5546,7 @@ emit_output_declarations(struct svga_shader_emitter_v10 *emit)
case MESA_SHADER_TESS_CTRL:
emit_tcs_output_declarations(emit);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
emit_tes_output_declarations(emit);
break;
case PIPE_SHADER_COMPUTE:
@ -5744,7 +5744,7 @@ emit_temporaries_declaration(struct svga_shader_emitter_v10 *emit)
emit->fs.sample_pos_tmp_index = total_temps++;
}
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
if (emit->vposition.need_prescale) {
emit->vposition.tmp_index = total_temps++;
emit->vposition.prescale_scale_index = total_temps++;
@ -6841,7 +6841,7 @@ emit_clip_distance_from_vpos(struct svga_shader_emitter_v10 *emit,
assert(emit->unit == MESA_SHADER_VERTEX ||
emit->unit == PIPE_SHADER_GEOMETRY ||
emit->unit == PIPE_SHADER_TESS_EVAL);
emit->unit == MESA_SHADER_TESS_EVAL);
for (i = 0; i < num_clip_planes; i++) {
struct tgsi_full_dst_register dst;
@ -6881,7 +6881,7 @@ emit_clip_vertex_instructions(struct svga_shader_emitter_v10 *emit)
assert(emit->unit == MESA_SHADER_VERTEX ||
emit->unit == PIPE_SHADER_GEOMETRY ||
emit->unit == PIPE_SHADER_TESS_EVAL);
emit->unit == MESA_SHADER_TESS_EVAL);
assert(emit->clip_mode == CLIP_VERTEX);
@ -12153,7 +12153,7 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
/* Set the current tcs phase to control point phase */
emit->tcs.control_point_phase = true;
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
emit_domain_shader_declarations(emit);
}
else if (emit->unit == PIPE_SHADER_COMPUTE) {
@ -12246,7 +12246,7 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
if (emit->info.uses_vertexid)
emit_vertex_id_nobase_instruction(emit);
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
emit_temp_tessfactor_instructions(emit);
}
@ -12437,7 +12437,7 @@ emit_post_helpers(struct svga_shader_emitter_v10 *emit)
emit_clipping_instructions(emit);
}
}
else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
else if (emit->unit == MESA_SHADER_TESS_EVAL) {
emit_vertex_instructions(emit);
}
@ -12832,7 +12832,7 @@ compute_input_mapping(struct svga_context *svga,
&svga->curr.tes->base : &svga->curr.vs->base);
} else if (unit == PIPE_SHADER_GEOMETRY) {
prevShader = svga->curr.tes ? &svga->curr.tes->base : &svga->curr.vs->base;
} else if (unit == PIPE_SHADER_TESS_EVAL) {
} else if (unit == MESA_SHADER_TESS_EVAL) {
assert(svga->curr.tcs);
prevShader = &svga->curr.tcs->base;
} else if (unit == MESA_SHADER_TESS_CTRL) {
@ -12924,7 +12924,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
unit == PIPE_SHADER_GEOMETRY ||
unit == PIPE_SHADER_FRAGMENT ||
unit == MESA_SHADER_TESS_CTRL ||
unit == PIPE_SHADER_TESS_EVAL ||
unit == MESA_SHADER_TESS_EVAL ||
unit == PIPE_SHADER_COMPUTE);
/* These two flags cannot be used together */
@ -13096,7 +13096,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
determine_clipping_mode(emit);
if (unit == PIPE_SHADER_GEOMETRY || unit == MESA_SHADER_VERTEX ||
unit == MESA_SHADER_TESS_CTRL || unit == PIPE_SHADER_TESS_EVAL) {
unit == MESA_SHADER_TESS_CTRL || unit == MESA_SHADER_TESS_EVAL) {
if (shader->stream_output != NULL || emit->clip_mode == CLIP_DISTANCE) {
/* if there is stream output declarations associated
* with this shader or the shader writes to ClipDistance
@ -13203,7 +13203,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
fs_variant->fs_shadow_compare_units = emit->shadow_compare_units;
}
else if (unit == PIPE_SHADER_TESS_EVAL) {
else if (unit == MESA_SHADER_TESS_EVAL) {
struct svga_tes_variant *tes_variant = svga_tes_variant(variant);
/* Keep track in the tes variant some of the layout parameters.

4
src/gallium/drivers/virgl/virgl_context.c
View file

@ -788,7 +788,7 @@ static void *virgl_create_tcs_state(struct pipe_context *ctx,
static void *virgl_create_tes_state(struct pipe_context *ctx,
const struct pipe_shader_state *shader)
{
return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_EVAL);
return virgl_shader_encoder(ctx, shader, MESA_SHADER_TESS_EVAL);
}
static void *virgl_create_gs_state(struct pipe_context *ctx,
@ -877,7 +877,7 @@ static void virgl_bind_tes_state(struct pipe_context *ctx,
uint32_t handle = (unsigned long)vss;
struct virgl_context *vctx = virgl_context(ctx);
virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_EVAL);
virgl_encode_bind_shader(vctx, handle, MESA_SHADER_TESS_EVAL);
}
static void virgl_bind_gs_state(struct pipe_context *ctx,

2
src/gallium/drivers/virgl/virgl_encode.c
View file

@ -1482,7 +1482,7 @@ int virgl_encode_link_shader(struct virgl_context *ctx, uint32_t *handles)
virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_FRAGMENT]);
virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_GEOMETRY]);
virgl_encoder_write_dword(ctx->cbuf, handles[MESA_SHADER_TESS_CTRL]);
virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_TESS_EVAL]);
virgl_encoder_write_dword(ctx->cbuf, handles[MESA_SHADER_TESS_EVAL]);
virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_COMPUTE]);
return 0;
}

4
src/gallium/drivers/virgl/virgl_screen.c
View file

@ -175,7 +175,7 @@ virgl_init_shader_caps(struct virgl_screen *vscreen)
switch (i) {
case MESA_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (!vscreen->caps.caps.v1.bset.has_tessellation_shaders)
continue;
break;
@ -212,7 +212,7 @@ virgl_init_shader_caps(struct virgl_screen *vscreen)
break;
}
FALLTHROUGH;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
if (vscreen->caps.caps.v2.host_feature_check_version >= 19) {
caps->max_outputs = vscreen->caps.caps.v2.max_tes_outputs;
break;

2
src/gallium/drivers/virgl/virgl_screen.h
View file

@ -97,7 +97,7 @@ virgl_shader_stage_convert(enum pipe_shader_type type)
return VIRGL_SHADER_VERTEX;
case MESA_SHADER_TESS_CTRL:
return VIRGL_SHADER_TESS_CTRL;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
return VIRGL_SHADER_TESS_EVAL;
case PIPE_SHADER_GEOMETRY:
return VIRGL_SHADER_GEOMETRY;

2
src/gallium/tools/trace/dump_state.py
View file

@ -414,7 +414,7 @@ class Context(Dispatcher):
return self._state.vs
if shader == 'MESA_SHADER_TESS_CTRL':
return self._state.tcs
if shader == 'PIPE_SHADER_TESS_EVAL':
if shader == 'MESA_SHADER_TESS_EVAL':
return self._state.tes
if shader == 'PIPE_SHADER_GEOMETRY':
return self._state.gs

2
src/intel/compiler/brw_compiler.c
View file

@ -84,7 +84,7 @@ const struct nir_shader_compiler_options brw_scalar_nir_options = {
.vertex_id_zero_based = true,
.scalarize_ddx = true,
.support_indirect_inputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL) |
BITFIELD_BIT(PIPE_SHADER_FRAGMENT),
.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
.per_view_unique_driver_locations = true,

4
src/mesa/state_tracker/st_atom_constbuf.c
View file

@ -81,7 +81,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, gl_shader_st
shader_type == PIPE_SHADER_FRAGMENT ||
shader_type == PIPE_SHADER_GEOMETRY ||
shader_type == MESA_SHADER_TESS_CTRL ||
shader_type == PIPE_SHADER_TESS_EVAL ||
shader_type == MESA_SHADER_TESS_EVAL ||
shader_type == PIPE_SHADER_COMPUTE);
/* update the ATI constants before rendering */
@ -350,7 +350,7 @@ st_bind_tes_ubos(struct st_context *st)
struct gl_program *prog =
st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
st_bind_ubos(st, prog, PIPE_SHADER_TESS_EVAL);
st_bind_ubos(st, prog, MESA_SHADER_TESS_EVAL);
}
void

2
src/mesa/state_tracker/st_atom_image.c
View file

@ -212,7 +212,7 @@ void st_bind_tes_images(struct st_context *st)
struct gl_program *prog =
st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
st_bind_images(st, prog, PIPE_SHADER_TESS_EVAL);
st_bind_images(st, prog, MESA_SHADER_TESS_EVAL);
}
void st_bind_cs_images(struct st_context *st)

2
src/mesa/state_tracker/st_atom_sampler.c
View file

@ -385,7 +385,7 @@ st_update_tesseval_samplers(struct st_context *st)
if (ctx->TessEvalProgram._Current) {
update_shader_samplers(st,
PIPE_SHADER_TESS_EVAL,
MESA_SHADER_TESS_EVAL,
ctx->TessEvalProgram._Current, NULL, NULL);
}
}

4
src/mesa/state_tracker/st_atom_shader.c
View file

@ -281,7 +281,7 @@ st_update_common_program(struct st_context *st, struct gl_program *prog,
key.st = st->has_shareable_shaders ? NULL : st;
if (pipe_shader == PIPE_SHADER_GEOMETRY ||
pipe_shader == PIPE_SHADER_TESS_EVAL) {
pipe_shader == MESA_SHADER_TESS_EVAL) {
key.clamp_color = st->clamp_vert_color_in_shader &&
st->ctx->Light._ClampVertexColor &&
(prog->info.outputs_written &
@ -334,7 +334,7 @@ st_update_tep(struct st_context *st)
{
void *shader = st_update_common_program(st,
st->ctx->TessEvalProgram._Current,
PIPE_SHADER_TESS_EVAL, &st->tep);
MESA_SHADER_TESS_EVAL, &st->tep);
cso_set_tesseval_shader_handle(st->cso_context, shader);
}

2
src/mesa/state_tracker/st_atom_storagebuf.c
View file

@ -128,7 +128,7 @@ void st_bind_tes_ssbos(struct st_context *st)
struct gl_program *prog =
st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
st_bind_ssbos(st, prog, PIPE_SHADER_TESS_EVAL);
st_bind_ssbos(st, prog, MESA_SHADER_TESS_EVAL);
}
void st_bind_cs_ssbos(struct st_context *st)

2
src/mesa/state_tracker/st_atom_texture.c
View file

@ -389,7 +389,7 @@ st_update_tesseval_textures(struct st_context *st)
const struct gl_context *ctx = st->ctx;
if (ctx->TessEvalProgram._Current) {
update_textures(st, PIPE_SHADER_TESS_EVAL,
update_textures(st, MESA_SHADER_TESS_EVAL,
ctx->TessEvalProgram._Current);
}
}

2
src/mesa/state_tracker/st_context.c
View file

@ -298,7 +298,7 @@ free_zombie_shaders(struct st_context *st)
st->ctx->NewDriverState |= ST_NEW_TCS_STATE;
st->pipe->delete_tcs_state(st->pipe, entry->shader);
break;
case PIPE_SHADER_TESS_EVAL:
case MESA_SHADER_TESS_EVAL:
st->ctx->NewDriverState |= ST_NEW_TES_STATE;
st->pipe->delete_tes_state(st->pipe, entry->shader);
break;

2
src/mesa/state_tracker/st_extensions.c
View file

@ -231,7 +231,7 @@ void st_init_limits(struct pipe_screen *screen,
/* reserve space in the default-uniform for lowered state */
if (sh == MESA_SHADER_VERTEX ||
sh == PIPE_SHADER_TESS_EVAL ||
sh == MESA_SHADER_TESS_EVAL ||
sh == PIPE_SHADER_GEOMETRY) {
if (!screen->caps.clip_planes)