Commit graph

89674 commits

Author SHA1 Message Date
Grazvydas Ignotas
61bbb25a08 util/disk_cache: fix size subtraction on 32bit
Negating size_t on 32bit produces a 32bit result. This was effectively
adding values close to UINT_MAX to the cache size (the files are usually
small) instead of intended subtraction.
Fixes 'make check' disk_cache failures on 32bit.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-03-09 20:26:30 +11:00
Grazvydas Ignotas
926bcacfd3 util/disk_cache: fix compressed size calculation
It incorrectly doubles the size on each iteration.

Fixes: 85a9b1b5 "util/disk_cache: compress individual cache entries"

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-03-09 20:26:23 +11:00
Lionel Landwerlin
f81ede4699 glsl: builtin: always return clones of the builtins
Builtins are created once and allocated using their own private ralloc
context. When reparenting IR that includes builtins, we might be steal
bits of builtins. This is problematic because these builtins might now
be freed when the shader that includes then last is disposed. This
might also lead to inconsistent ralloc trees/lists if shaders are
created on multiple threads.

Rather than including builtins directly into a shader's IR, we should
include clones of them in the ralloc context of the shader that
requires them. This fixes double free issues we've been seeing when
running shader-db on a big multicore (72 threads) server.

v2: Also rename _mesa_glsl_find_builtin_function_by_name() to better
    reflect how this function is used. (Ken)

v3: Rename ctx to mem_ctx (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-03-09 08:30:36 +00:00
Kenneth Graunke
071d80bde2 i965: Delete render ring prelude.
This was a hook I came up when trying to do the initial performance
counter work years ago.  Nothing's used it for a long time, and the
upcoming performance counter support doesn't want it either.

So, goodbye render ring prelude.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-03-08 23:01:21 -08:00
Vinson Lee
d64ded7b50 swr: s/uint/enum pipe_render_cond_flag/
Fix build error.

swr_context.cpp: In function ‘void swr_blit(pipe_context*, const pipe_blit_info*)’:
swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive]
                                       ctx->render_cond_mode);
                                       ~~~~~^~~~~~~~~~~~~~~~

Fixes: b0d3938430 ("gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100133
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-03-08 21:43:07 -08:00
Bas Nieuwenhuizen
7d6e1a341a radv: Don't flush the CB before doing a fast clear eliminate.
The only way we write CMASK/DCC compressed textures through shaders
is fast clears and CMASK/DCC inits, which have their own flushes.
Hence the CB cache is always up to date.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:28 +01:00
Bas Nieuwenhuizen
8700329785 radv: Don't emit cache flushes on subpass switch.
I think we should only flush right before an action (draw/dispatch etc.),
as otherwise it is too easy to issue redundant flushes.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:23 +01:00
Bas Nieuwenhuizen
9251f8b35e radv: Only flush for the needed stages, and before the flushes.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:19 +01:00
Bas Nieuwenhuizen
f92a118434 radv: Don't invalidate CB/DB for images that aren't modified outside CB/DB.
Without stores, the only writes are fast clears, transfers and metadata
initialization, each of which have the appropiate invalidations already.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:14 +01:00
Bas Nieuwenhuizen
0567ab0407 radv: Flush more caches after writes.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:10 +01:00
Bas Nieuwenhuizen
7a600bbc81 radv: Don't flush for fixed-function reading.
The data should always be in memory after a src flush.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:05 +01:00
Bas Nieuwenhuizen
dd094e4ff9 radv: Invalidate the correct caches for CB/DB dst barriers.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:35:01 +01:00
Bas Nieuwenhuizen
b075eb7d47 radv: Determine cache flushes per object.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-09 02:34:42 +01:00
Samuel Pitoiset
2568d9d0cd mesa/main: remove unused _mesa_new_texture_image()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2017-03-09 01:57:20 +01:00
Dave Airlie
e6902be900 radv/ac: fixup texture coord to have right number of channels.
Jason has patches to add validation to this area, this should fix
radv shaders.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-03-09 09:17:11 +10:00
Timothy Arceri
0e34966340 st/nine: pass NULL to ureg_get_tokens()
The number of tokens in never used and the pointer is NULL checked
so just pass NULL.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-03-09 09:29:07 +11:00
Matt Turner
a45cd8107d docs: ARB_shader_atomic_counter_ops is enabled on i965/gen7+.
This extension was enabled in commit 40dd45d0c6 ("i965: Enable
ARB_shader_atomic_counter_ops") but the commit failed to update the
release notes or features.txt. The release notes ship has sailed, since
the commit was in 13.0.
2017-03-08 13:58:52 -08:00
Eric Anholt
19f571ba6d vc4: Fix math with a condition flag set.
Math results land in r4, regardless of the condition.  To implement them,
we just need to ensure that the results are moved out of r4 (as often
happens anyway, the values is live across another math instruction), so
that we can attach the condition to the MOV.

Fixes dEQP-GLES2.functional.shaders.random.all_features.fragment.93 and a
couple others, that were assertion failing that their conditions hadn't
been handled during the QIR->QPU stage.
2017-03-08 13:44:17 -08:00
Eric Anholt
615f6653b0 vc4: Fix register pressure cost estimates when a src appears twice.
This ended up confusing the scheduler for things like fabs (implemented as
fmaxabs x, x) or squaring a number, and it would try to avoid scheduling
them because it appeared more expensive than other instructions.

Fixes failure to register allocate in
dEQP-GLES2.functional.uniform_api.random.3 with almost no shader-db
effects (+.35% max temps)
2017-03-08 13:44:17 -08:00
Eric Anholt
0fca01d027 vc4: Report to shader-db how many threads a fragment shader has.
Doing instruction count analysis when we emit the thread switches that
will save us from tons of stalls is kind of missing the point.
2017-03-08 13:44:17 -08:00
Eric Anholt
61359324c1 Revert "vc4: Lazily emit our FS/VS input loads."
This reverts commit 292c24ddac.  It broke a
lot of GLES2 deqp, and I see at least one problem that will require some
serious rework to fix.
2017-03-08 13:44:17 -08:00
Marek Olšák
ab12a126fd radeonsi: fix elimination of literal VS outputs
broken when switched to the new intrinsics.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-03-08 19:56:36 +01:00
Fabio Estevam
78c5772633 loader: Move non-error message to debug level
Currently when running mesa on imx6 the following loader warnings
are seen:

# kmscube -D /dev/dri/card1
MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
Using display 0x1920948 with EGL version 1.4

As this is not an error message, change it to debug level in
order to have a cleaner log output.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-08 16:35:00 +00:00
Mauro Rossi
61c38d14b7 android: r600: fix libmesa_amd_common dependency
Adding libmesa_amd_common dependency and exporting its headers,
avoids the following building error:

external/mesa/src/gallium/drivers/r600/evergreen_compute.c:29:10: fatal error: 'ac_binary.h' file not found
         ^
1 error generated.

Fixes: 3bbbb63 "automake: r600: radeonsi: correctly manage libamd_common.la linking"
Fixes: 503fb13 "radeon/ac: switch to ac_shader_binary_config_start()"

v2 [Emil Velikov: drop unneeded LOCAL_EXPORT_C_INCLUDE_DIRS]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-08 16:27:23 +00:00
Emil Velikov
1fe4d638a1 gallium/targets: rework the empty targets removal
Earlier commit added extra tracking and we've attempted to remove the
vdpau/other folder if empty. V2 of said commit dropped the pipe
to /dev/null and the explicit "true" override.

Sadly both of those are needed since there's no guarantee that the
folder will be empty before we [mesa] make install.

Since we're bringing those two back, there's no need to track if we've
installed anything, and simply do "rm -d foo/ &>/dev/null || true"

Tested-by: Andy Furniss <adf.lists@gmail.com>
Reported-by: Andy Furniss <adf.lists@gmail.com>
Fixes: 1cd4fde053 ("gallium/targets: don't leave an empty target directory(ies)")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-08 16:23:07 +00:00
Brian Paul
2f3f5728f7 util/indices: minor clean-ups
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:21 -07:00
Brian Paul
a0927da006 radeonsi: s/uint/enum pipe_shader_type/
This can probably be done in more places in the driver.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
b0d3938430 gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
2b9ab605aa gallium: s/uint/enum pipe_shader_type/ for set_constant_buffer()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
73bafb5ee3 gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
1564a768ae virgl: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
6614b060fb swr: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
f676c700cc softpipe: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
0fc5110a6e llvmpipe: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
4aec68176d freedreno: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
7532ed106f etnaviv: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
b4191b712b draw: s/unsigned/enum pipe_shader_type/
and some s/uint/enum pipe_shader_type/

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
ed66c9d7b8 cso: s/unsigned/enum pipe_shader_type/
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
637e5719b5 gallium: s/unsigned/enum pipe_shader_type/ for pipe_screen::get_shader_param()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Tapani Pälli
db5f9c3177 anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GB
This is what comment above definition says and change fixes issue with
32bit build where BLOCK_POOL_MEMFD_SIZE is used as ftruncate parameter
and constant currently gets converted from 4294967296 to 0.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-08 07:57:55 +02:00
Matt Turner
58b69eedd3 Revert "configure.ac: Use PKG_CHECK_VAR for wayland-scanner."
This reverts commit 8a26e94439.
2017-03-07 21:24:05 -08:00
Matt Turner
0b361f9d35 Revert "configure.ac: Use PKG_CHECK_VAR for libclc."
This reverts commit 706074cc96.
2017-03-07 21:24:05 -08:00
Chris Wilson
05520ba490 i965: Remove use of deprecated drm_intel_aub routines
With mesa/drm commit cd2f91e18db087edf93fed828e568ee53b887860
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Date:   Fri Jul 31 10:47:50 2015 -0700

    intel: Drop aub dumping functionality

the drm_intel_aub routines are mere stubs and do nothing. Likewise
remove our invocations.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-03-07 16:40:03 -08:00
Jason Ekstrand
4483c5d57c spirv: Silence unused variable warnings in release mode
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
0421813588 anv: Make the framebuffer-renderpass format assert non-fatal
This should let Dota 2 run on debug builds though it will spew errors
like mad.  Hopefully, Valve will get this fixed sooner rather than
later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
33301d949f anv: Drop the anv_validate block helper
Over the course of driver development, we've come up with a number of
different schemes for adding giant blocks of asserts inside the driver.
This one is only being used once in anv_pipeline.c and the way it's
being used actually generates compiler warnings in release builds.  This
commit drops the anv_validate macro and just puts the contents of the
one validation function in side of a "#ifdef DEBUG" guard.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
a316d8f406 anv: Get rid of the stub() macros
Except for a few unimplemented things on gen7, we don't really have
stubs anymore so we should drop this.  This commit replaces the few gen7
stub() calls with explicitly labeled finishme's and makes the sparse
binding stuff silently no-op or return a FEATURE_NOT_PRESENT error.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
1488d079cb anv: Remove a pointless finishme
We've been supporting multiple shaders per module for some time now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
1a43792783 anv: Convert the HiZ finishme's to perf_warn
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00
Jason Ekstrand
201fc83df7 anv: Add a performance warning helper
This acts identically to anv_finishme except that it only dumps out
these nice log messages if you run with INTEL_DEBUG=perf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-07 15:22:16 -08:00