Commit graph

44 commits

Author SHA1 Message Date
Michel Dänzer
e3befbca5e radeonsi: Handle TGSI_SEMANTIC_CLIPVERTEX
17 more little piglits.

NOTE: This is a candidate for the 9.1 branch.
2013-05-21 17:50:13 +02:00
Michel Dänzer
eb19163a4d radeonsi: Initial support for multiple constant buffers
Just enough to support an additional internal constant buffer for the user
clip planes.

NOTE: This is a candidate for the 9.1 branch.
2013-05-21 17:50:12 +02:00
Michel Dänzer
4730dea5f5 radeonsi: Fix handling of TGSI_SEMANTIC_PSIZE
Two more little piglits.

NOTE: This is a candidate for the 9.1 branch.
2013-05-21 17:50:12 +02:00
Tom Stellard
0ccf82c557 radeonsi: Remove si_pm4_inval_vertex_cache()
This function is a holdover from r600g and is identical to
si_pm4_inval_texture_cache(), so it is not needed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
2013-04-05 18:43:34 -04:00
Christian König
a0dca4409a radeonsi: add instance divisor support v3
v2: reduce key size, don't copy key around to much.
v3: remove key size reduction

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-04-02 13:01:43 +02:00
Christian König
cf9b31f78a radeonsi: add start instance support
This works different than on R600, we need to add the start instance manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2013-04-02 13:01:43 +02:00
Christian König
e4ed58763a radeonsi: add instanceid support
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2013-04-02 13:01:43 +02:00
Jerome Glisse
3f7d9710e8 radeonsi: add cs tracing v3
Same as on r600, trace cs execution by writting cs offset after each
states, this allow to pin point lockup inside command stream and
narrow down the scope of lockup investigation.

v2: Use WRITE_DATA packet instead of WRITE_MEM
v3: Remove useless nop packet

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-03-27 11:38:02 -04:00
Michel Dänzer
032e5548b3 radeonsi: Emit pixel shader state even when only the vertex shader changed
Fixes random failures with piglit glsl-max-varyings.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-03-21 15:12:31 +01:00
Michel Dänzer
4dca602521 radeonsi: Fix off-by-one for maximum vertex element index in some cases
In cases where the vertex element size is smaller than the vertex buffer
stride, the previous calculation could end up 1 too low. This would result
in the GPU using index 0 instead of the maximum index for those elements,
which would be visible as intermittent distorted triangles.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-12 18:25:54 +01:00
Michel Dänzer
b63b3012c9 radeonsi: Don't match TGSI_SEMANTIC_POSITION fs inputs to vs outputs 2013-02-21 10:07:18 +01:00
Michel Dänzer
18272c9b1b radeonsi: Fix up and enable flat shading.
Requires corresponding LLVM R600 backend fix to work correctly, but even
without that it doesn't hang anymore.

13 more little piglits.

Depends on LLVM: r175193, r175733

NOTE: This is a candidate for the 9.1 branch.
2013-02-21 09:14:36 +01:00
Michel Dänzer
a8a5055f2d radeonsi: Fix draws using user index buffer.
Was broken since commit bf469f4edc
('gallium: add void *user_buffer in pipe_index_buffer').

Fixes 11 piglit tests and lots of missing geometry e.g. in TORCS.

NOTE: This is a candidate for the 9.1 branch.
2013-02-01 18:53:03 +01:00
Marek Olšák
6f6112a2b9 radeonsi: More assorted depth/stencil changes ported from r600g.
[ Squashed port of the following r600g commits: - Michel Dänzer ]

commit 428e37c2da
Author: Marek Olšák <maraeo@gmail.com>
Date:   Tue Oct 2 22:02:54 2012 +0200

    r600g: add in-place DB decompression and texturing with DB tiling

    The decompression is done in-place and only the compressed tiles are
    decompressed. Note: R6xx-R7xx can do that only with Z16 and Z32F.

    The texture unit is programmed to use non-displayable tiling and depth
    ordering of samples, so that it can fetch the texture in the native DB format.

    The latest version of the libdrm surface allocator is required for stencil
    texturing to work. The old one didn't create the mipmap tree correctly.
    We need a separate mipmap tree for stencil, because the stencil mipmap
    offsets are not really depth offsets/4.

    There are still some known bugs, but this should save some memory and it also
    improves performance a little bit in Lightsmark (especially with low
    resolutions; tested with Radeon HD 5000).

    The DB->CB copy is still used for transfers.

commit e2f623f1d6
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sat Jul 28 13:55:59 2012 +0200

    r600g: don't decompress depth or stencil if there isn't any

commit 43e226b6ef
Author: Marek Olšák <maraeo@gmail.com>
Date:   Wed Jul 18 00:32:50 2012 +0200

    r600g: optimize uploading depth textures

    Make it only copy the portion of a depth texture being uploaded and
    not the whole 2D layer.

    There is also a little code cleanup.

commit b242adbe5c
Author: Marek Olšák <maraeo@gmail.com>
Date:   Wed Jul 18 00:17:46 2012 +0200

    r600g: remove needless wrapper r600_texture_depth_flush

commit 611dd52942
Author: Marek Olšák <maraeo@gmail.com>
Date:   Wed Jul 18 00:05:14 2012 +0200

    r600g: init_flushed_depth_texture should be able to report errors

commit 80755ff563
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sat Jul 14 17:06:27 2012 +0200

    r600g: properly track which textures are depth

    This fixes the issue with have_depth_texture never being set to false.

commit fe1fd67556
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sun Jul 8 03:10:37 2012 +0200

    r600g: don't flush depth textures set as colorbuffers

    The only case a depth buffer can be set as a color buffer is when flushing.

    That wasn't always the case, but now this code isn't required anymore.

commit 5a17d8318e
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sun Jul 8 02:14:18 2012 +0200

    r600g: flush depth textures bound to vertex shaders

    This was missing/broken. There are also minor code cleanups.

commit dee58f94af
Author: Marek Olšák <maraeo@gmail.com>
Date:   Sun Jul 8 01:54:24 2012 +0200

    r600g: do fine-grained depth texture flushing

    - maintain a mask of which mipmap levels are dirty (instead of one big flag)
    - only flush what was requested at a given point and not the whole resource
      (most often only one level and one layer has to be flushed)

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2013-01-21 15:42:28 +01:00
Michel Dänzer
1ace200b2b radeonsi: Set SPI_SHADER_COL_FORMAT to what the pixel shader actually exports.
Instead of deriving it from the colour buffer formats only.

Fixes a number of piglit tests which export depth from the pixel shader.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2013-01-17 16:57:21 +01:00
Michel Dänzer
1a616c1009 radeonsi: Flesh out support for depth/stencil exports from the pixel shader.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-11-28 13:35:16 +01:00
Michel Dänzer
7708a86464 radeonsi: Implement alpha testing in pixel shader.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-11-12 15:45:42 +01:00
Michel Dänzer
97078b198d radeonsi: Handle TGSI_SEMANTIC_FACE.
Fixes two piglit tests using gl_FrontFacing.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-10-26 15:51:18 +02:00
Michel Dänzer
691f08dbea radeonsi: Handle TGSI_SEMANTIC_BCOLOR.
Put the back face colour right after the front face colour in the LDS parameter
space.

Fixes 18 piglit tests related to two sided lighting.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-10-26 15:51:17 +02:00
Michel Dänzer
82e38ac91f radeonsi: Fix double compilation of shader variants.
Fixes crash in piglit glsl-max-varyings.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-02 17:53:47 +02:00
Michel Dänzer
c3db19efba radeonsi: Better indexing of parameters in the pixel shader.
We were previously using the TGSI input index, which can exceed the number of
parameters passed from the vertex shader via the parameter cache. Now we use
a separate index which only counts those parameters.

Prevents piglit regressions with the following fix.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-02 17:50:58 +02:00
Christian König
22ae062fa1 radeonsi: define SGPR register numbers
Instead of hardcoding them.

Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-10-01 10:29:50 +02:00
Christian Koenig
421eeff463 radeonsi: move draw cmds to si_commands.c
Signed-off-by: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-26 11:05:35 +02:00
Christian König
04473db38a radeonsi: start reworking inferred state handling
Instead of tracking the inferred state changes separately
just check if queued and emitted states are the same.

This patch just reworks the update of the SPI map between
vs and ps, but there are probably more cases like this.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-26 11:04:36 +02:00
Michel Dänzer
d67d8e2471 radeonsi: Fix calculation of number of records in buffer resource.
The value was too small by 1 in some cases (non-first of several vertex
elements interleaved in a single buffer).

Fixes intermittent incorrect geometry in many apps, e.g. piglit
spec/EXT_texture_snorm/fbo-generatemipmap-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-09-12 13:23:09 +02:00
Tom Stellard
0fb1e68a0b radeonsi: Handle position input parameter for pixel shaders v2
v2:
  - Don't increment ninterp or set any of the have_* flags for
    TGSI_SEMANTIC_POSITION

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
d3e58f75d2 radeonsi: Move interpolation mode check into the compiler
The compiler needs to know which interpolation modes are enabled, so
it knows which values will be preloaded into the VGPRs.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Tom Stellard
5fff032dd5 radeonsi: Add missing interpolation mode to check for enabled modes
At least one interpolation mode must be enable, but the code that checks
this was not checking for perspective center.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-11 14:53:47 -04:00
Christian König
f1fd94f355 radeonsi: fix stupid bug added in commit 07838603b9
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-30 10:23:32 +02:00
Michel Dänzer
f402acdbe2 radeonsi: Use FP16 shader export format when necessary / possible.
Fixes piglit fbo-blending-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:51:56 +02:00
Michel Dänzer
d1e40b3d40 radeonsi: Maintain cache of pixel shader variants according to contxt state.
Mostly inspired by r600g commit 4acf71f01e
('r600g: cache shader variants instead of rebuilding v3').

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:51:41 +02:00
Christian König
07838603b9 radeonsi: fix SPI_PS_INPUT_ENA handling
We need to enable at least one interpolation mode,
otherwise the GPU will hang.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-22 15:33:49 +02:00
Michel Dänzer
1b11395a36 radeonsi: Fix symbol conflicts with r600g.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50389

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-16 12:01:16 +02:00
Christian König
54de6f452c radeonsi: move vertex state descriptors into PM4 stream
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-15 22:13:19 +02:00
Christian König
9f5ff5981c radeonsi: move drawing into new state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-08-11 09:58:26 +02:00
Christian König
583c212115 radeonsi: move sync handling into new state handler
So we can remove all the old atom handling.

Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-08-11 09:58:26 +02:00
Christian König
303f4b7dcd radeonsi: separate and disable streamout for now
I have my doubts that this code still works on SI.

Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-08-11 09:58:26 +02:00
Christian König
696b6cf466 radeonsi: remove ps_partial_flush
Not needed any more.

Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-08-11 09:58:26 +02:00
Christian König
ce40e4726c radeonsi: cleanup shader headers
Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-08-11 09:58:25 +02:00
Michel Dänzer
82cd9c0fc2 radeonsi: If pixel shader compilation fails, use a dummy shader.
Otherwise we're likely to hang the GPU.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-08 15:33:38 +02:00
Christian König
b15e3ae5b4 radeonsi: fix vertex buffer and elements
Let's just use the T# descriptors until we get a fetch shader.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-07-30 14:45:32 +02:00
Christian König
fe41287ffa radeonsi: rename r600_resource to si_resource
Also split it into seperate header and add
some helper functions.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-07-30 14:44:38 +02:00
Christian König
de3335dba8 radeonsi: remove old state handling
Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-07-24 12:29:30 +02:00
Christian König
ca9cf611b6 radeonsi: move draw state into new handling
Split it out into si_state_draw.c

Signed-off-by: Christian König <deathsimple@vodafone.de>
2012-07-24 12:29:30 +02:00