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radeonsi: Handle TGSI_SEMANTIC_BCOLOR.
Put the back face colour right after the front face colour in the LDS parameter space. Fixes 18 piglit tests related to two sided lighting. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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parent
44ef033c25
commit
691f08dbea
5 changed files with 75 additions and 15 deletions
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@ -320,16 +320,59 @@ static void declare_input_fs(
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}
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/* XXX: Could there be more than TGSI_NUM_CHANNELS (4) ? */
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR &&
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si_shader_ctx->key.color_two_side) {
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LLVMValueRef args[3];
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LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
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unsigned soa_index = radeon_llvm_reg_index_soa(input_index, chan);
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args[0] = llvm_chan;
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args[1] = attr_number;
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LLVMValueRef face, is_face_positive;
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LLVMValueRef back_attr_number =
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lp_build_const_int32(gallivm,
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shader->input[input_index].param_offset + 1);
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face = build_intrinsic(gallivm->builder,
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"llvm.SI.fs.read.face",
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input_type,
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NULL, 0, LLVMReadNoneAttribute);
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is_face_positive = LLVMBuildFCmp(gallivm->builder,
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LLVMRealUGT, face,
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lp_build_const_float(gallivm, 0.0f),
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"");
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args[2] = params;
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si_shader_ctx->radeon_bld.inputs[soa_index] =
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build_intrinsic(base->gallivm->builder, intr_name,
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input_type, args, 3, LLVMReadOnlyAttribute);
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
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unsigned soa_index = radeon_llvm_reg_index_soa(input_index, chan);
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LLVMValueRef front, back;
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args[0] = llvm_chan;
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args[1] = attr_number;
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front = build_intrinsic(base->gallivm->builder, intr_name,
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input_type, args, 3, LLVMReadOnlyAttribute);
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args[1] = back_attr_number;
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back = build_intrinsic(base->gallivm->builder, intr_name,
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input_type, args, 3, LLVMReadOnlyAttribute);
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si_shader_ctx->radeon_bld.inputs[soa_index] =
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LLVMBuildSelect(gallivm->builder,
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is_face_positive,
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front,
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back,
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"");
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}
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shader->ninterp++;
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} else {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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LLVMValueRef args[3];
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LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
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unsigned soa_index = radeon_llvm_reg_index_soa(input_index, chan);
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args[0] = llvm_chan;
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args[1] = attr_number;
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args[2] = params;
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si_shader_ctx->radeon_bld.inputs[soa_index] =
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build_intrinsic(base->gallivm->builder, intr_name,
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input_type, args, 3, LLVMReadOnlyAttribute);
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}
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}
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}
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@ -530,6 +573,7 @@ static void si_llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
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break;
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case TGSI_SEMANTIC_COLOR:
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if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX) {
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case TGSI_SEMANTIC_BCOLOR:
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target = V_008DFC_SQ_EXP_PARAM + param_count;
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shader->output[i].param_offset = param_count;
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param_count++;
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@ -80,6 +80,7 @@ struct si_shader {
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struct si_shader_key {
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unsigned export_16bpc:8;
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unsigned nr_cbufs:4;
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unsigned color_two_side:1;
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};
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struct si_pipe_shader {
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@ -379,6 +379,8 @@ static void *si_create_rs_state(struct pipe_context *ctx,
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return NULL;
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}
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rs->two_side = state->light_twoside;
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polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
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state->fill_back != PIPE_POLYGON_MODE_FILL);
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@ -1841,9 +1843,10 @@ static INLINE struct si_shader_key si_shader_selector_key(struct pipe_context *c
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if (sel->fs_write_all)
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key.nr_cbufs = rctx->framebuffer.nr_cbufs;
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key.export_16bpc = rctx->export_16bpc;
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/*if (rctx->queued.named.rasterizer)
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key.flatshade = rctx->queued.named.rasterizer->flatshade;*/
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/*key.color_two_side |== rctx->two_side;*/
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if (rctx->queued.named.rasterizer) {
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key.color_two_side = rctx->queued.named.rasterizer->two_side;
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/*key.flatshade = rctx->queued.named.rasterizer->flatshade;*/
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}
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}
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return key;
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@ -43,6 +43,7 @@ struct si_state_viewport {
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struct si_state_rasterizer {
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struct si_pm4_state pm4;
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bool flatshade;
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bool two_side;
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unsigned sprite_coord_enable;
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unsigned pa_sc_line_stipple;
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unsigned pa_su_sc_mode_cntl;
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@ -328,11 +328,15 @@ static void si_update_spi_map(struct r600_context *rctx)
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unsigned i, j, tmp;
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for (i = 0; i < ps->ninput; i++) {
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unsigned name = ps->input[i].name;
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unsigned param_offset = ps->input[i].param_offset;
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bcolor:
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tmp = 0;
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#if 0
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/* XXX: Flat shading hangs the GPU */
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if (ps->input[i].name == TGSI_SEMANTIC_POSITION ||
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if (name == TGSI_SEMANTIC_POSITION ||
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ps->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
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(ps->input[i].interpolate == TGSI_INTERPOLATE_COLOR &&
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rctx->rasterizer && rctx->rasterizer->flatshade)) {
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@ -340,13 +344,13 @@ static void si_update_spi_map(struct r600_context *rctx)
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}
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#endif
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if (ps->input[i].name == TGSI_SEMANTIC_GENERIC &&
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if (name == TGSI_SEMANTIC_GENERIC &&
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rctx->sprite_coord_enable & (1 << ps->input[i].sid)) {
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tmp |= S_028644_PT_SPRITE_TEX(1);
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}
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for (j = 0; j < vs->noutput; j++) {
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if (ps->input[i].name == vs->output[j].name &&
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if (name == vs->output[j].name &&
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ps->input[i].sid == vs->output[j].sid) {
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tmp |= S_028644_OFFSET(vs->output[j].param_offset);
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break;
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@ -359,8 +363,15 @@ static void si_update_spi_map(struct r600_context *rctx)
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}
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si_pm4_set_reg(pm4,
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R_028644_SPI_PS_INPUT_CNTL_0 + ps->input[i].param_offset * 4,
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R_028644_SPI_PS_INPUT_CNTL_0 + param_offset * 4,
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tmp);
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if (name == TGSI_SEMANTIC_COLOR &&
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rctx->ps_shader->current->key.color_two_side) {
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name = TGSI_SEMANTIC_BCOLOR;
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param_offset++;
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goto bcolor;
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}
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}
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si_pm4_set_state(rctx, spi, pm4);
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