Commit graph

143113 commits

Author SHA1 Message Date
Lionel Landwerlin
8fcbcbcdd9 intel: remove 2 preproduction pci-id for ADLS
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d399c3e861 ("intel/dev: Add device info for ADL-S")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13476>
(cherry picked from commit 3b1a5b8f2b)
2021-11-24 15:47:19 -08:00
Marek Olšák
f1087928f8 driconf: disallow 10-bit pbuffers for viewperf2020/maya due to X errors
Cc: 21.2 21.3 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13472>
(cherry picked from commit 10ee261c38)
2021-11-24 15:47:19 -08:00
Dylan Baker
2c77e8f287 .pick_status.json: Update to 09bb4dbe60 2021-11-24 15:47:19 -08:00
Lionel Landwerlin
ca5a31432c intel/devinfo: fix wrong offset computation
A bit difficult to find what commit introduced the issue because of
all the renaming, but it was my bug :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
(cherry picked from commit 349bfb7275)
2021-11-24 15:47:19 -08:00
Lionel Landwerlin
fdc53e0ae6 intel/perf: fix perf equation subslice mask generation for gfx12+
v2: Fix comment change (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
(cherry picked from commit 67619d8153)
2021-11-24 15:47:19 -08:00
Lionel Landwerlin
bd7deb0686 intel/dev: don't forget to set max_eu_per_subslice in generated topology
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
(cherry picked from commit d7c6a90c26)
2021-11-24 15:47:19 -08:00
Lionel Landwerlin
20fa378805 intel/dev: fix HSW GT3 number of subslices in slice1
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
(cherry picked from commit d1db5d562a)
2021-11-24 15:47:19 -08:00
Pierre-Eric Pelloux-Prayer
4b0b826ec9 mesa: always call _mesa_update_pixel
10c75ae4 moved handling of this state to the functions that
depend on ctx->_ImageTransferState.

So we can't depend on _NEW_PIXEL being set to call this function,
since it'll be always clear earlier by _mesa_update_state_locked.

Example sequence that would trigger the issue:
  glPixelTransferi(...)
  glClear(...)
  glTexSubImage2D(...) <-- won't use the new value set by
                           glPixelTransferi because glClear caused
                           _NEW_PIXEL to be cleared.

_NEW_PIXEL itself is kept because st_update_pixel_transfer depends
on it.

Fixes: 10c75ae4 ("mesa: move _mesa_update_pixel out of _mesa_update_state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5273
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13596>
(cherry picked from commit 1ee3fbd703)
2021-11-24 15:47:19 -08:00
Marek Olšák
712ab9c343 radeonsi: fix a typo preventing a fast depth-stencil clear
Fixes: 9defe8aca9 - radeonsi: implement fast Z/S clears using clear_buffer on HTILE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
(cherry picked from commit 74adf22a0a)
2021-11-24 15:47:19 -08:00
Marek Olšák
07dcfc3837 radeonsi: fix 2 issues with depth_cleared_level_mask
- Unset depth_cleared_level_mask for non-clear blits. Set the flag after
  the clear, so that we don't have to check blitter_running.
- Set depth_cleared_level_mask only when we set depth_clear_value.

Fixes: ff8a930cf7 - radeonsi: add _once suffix to depth_cleared_level_mask

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
(cherry picked from commit 5d3aea49b8)
2021-11-24 15:47:19 -08:00
Mike Blumenkrantz
7c85d4fb63 zink: clamp PIPE_SHADER_CAP_MAX_INPUTS for xfb
vertex shader stages that can produce xfb must have
their input size clamped to the compiler define MAX_VARYING
to successfully be able to export an xfb output for each input

fixes KHR-GL46.geometry_shader.limits.max_input_components

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13632>
(cherry picked from commit 5d1b81d8ac)
2021-11-24 15:47:19 -08:00
Pierre-Eric Pelloux-Prayer
b3ed6626ae ac/surface: don't validate DCC settings if DCC isn't possible
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
(cherry picked from commit dbf602a6b3)
2021-11-24 15:47:19 -08:00
Pierre-Eric Pelloux-Prayer
8c9d526aa4 radeonsi: treat nir_intrinsic_load_constant as a VMEM operation
This is used by variable indexing of constant arrays, to build
code like this:

   s_add_u32 s6, s6, const_data@rel32@lo+4
   s_addc_u32 s7, s7, const_data@rel32@hi+12
   [...]
   global_load_dword v4, v4, s[6:7

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5118
Fixes: 8288882965 ("radeonsi: set MEM_ORDERED optimally")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
(cherry picked from commit dc56301f78)
2021-11-24 15:47:19 -08:00
Mike Blumenkrantz
5537232fca aux/primconvert: handle singular incomplete restarts
if no restart indices are found, this draw must be discarded to avoid
crashing later on

Fixes: 583070748c ("util/primconvert: handle rewriting of prim-restart draws with unsupported primtype")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13630>
(cherry picked from commit bc345281ab)
2021-11-24 15:47:19 -08:00
Dylan Baker
809dee45dd .pick_status.json: Update to 78b613db23 2021-11-24 15:47:18 -08:00
Dylan Baker
dc1fb02318 .pick_status.json: Mark a large number of zink patches as denominated 2021-11-24 15:47:18 -08:00
Jesse Natalie
5916624286 util/hash_table: Clear special 0/1 entries for u64 hash table too
Fixes: e532a47f ("util/hash_table: do not leak u64 struct key")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13390>
(cherry picked from commit ffd4157b1c)
2021-11-03 13:06:44 -07:00
Vadym Shovkoplias
1a1536ccbe intel/fs: Fix a cmod prop bug when cmod is set to inst that doesn't support it
Fixes dEQP-VK.reconvergence.*nesting* tests.

There are cases when cmod is set to an instruction that cannot have
conditional modifier. E.g. following:

 find_live_channel(32) vgrf166:UD,  NoMask
 cmp.z.f0.0(32) null:D, vgrf166+0.0<0>:D, 0d

is optimized to:

 find_live_channel.z.f0.0(32) vgrf166:UD,  NoMask

v2:
 - Add unit test to check cmod is not set to 'find_live_channel' (Matt Turner)
 - Update flag_subreg when conditonal_mod is updated (Ian Romanick)

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5431
Fixes: 32b7ba66b0 ("intel/compiler: fix cmod propagation optimisations")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13268>
(cherry picked from commit 2dbb66997e)
2021-11-03 13:06:43 -07:00
Dylan Baker
123cff212a .pick_status.json: Update to c356f3cfce 2021-11-03 13:06:40 -07:00
Mike Blumenkrantz
c95f5ba4d1 zink: force float dest types on some alu results
these aren't exact matches in spirv, so set the expected result type
to float where necessary

cc: mesa-stable

fixes #5567

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13562>
(cherry picked from commit 73af67883d)
2021-11-01 10:30:23 -07:00
Mike Blumenkrantz
15011982b5 zink: add more int/float types to cast switching in ntv
these come from opcode results, which are not always 32bit

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13562>
(cherry picked from commit c73f5a0082)
2021-11-01 10:30:23 -07:00
Mike Blumenkrantz
9ff1f615c1 zink: don't clamp 2D_ARRAY surfaces to 2D
another thing that used to be needed but now isn't

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13586>
(cherry picked from commit aa5e544644)
2021-11-01 10:03:04 -07:00
Mike Blumenkrantz
764b302ec2 zink: don't clamp cube array surfacess to cubes
this was probably necessary for some other reason that has since been fixed,
and instead now just creates validation spam

cc: mesa-stable

fixes #5566

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13586>
(cherry picked from commit 8d2280f533)
2021-11-01 10:03:03 -07:00
Mike Blumenkrantz
aa0ac4d3fc zink: inject LOD for sampler version of OpImageQuerySize
this is required by spec

cc: mesa-stable

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13585>
(cherry picked from commit e8f18385e0)
2021-11-01 10:02:54 -07:00
Mike Blumenkrantz
5cd36b4f87 zink: be more permissive for injecting LOD into texture() instructions
there's other variants of implicit lod sampling, and none of them are valid
outside fragment stage

Fixes: 3ad06b6949 ("zink: always use explicit lod for texture() when legal in non-fragment stages")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13585>
(cherry picked from commit 87fbb0eab0)
2021-11-01 10:02:53 -07:00
Dylan Baker
4062477cf7 .pick_status.json: Update to 79f57f6893 2021-11-01 10:02:50 -07:00
Marek Olšák
a5bddea115 radeonsi: print the border color error message only once
Cc: 21.2 21.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13590>
(cherry picked from commit 8bfa146b80)
2021-10-29 09:10:13 -07:00
Greg V
0c95b321cf util: make util_get_process_exec_path work on FreeBSD w/o procfs
sysctl is the correct way of getting the current executable's path.
procfs is not mounted by default.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1598>
(cherry picked from commit 98dbd01a96)
2021-10-29 09:10:12 -07:00
Kenneth Graunke
ace310e998 iris: Fix MOCS for buffer copies
We were passing a MOCS of 0, which is uncached.  Yikes.

Fixes: c5b22441f1 ("iris: Fix buffer -> buffer copy_region")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
(cherry picked from commit d8cb76211c)
2021-10-29 09:10:11 -07:00
Danylo Piliaiev
e8fd3214dc ir3/ra: Check register file upper bound when updating preferred_reg
Otherwise we could get invalid reg in get_reg()

Would fix many dEQP-VK.ssbo.phys.layout.*

Fixes: 0ffcb19b9d "ir3: Rewrite register allocation"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13546>
(cherry picked from commit aa264ded94)
2021-10-29 09:10:11 -07:00
Mike Blumenkrantz
b84542fe11 zink: always use explicit lod for texture() when legal in non-fragment stages
implicit lod is something else entirely

fixes #5566

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13563>
(cherry picked from commit 3ad06b6949)
2021-10-29 09:10:10 -07:00
Mike Blumenkrantz
c0a49bc4c9 zink: add better handling for CUBE_COMPATIBLE bit
this check was illegal because the usage bits weren't yet populated,
so add another check after usage bits are determined to figure out if
CUBE_COMPATIBLE can be applied

additionally, checking sample counts was never needed since the spec
prohibits CUBE_COMPATIBLE use with multisampling

zink DEBUG: ERR: 'Validation Error: [ VUID-vkGetPhysicalDeviceImageFormatProperties-usage-requiredbitmask ] Object 0: VK_NULL_HANDLE, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x991b3105 | vkGetPhysicalDeviceImageFormatProperties: value of usage must not be 0. The Vulkan spec states: usage must not be 0 (https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#VUID-vkGetPhysicalDeviceImageFormatProperties-usage-requiredbitmask)'

Fixes: 71494c4874 ("zink: only mark resources as cube-compatible if supported")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12580>
(cherry picked from commit 2de6beaa12)
2021-10-29 09:10:06 -07:00
Dylan Baker
5e05d43e13 .pick_status.json: Update to 8bfa146b80 2021-10-29 09:09:58 -07:00
Dylan Baker
eaa71b8b15 docs: add sha256 sums for 21.2.5 2021-10-28 10:42:02 -07:00
Dylan Baker
d152999345 VERSION: bump for 21.2.5 release 2021-10-28 09:48:59 -07:00
Dylan Baker
f206419dfc docs: add release notes for 21.2.5 2021-10-28 09:48:04 -07:00
Marcin Ślusarz
f1926fed4a intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13406>
2021-10-27 23:51:47 +00:00
Jason Ekstrand
702b0c31bd nir/algebraic: Lower fisfinite
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13552>
2021-10-27 23:15:34 +01:00
Mike Blumenkrantz
d2176e7ee6 nir/lower_samplers_as_deref: rewrite more image intrinsics
"I think we want to lower them."

-Jason "And I do know how the pass works" Ekstrand

fixes #5540

cc: mesa-stable

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13489>
(cherry picked from commit b0c40bc905)
2021-10-27 14:53:01 -07:00
Mike Blumenkrantz
29fac5d715 zink: fix gl_SampleMaskIn spirv generation
the uint[1] -> uint dance is only relevant on the first load, so move
the variable type shuffling inside the create block to avoid breaking successive
loads

fixes #5543

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13488>
(cherry picked from commit 8899f6a198)
2021-10-27 14:53:01 -07:00
Lionel Landwerlin
a29d40b563 anv: fix push constant lowering with bindless shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9fa1cdfe7f ("intel/rt: Implement push constants as global memory reads")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13529>
(cherry picked from commit a6031cd9bd)
2021-10-27 14:53:01 -07:00
Mike Blumenkrantz
34ddc2a5b5 zink: don't break early when applying fb clears
a resource can be bound to multiple fb attachments, each with
its own clear, so ensure that all of these are applied

fixes #5542

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13491>
(cherry picked from commit dabe477b4f)
2021-10-27 14:53:01 -07:00
Alyssa Rosenzweig
eadc3eca00 panfrost: Add internal afbc_formats
We need to know the internal (physical) formats used for AFBC of a given
logical format, in order to check format compatibility and determine if
we need to decompress AFBC for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
(cherry picked from commit 93c9123c31)
2021-10-27 14:53:01 -07:00
Timur Kristóf
f88826f2af drirc: Apply radv_invariant_geom workaround to Resident Evil Village.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5071
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13312>
(cherry picked from commit bbce747a0d)
2021-10-27 14:53:01 -07:00
Daniel Schürmann
55f3f08e97 driconf: set vk_x11_strict_image_count for Wolfenstein: Youngblood
Otherwise, the game refuses to start on xwayland.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13289>
(cherry picked from commit b34a3459f8)
2021-10-27 14:53:00 -07:00
Boris Brezillon
73b35cb7e8 vulkan: Fix entrypoint generation when compiling for x86 with MSVC
When compiling for x86 with MSVC, Vulkan API entry points follow the
__stdcall convention (VKAPI_CALL maps to __stdcall), which uses the
following name mangling:

   _<function_name>@<arguments_size>

Fix the vk_entrypoint_stub()/alternatename definitions accordingly.

Fixes: 6d44b21d4f ("vulkan: Fix weak symbol emulation when compiling with MSVC")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13516>
(cherry picked from commit 1813bb5917)
2021-10-27 14:53:00 -07:00
Dylan Baker
983b14a2c3 .pick_status.json: Update to 16f838576c 2021-10-27 14:53:00 -07:00
Alyssa Rosenzweig
d44a78c078 panfrost: Fix gl_FragColor lowering
The gl_FragColor lowering in the fragment shader depends on the number
of render targets, which can change every set_framebuffer_state.
set_framebuffer_state thus needs to force a rebind of the fragment
shader.

Fixes a regression in Piglit fbo-drawbuffers-none gl_FragColor -auto
-fbo from enabling AFBC on Mali G52.

Fixes: 28ac4d1e00 ("panfrost: Call nir_lower_fragcolor based on key")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13498>
(cherry picked from commit e0335ad888)
2021-10-27 14:53:00 -07:00
Alyssa Rosenzweig
b7917c7e56 panfrost,panvk: Use dev->has_afbc instead of quirks
This uses the new property for AFBC we've added. The AFBC quirk is
applied only to v4, and we only set dev->has_afbc on v5+ so this is not
a regression. It now respects the hardware-specific AFBC disable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
(cherry picked from commit 68a7fafe2a)
2021-10-27 14:53:00 -07:00
Alyssa Rosenzweig
f80f983226 panfrost: Detect implementations support AFBC
AFBC is an optional feature on Bifrost. If it is missing, a bit will be
set in the poorly named AFBC_FEATURES register. Check this so we can act
appropriately.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
(cherry picked from commit 3e168b97cc)
2021-10-27 14:53:00 -07:00