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radeonsi: fix a typo preventing a fast depth-stencil clear

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Fixes: 9defe8aca9 - radeonsi: implement fast Z/S clears using clear_buffer on HTILE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
This commit is contained in:
Marek Olšák 2021-10-30 11:43:42 -04:00 • committed by Marge Bot
parent c0f723ce2b
commit 74adf22a0a
1 changed files with 2 additions and 2 deletions
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4
src/gallium/drivers/radeonsi/si_clear.c
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@ -806,7 +806,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
update_db_depth_clear = true;
}
} else if ((*buffers & PIPE_BIND_DEPTH_STENCIL) == PIPE_BIND_DEPTH_STENCIL) {
} else if ((*buffers & PIPE_CLEAR_DEPTHSTENCIL) == PIPE_CLEAR_DEPTHSTENCIL) {
if (si_can_fast_clear_depth(zstex, level, depth, *buffers) &&
si_can_fast_clear_stencil(zstex, level, stencil, *buffers)) {
/* Combined Z+S clear. */
@ -881,7 +881,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
update_db_depth_clear = true;
}
} else if ((*buffers & PIPE_BIND_DEPTH_STENCIL) == PIPE_BIND_DEPTH_STENCIL) {
} else if ((*buffers & PIPE_CLEAR_DEPTHSTENCIL) == PIPE_CLEAR_DEPTHSTENCIL) {
if (htile_size &&
si_can_fast_clear_depth(zstex, level, depth, *buffers) &&
si_can_fast_clear_stencil(zstex, level, stencil, *buffers)) {