Commit graph

61379 commits

Author SHA1 Message Date
Francisco Jerez
8928d7860a i965/fs: Allocate the param_size array dynamically.
Useful because the total number of uniform components might exceed
MAX_UNIFORMS * 4 in some cases because of the image metadata we'll be
passing as push constants.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 19:03:56 +01:00
Francisco Jerez
eef710fc53 i965/fs: Use a separate variable to keep track of the last uniform index seen.
Like the VEC4 back-end does.  It will make dynamic allocation of the
param_size array easier in a future commit.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 19:03:56 +01:00
Rob Clark
9186cd39d4 freedreno: tweak ringbuffer sizes/count
Since we are now consuming two ringbuffers at a time, we probably want a
pool larger than 4.. but we don't need each individual ringbuffer to be
so large, so offset the pool size increase by reducing rb size.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-02-19 12:02:57 -05:00
Rob Clark
5993723471 freedreno/a3xx/compiler: scheduling/legalize fixes
It seems the write-after-read hazard that applies to texture fetch
instructions, also applies to sfu instructions.

Also, cat5/cat6 instructions do not have a (ss) bit, so in these
cases we need to insert a dummy nop instruction with (ss) bit set.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-02-19 12:01:26 -05:00
Francisco Jerez
bbf8239f92 i965: Have brw_imm_vf4() take the vector components as integer values.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:56:57 +01:00
Francisco Jerez
51b00c5cb9 i965: Add helper function to find out the signedness of a register type.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:56:57 +01:00
Francisco Jerez
560f10e573 i965/vec4: Use swizzle() in the ARB_vertex_program code.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
8797ccf3fa i965/fs: Use offset() in the ARB_fragment_program code.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
6f56d5dc60 i965/fs: Remove fs_reg::retype.
There doesn't seem to be any reason for it to be a method, and it's
surprising that the expression 'reg.retype(t)' doesn't retype its
object but rather it creates a temporary with the new type.  Use
'retype(reg, t)' instead.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
3b03273275 i965/vec4: Trivial improvements to the with_writemask() function.
Add assertion that the register is not in the HW_REG or IMM file,
calculate the conjunction of the old and new mask instead of replacing
the old [consistent with the behavior of brw_writemask(), causes no
functional changes right now], make it static inline to let the
compiler do a slightly better job at optimizing things, and shorten
its name.

v2: Assert that the new writemask is not zero to avoid undefined
    hardware behaviour.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
42b226ef82 i965: Make sure that backend_reg::type and brw_reg::type are consistent for fixed regs.
And define non-mutating helper functions to retype fixed and normal
regs with a common interface.  At some point we may want to get rid of
::fixed_hw_reg completely and have fixed regs use the normal register
data members (e.g. backend_reg::reg to select a fixed GRF number,
src_reg::swizzle to store the swizzle, etc.), I have the feeling that
this is not the last headache we're going to get because of the
multiple ways to represent the same thing and the different register
interface depending on the file a register is stored in...

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
98306e727b i965/vec4: Add non-mutating helper functions to modify src_reg::swizzle and ::negate.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
2337820d49 i965: Add non-mutating helper functions to modify the register offset.
Yes, we could avoid having four copies of essentially the same code by
using templates here.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
af25addcd0 i965/vec4: Fix off-by-one register class overallocation.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
a32817f3c2 i965: Unify fs_generator:: and vec4_generator::mark_surface_used as a free function.
This way it can be used anywhere.  I need it from the visitor.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:25 +01:00
Francisco Jerez
ae8b066da5 i965: Move up duplicated fields from stage-specific prog_data to brw_stage_prog_data.
There doesn't seem to be any reason for nr_params, nr_pull_params,
param, and pull_param to be duplicated in the stage-specific
subclasses of brw_stage_prog_data.  Moving their definition to the
common base class will allow some code sharing in a future commit, the
removal of brw_vec4_prog_data_compare and brw_*_prog_data_free, and
the simplification of the stage-specific brw_*_prog_data_compare.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 16:27:22 +01:00
Francisco Jerez
7f00c5f1a3 i965/vec4: Add constructor of src_reg from a fixed hardware reg.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2014-02-19 15:10:57 +01:00
Kenneth Graunke
98e048cf32 i965: Enable fast depth clears.
They work fine now, too.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
7023786417 i965: Enable HiZ on Broadwell.
It appears to work fine.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
8cad1c115a i965: Implement HiZ resolves on Broadwell.
Broadwell's 3DSTATE_WM_HZ_OP packet makes this much easier.

Instead of programming the whole pipeline, we simply have to emit the
depth/stencil packets, a state override, and a pipe control.  Then
arrange for the state to be put back.  This is easily done from a single
function.

v2: Use minify(mt->logical_{width,height}0, level) in 3DSTATE_WM_HZ_OP
    instead of intel_mipmap_level's width/height fields.  Those were
    based on the physical width/height, and thus wrong for MSAA buffers.
    Eric also deleted those fields.

v3: Use 0xFFFF as the sample mask regardless of what the user set (as
    this operation is unrelated); set the drawing rectangle to the
    miplevel being operated on, rather than the whole surface; remove
    unnecessary MAX2(..., 1) around mt->logical_depth0 (all suggested
    by Eric Anholt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
82711611cf i965: Refactor Gen8 depth packet emission.
The existing code followed the vtable function signature, which is not a
great fit: many of the parameters are unused, and the function still
inspects global state, making it less reusable.

This patch refactors the depth buffer packet emission code into a new
function which takes exactly the parameters it needs, and which uses no
global state.  It then makes the existing vtable function call the new
one.

Ideally, we would remove the vtable function, and clean up that
interface.  But that can happen once HiZ is working.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
67f073b91c i965: Add #defines for the 3DSTATE_WM_HZ_OP packet's contents.
We're going to need these to implement HiZ.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
577fdf1f48 i965: Bump generation check in code to disable HiZ at LODs > 0.
Broadwell's "HiZ Resolve" operation still has the restriction that the
rectangle primitive must be 8x4 aligned.  So I believe we still need
this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:17 -08:00
Kenneth Graunke
a5d2eb6b98 i965: Program 3DSTATE_HIER_DEPTH_BUFFER properly on Broadwell.
HiZ buffers still don't exist, but when they do, we'll set them up.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:16 -08:00
Kenneth Graunke
09d9a8913e i965: Pull format conversion logic out of brw_depthbuffer_format.
brw_depthbuffer_format is not very reusable at the moment, since it
uses global state (ctx->DrawBuffer) to access a particular depth buffer.

For HiZ on Broadwell, I need a function which simply converts the
formats.  However, at least one existing user of brw_depthbuffer_format
really wants the existing interface.  So, I've created a new function.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-19 01:46:16 -08:00
Chia-I Wu
4695f64895 egl: clarify what _eglInitResource does
It is a helper called from the initializers of its subclasses.
2014-02-19 13:08:54 +08:00
Chia-I Wu
dc97e54d97 Revert "egl: Unhide functionality in _eglInitContext()"
This reverts commit 1456ed85f0.
_eglInitResource can and is supposed to be called on subclass objects.

Acked-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2014-02-19 13:08:52 +08:00
Chia-I Wu
924490a747 Revert "egl: Unhide functionality in _eglInitSurface()"
This reverts commit 498d10e230.
_eglInitResource can and is supposed to be called on subclass objects.

Acked-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2014-02-19 13:08:44 +08:00
Kenneth Graunke
c593ad6e46 i965: Bump MaxTexMbytes from 1GB to 1.5GB.
Even with the other limits raised, TestProxyTexImage would still reject
textures > 1GB in size.  This is an artificial limit; nothing prevents
us from having a larger texture.  I stayed shy of 2GB to avoid the
larger-than-aperture situation.

For 3D textures, this raises the effective limit:
 - RGBA8:   645 -> 738
 - RGBA16:  512 -> 586
 - RGBA32F: 406 -> 465

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 18:59:24 -08:00
Kenneth Graunke
6c04423153 i965: Bump GL_MAX_CUBE_MAP_TEXTURE_SIZE to 8192.
Gen4+ supports 8192x8192 cube maps.  Ivybridge and later can actually
support 16384, but that would place GL_MAX_CUBE_MAP_TEXTURE_SIZE above
GL_MAX_TEXTURE_SIZE, which seems like a bad idea.

(Unfortunately, we can't bump GL_MAX_TEXTURE_SIZE to 16384 without
causing regressions due to awful W-tiled stencil buffer interactions.)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 18:59:18 -08:00
Kenneth Graunke
06b047ebc7 i965: Bump MAX_3D_TEXTURE_SIZE to 2048.
It's highly unlikely that there will be enough memory in the system to
allocate enough space for this, but we should still expose the hardware
limit.  It's what the Intel Windows driver does, and it seems most other
vendors do likewise.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74130
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 18:58:57 -08:00
Ian Romanick
f0fdee5095 docs: Trivial updates to MESA_query_renderer.spec
Fix the version and the status before sending to Khronos for listing in
the registry.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 15:25:04 -08:00
Sinclair Yeh
6c9d6898fd Prevent zero sized wl_egl_window
It is illegal to create or resize a window to zero (or negative) width
and/or height.  This patch prevents such a request from happening.
2014-02-18 14:12:11 -08:00
Anuj Phogat
03597cf802 glsl: Fix condition to generate shader link error
GL_ARB_ES2_compatibility doesn't say anything about shader linking
when one of the shaders (vertex or fragment shader) is absent. So,
the extension shouldn't change the behavior specified in GLSL
specification.

Tested the behavior on proprietary linux drivers of NVIDIA and AMD.
Both of them allow linking a version 100 shader program in OpenGL
context, when one of the shaders is absent.

Makes following Khronos CTS tests to pass:
successfulcompilevert_linkprogram.test
successfulcompilefrag_linkprogram.test

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 11:07:09 -08:00
Anuj Phogat
6bd2472a8b mesa: Add GL_TEXTURE_CUBE_MAP_ARRAY to legal_get_tex_level_parameter_target()
Fixes failing Khronos CTS test packed_depth_stencil_init.test

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-18 11:07:09 -08:00
Eric Anholt
d92f593d87 i965/fs: Use conditional sends to do FB writes on HSW+.
This drops the MOVs for header setup, which are totally mis-scheduled.

total instructions in shared programs: 1590047 -> 1589331 (-0.05%)
instructions in affected programs:     43729 -> 43013 (-1.64%)
GAINED:                                0
LOST:                                  0

glb27-trex:
x before
+ after
+-----------------------------------------------------------------------------+
|               +      x     xx        +  +    +                              |
|              ++  + xxx ++x xx + ** *x+  +  + +  x *                         |
|+x xx x*    x+++xx*x*xx+++*+*xx++** *x* x+***x*+xx+*     + *    +  +        *|
|               |__|__________MA___A___________|___|                          |
+-----------------------------------------------------------------------------+
    N           Min           Max        Median           Avg        Stddev
x  49         62.33         65.41         63.49      63.53449    0.62757822
+  50         62.28          65.4          63.7       63.6982      0.656564
No difference proven at 95.0% confidence

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-18 10:11:36 -08:00
Eric Anholt
4226798354 i965/fs: Drop dead comment about the old proj_attrib_mask optimization.
The code was removed early last year.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 10:01:45 -08:00
Eric Anholt
f128bcc7c2 i965: Drop mt->levels[].width/height.
It often confused people because it was unclear on whether it was the
physical or logical, and people needed the other one as well.  We can
recompute it trivially using the minify() macro, clarifying which value is
being used and making getting the other value obvious.

v2: Fix a pasteo in intel_blit.c's dst flip.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 10:01:45 -08:00
Eric Anholt
4e0924c5de i965: Move singlesample_mt to the renderbuffer.
Since only window system renderbuffers can have a singlesample_mt, this
lets us drop a bunch of sanity checking to make sure that we're just a
renderbuffer-like thing.

v2: Fix a badly-written comment (thanks Kenneth!), drop the now trivial
    helper function for set_needs_downsample.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 10:01:45 -08:00
Eric Anholt
019560c127 i965: Drop some duplicated code in DRI winsys BO updates.
The only DRI2 vs DRI3 delta was just how to decide about frontbuffer-ness
for doing the upsample.

v2: Fix missing singlesample_mt->region->name update in the merged code,
    which would have broken the DRI2 don't-recreate-the-miptree
    optimization.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:36 -08:00
Eric Anholt
0440e677b9 i965: Simplify intel_miptree_updownsample.
Pretty silly to pass in values dereferenced out of one of the arguments.

v2: Get the destination size from the dst, even though the callers are
    always dealing with src size == dst size cases.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:34 -08:00
Eric Anholt
bbd85ad27c i965: Don't try to use the ctx->ReadBuffer when asked to blorp miptrees.
So far it's happened to be that we're only ever calling
intel_miptree_blit() (up/downsampling) from the ReadBuffer, but I stumbled
over a null ReadBuffer case when debugging later parts of the series.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:32 -08:00
Eric Anholt
af4f758a44 i965: Make the mt->target of multisample renderbuffers be 2D_MS.
Mostly mt->target == 2D_MS just results in a few checks that we don't try
to allocate multiple LODs and don't try to do slice copies with them.  But
with the introduction of binding renderbuffers to textures, we need more
consistency.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:29 -08:00
Eric Anholt
4e4a537ad5 meta: Push into desktop GL mode when doing meta operations.
This lets us simplify our shaders, and rely on GLES-prohibited
functionality (like ARB_texture_multisample) when writing these
driver-internal functions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:27 -08:00
Eric Anholt
b3dcce65c9 meta: Fix blit shader compile on non-glsl-130 drivers.
Compare this VS to the one for the post-130 case.  Fixes piglit
glsl-lod-bias, and presumably tons of other code (I haven't done a full
piglit run on swrast).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74911
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-18 09:56:06 -08:00
Rob Clark
20d14ef263 configure: fix build error with XA
Fixes:

xa_tracker.c: In function 'xa_tracker_create':
 xa_tracker.c:147:5: error: implicit declaration of function 'pipe_loader_drm_probe_fd' [-Werror=implicit-function-declaration]

in some build configurations, as XA now implicitly depends on
gallium_drm_loader.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-02-18 08:12:37 -05:00
Michel Dänzer
cf0172d46a r600g,radeonsi: Consolidate logic for short-circuiting flushes
Fixes radeonsi emitting command streams to the kernel even when there
have been no draw calls before a flush, potentially powering up the GPU
needlessly.

Incidentally, this also cuts the runtime of piglit gpu.py in about half
on my Kaveri system, probably because an X11 client going away no longer
always results in a command stream being submitted to the kernel via
glamor.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65761
Cc: "10.1" mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-02-18 10:46:23 +09:00
Emil Velikov
adad8fb2e9 st/dri: remove #ifdef DRM_CAP_PRIME guard
Required for libdrm 2.4.37 and earlier. Both scons and automake
require version 2.4.38 now so that guard is not longer needed.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-18 00:08:26 +00:00
Emil Velikov
6fbd00e43a automake: remove leftover XORG and LIBKMS variables
No longer set or used since the removal of st/xorg.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-18 00:08:03 +00:00
Emil Velikov
4b3a4c799a scons: sync package requirements
xorg-server and libkms is no longer required since the removal
of the xorg state-tracker.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-18 00:04:07 +00:00