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i965/vec4: Fix off-by-one register class overallocation.

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Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Francisco Jerez 2013-11-22 19:21:13 -08:00
parent a32817f3c2
commit af25addcd0
1 changed files with 1 additions and 1 deletions
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2
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
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@ -121,7 +121,7 @@ brw_vec4_alloc_reg_set(struct brw_context *brw)
if (brw->gen >= 6)
ra_set_allocate_round_robin(brw->vec4.regs);
ralloc_free(brw->vec4.classes);
brw->vec4.classes = ralloc_array(brw, int, class_count + 1);
brw->vec4.classes = ralloc_array(brw, int, class_count);
/* Now, add the registers to their classes, and add the conflicts
* between them and the base GRF registers (and also each other).