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i965: Move up duplicated fields from stage-specific prog_data to brw_stage_prog_data.

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There doesn't seem to be any reason for nr_params, nr_pull_params,
param, and pull_param to be duplicated in the stage-specific
subclasses of brw_stage_prog_data.  Moving their definition to the
common base class will allow some code sharing in a future commit, the
removal of brw_vec4_prog_data_compare and brw_*_prog_data_free, and
the simplification of the stage-specific brw_*_prog_data_compare.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Francisco Jerez 2014-02-19 15:14:02 +01:00
parent 7f00c5f1a3
commit ae8b066da5
24 changed files with 162 additions and 188 deletions
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32
src/mesa/drivers/dri/i965/brw_context.h
View file

@ -332,8 +332,7 @@ struct brw_shader {
};
/* Note: If adding fields that need anything besides a normal memcmp() for
* comparing them, be sure to go fix the the stage-specific
* prog_data_compare().
* comparing them, be sure to go fix brw_stage_prog_data_compare().
*/
struct brw_stage_prog_data {
struct {
@ -351,6 +350,18 @@ struct brw_stage_prog_data {
uint32_t shader_time_start;
/** @} */
} binding_table;
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params;
/* Pointers to tracked values (only valid once
* _mesa_load_state_parameters has been called at runtime).
*
* These must be the last fields of the struct (see
* brw_stage_prog_data_compare()).
*/
const float **param;
const float **pull_param;
};
/* Data about a particular attempt to compile a program. Note that
@ -381,8 +392,6 @@ struct brw_wm_prog_data {
/** @} */
} binding_table;
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params;
bool dual_src_blend;
bool uses_pos_offset;
bool uses_omask;
@ -400,15 +409,6 @@ struct brw_wm_prog_data {
* For varying slots that are not used by the FS, the value is -1.
*/
int urb_setup[VARYING_SLOT_MAX];
/* Pointers to tracked values (only valid once
* _mesa_load_state_parameters has been called at runtime).
*
* These must be the last fields of the struct (see
* brw_wm_prog_data_compare()).
*/
const float **param;
const float **pull_param;
};
/**
@ -590,8 +590,6 @@ struct brw_vec4_prog_data {
GLuint curb_read_length;
GLuint urb_read_length;
GLuint total_grf;
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params; /**< number of dwords referenced by pull_param[] */
GLuint total_scratch;
/* Used for calculating urb partitions. In the VS, this is the size of the
@ -599,10 +597,6 @@ struct brw_vec4_prog_data {
* is the size of the URB entry used for output.
*/
GLuint urb_entry_size;
/* These pointers must appear last. See brw_vec4_prog_data_compare(). */
const float **param;
const float **pull_param;
};

12
src/mesa/drivers/dri/i965/brw_curbe.c
View file

@ -57,10 +57,10 @@ static void calculate_curbe_offsets( struct brw_context *brw )
{
struct gl_context *ctx = &brw->ctx;
/* CACHE_NEW_WM_PROG */
const GLuint nr_fp_regs = (brw->wm.prog_data->nr_params + 15) / 16;
const GLuint nr_fp_regs = (brw->wm.prog_data->base.nr_params + 15) / 16;
/* BRW_NEW_VERTEX_PROGRAM */
const GLuint nr_vp_regs = (brw->vs.prog_data->base.nr_params + 15) / 16;
const GLuint nr_vp_regs = (brw->vs.prog_data->base.base.nr_params + 15) / 16;
GLuint nr_clip_regs = 0;
GLuint total_regs;
@ -199,8 +199,8 @@ brw_upload_constant_buffer(struct brw_context *brw)
GLuint offset = brw->curbe.wm_start * 16;
/* copy float constants */
for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
buf[offset + i] = *brw->wm.prog_data->param[i];
for (i = 0; i < brw->wm.prog_data->base.nr_params; i++) {
buf[offset + i] = *brw->wm.prog_data->base.param[i];
}
}
@ -237,8 +237,8 @@ brw_upload_constant_buffer(struct brw_context *brw)
if (brw->curbe.vs_size) {
GLuint offset = brw->curbe.vs_start * 16;
for (i = 0; i < brw->vs.prog_data->base.nr_params; i++) {
buf[offset + i] = *brw->vs.prog_data->base.param[i];
for (i = 0; i < brw->vs.prog_data->base.base.nr_params; i++) {
buf[offset + i] = *brw->vs.prog_data->base.base.param[i];
}
}

65
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -912,7 +912,7 @@ fs_visitor::setup_uniform_values(ir_variable *ir)
* order we'd walk the type, so walk the list of storage and find anything
* with our name, or the prefix of a component that starts with our name.
*/
unsigned params_before = c->prog_data.nr_params;
unsigned params_before = stage_prog_data->nr_params;
for (unsigned u = 0; u < shader_prog->NumUserUniformStorage; u++) {
struct gl_uniform_storage *storage = &shader_prog->UniformStorage[u];
@ -928,14 +928,14 @@ fs_visitor::setup_uniform_values(ir_variable *ir)
slots *= storage->array_elements;
for (unsigned i = 0; i < slots; i++) {
c->prog_data.param[c->prog_data.nr_params++] =
stage_prog_data->param[stage_prog_data->nr_params++] =
&storage->storage[i].f;
}
}
/* Make sure we actually initialized the right amount of stuff here. */
assert(params_before + ir->type->component_slots() ==
c->prog_data.nr_params);
stage_prog_data->nr_params);
(void)params_before;
}
@ -968,7 +968,7 @@ fs_visitor::setup_builtin_uniform_values(ir_variable *ir)
break;
last_swiz = swiz;
c->prog_data.param[c->prog_data.nr_params++] =
stage_prog_data->param[stage_prog_data->nr_params++] =
&fp->Base.Parameters->ParameterValues[index][swiz].f;
}
}
@ -1404,7 +1404,7 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
void
fs_visitor::assign_curb_setup()
{
c->prog_data.curb_read_length = ALIGN(c->prog_data.nr_params, 8) / 8;
c->prog_data.curb_read_length = ALIGN(stage_prog_data->nr_params, 8) / 8;
if (dispatch_width == 8) {
c->prog_data.first_curbe_grf = c->nr_payload_regs;
} else {
@ -1733,10 +1733,10 @@ bool
fs_visitor::remove_dead_constants()
{
if (dispatch_width == 8) {
this->params_remap = ralloc_array(mem_ctx, int, c->prog_data.nr_params);
this->nr_params_remap = c->prog_data.nr_params;
this->params_remap = ralloc_array(mem_ctx, int, stage_prog_data->nr_params);
this->nr_params_remap = stage_prog_data->nr_params;
for (unsigned int i = 0; i < c->prog_data.nr_params; i++)
for (unsigned int i = 0; i < stage_prog_data->nr_params; i++)
this->params_remap[i] = -1;
/* Find which params are still in use. */
@ -1754,7 +1754,8 @@ fs_visitor::remove_dead_constants()
* "Out-of-bounds reads return undefined values, which include
* values from other variables of the active program or zero."
*/
if (constant_nr < 0 || constant_nr >= (int)c->prog_data.nr_params) {
if (constant_nr < 0 ||
constant_nr >= (int)stage_prog_data->nr_params) {
constant_nr = 0;
}
@ -1772,23 +1773,23 @@ fs_visitor::remove_dead_constants()
* now we don't care.
*/
unsigned int new_nr_params = 0;
for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
for (unsigned int i = 0; i < stage_prog_data->nr_params; i++) {
if (this->params_remap[i] != -1) {
this->params_remap[i] = new_nr_params++;
}
}
/* Update the list of params to be uploaded to match our new numbering. */
for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
for (unsigned int i = 0; i < stage_prog_data->nr_params; i++) {
int remapped = this->params_remap[i];
if (remapped == -1)
continue;
c->prog_data.param[remapped] = c->prog_data.param[i];
stage_prog_data->param[remapped] = stage_prog_data->param[i];
}
c->prog_data.nr_params = new_nr_params;
stage_prog_data->nr_params = new_nr_params;
} else {
/* This should have been generated in the SIMD8 pass already. */
assert(this->params_remap);
@ -1832,9 +1833,9 @@ fs_visitor::remove_dead_constants()
void
fs_visitor::move_uniform_array_access_to_pull_constants()
{
int pull_constant_loc[c->prog_data.nr_params];
int pull_constant_loc[stage_prog_data->nr_params];
for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
for (unsigned int i = 0; i < stage_prog_data->nr_params; i++) {
pull_constant_loc[i] = -1;
}
@ -1857,14 +1858,14 @@ fs_visitor::move_uniform_array_access_to_pull_constants()
* add it.
*/
if (pull_constant_loc[uniform] == -1) {
const float **values = &c->prog_data.param[uniform];
const float **values = &stage_prog_data->param[uniform];
pull_constant_loc[uniform] = c->prog_data.nr_pull_params;
pull_constant_loc[uniform] = stage_prog_data->nr_pull_params;
assert(param_size[uniform]);
for (int j = 0; j < param_size[uniform]; j++) {
c->prog_data.pull_param[c->prog_data.nr_pull_params++] =
stage_prog_data->pull_param[stage_prog_data->nr_pull_params++] =
values[j];
}
}
@ -1873,7 +1874,7 @@ fs_visitor::move_uniform_array_access_to_pull_constants()
base_ir = inst->ir;
current_annotation = inst->annotation;
fs_reg surf_index = fs_reg(c->prog_data.base.binding_table.pull_constants_start);
fs_reg surf_index(stage_prog_data->binding_table.pull_constants_start);
fs_reg temp = fs_reg(this, glsl_type::float_type);
exec_list list = VARYING_PULL_CONSTANT_LOAD(temp,
surf_index,
@ -1905,7 +1906,7 @@ fs_visitor::setup_pull_constants()
{
/* Only allow 16 registers (128 uniform components) as push constants. */
unsigned int max_uniform_components = 16 * 8;
if (c->prog_data.nr_params <= max_uniform_components)
if (stage_prog_data->nr_params <= max_uniform_components)
return;
if (dispatch_width == 16) {
@ -1918,8 +1919,8 @@ fs_visitor::setup_pull_constants()
*/
unsigned int pull_uniform_base = max_uniform_components;
int pull_constant_loc[c->prog_data.nr_params];
for (unsigned int i = 0; i < c->prog_data.nr_params; i++) {
int pull_constant_loc[stage_prog_data->nr_params];
for (unsigned int i = 0; i < stage_prog_data->nr_params; i++) {
if (i < pull_uniform_base) {
pull_constant_loc[i] = -1;
} else {
@ -1927,20 +1928,20 @@ fs_visitor::setup_pull_constants()
/* If our constant is already being uploaded for reladdr purposes,
* reuse it.
*/
for (unsigned int j = 0; j < c->prog_data.nr_pull_params; j++) {
if (c->prog_data.pull_param[j] == c->prog_data.param[i]) {
for (unsigned int j = 0; j < stage_prog_data->nr_pull_params; j++) {
if (stage_prog_data->pull_param[j] == stage_prog_data->param[i]) {
pull_constant_loc[i] = j;
break;
}
}
if (pull_constant_loc[i] == -1) {
int pull_index = c->prog_data.nr_pull_params++;
c->prog_data.pull_param[pull_index] = c->prog_data.param[i];
pull_constant_loc[i] = pull_index;;
int pull_index = stage_prog_data->nr_pull_params++;
stage_prog_data->pull_param[pull_index] = stage_prog_data->param[i];
pull_constant_loc[i] = pull_index;
}
}
}
c->prog_data.nr_params = pull_uniform_base;
stage_prog_data->nr_params = pull_uniform_base;
foreach_list(node, &this->instructions) {
fs_inst *inst = (fs_inst *)node;
@ -1957,7 +1958,7 @@ fs_visitor::setup_pull_constants()
assert(!inst->src[i].reladdr);
fs_reg dst = fs_reg(this, glsl_type::float_type);
fs_reg index = fs_reg(c->prog_data.base.binding_table.pull_constants_start);
fs_reg index(stage_prog_data->binding_table.pull_constants_start);
fs_reg offset = fs_reg((unsigned)(pull_index * 4) & ~15);
fs_inst *pull =
new(mem_ctx) fs_inst(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD,
@ -3314,7 +3315,7 @@ bool
fs_visitor::run()
{
sanity_param_count = fp->Base.Parameters->NumParameters;
uint32_t orig_nr_params = c->prog_data.nr_params;
uint32_t orig_nr_params = stage_prog_data->nr_params;
bool allocated_without_spills;
assign_binding_table_offsets();
@ -3464,7 +3465,7 @@ fs_visitor::run()
c->prog_data.reg_blocks_16 = brw_register_blocks(grf_used);
/* Make sure we didn't try to sneak in an extra uniform */
assert(orig_nr_params == c->prog_data.nr_params);
assert(orig_nr_params == stage_prog_data->nr_params);
(void) orig_nr_params;
}
@ -3527,7 +3528,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
exec_list *simd16_instructions = NULL;
fs_visitor v2(brw, c, prog, fp, 16);
if (brw->gen >= 5 && likely(!(INTEL_DEBUG & DEBUG_NO16))) {
if (c->prog_data.nr_pull_params == 0) {
if (c->prog_data.base.nr_pull_params == 0) {
/* Try a SIMD16 compile */
v2.import_uniforms(&v);
if (!v2.run()) {

2
src/mesa/drivers/dri/i965/brw_fs_fp.cpp
View file

@ -593,7 +593,7 @@ fs_visitor::setup_fp_regs()
for (unsigned p = 0;
p < prog->Parameters->NumParameters; p++) {
for (unsigned int i = 0; i < 4; i++) {
c->prog_data.param[c->prog_data.nr_params++] =
stage_prog_data->param[stage_prog_data->nr_params++] =
&prog->Parameters->ParameterValues[p][i].f;
}
}

10
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -102,7 +102,7 @@ fs_visitor::visit(ir_variable *ir)
}
}
} else if (ir->data.mode == ir_var_uniform) {
int param_index = c->prog_data.nr_params;
int param_index = stage_prog_data->nr_params;
/* Thanks to the lower_ubo_reference pass, we will see only
* ir_binop_ubo_load expressions and not ir_dereference_variable for UBO
@ -1467,14 +1467,14 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
return coordinate;
}
scale_x = fs_reg(UNIFORM, c->prog_data.nr_params);
scale_y = fs_reg(UNIFORM, c->prog_data.nr_params + 1);
scale_x = fs_reg(UNIFORM, stage_prog_data->nr_params);
scale_y = fs_reg(UNIFORM, stage_prog_data->nr_params + 1);
GLuint index = _mesa_add_state_reference(params,
(gl_state_index *)tokens);
c->prog_data.param[c->prog_data.nr_params++] =
stage_prog_data->param[stage_prog_data->nr_params++] =
&prog->Parameters->ParameterValues[index][0].f;
c->prog_data.param[c->prog_data.nr_params++] =
stage_prog_data->param[stage_prog_data->nr_params++] =
&prog->Parameters->ParameterValues[index][1].f;
}

26
src/mesa/drivers/dri/i965/brw_program.c
View file

@ -544,3 +544,29 @@ brw_destroy_shader_time(struct brw_context *brw)
drm_intel_bo_unreference(brw->shader_time.bo);
brw->shader_time.bo = NULL;
}
bool
brw_stage_prog_data_compare(const struct brw_stage_prog_data *a,
const struct brw_stage_prog_data *b)
{
/* Compare all the struct up to the pointers. */
if (memcmp(a, b, offsetof(struct brw_stage_prog_data, param)))
return false;
if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
return false;
if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
return false;
return true;
}
void
brw_stage_prog_data_free(const void *p)
{
struct brw_stage_prog_data *prog_data = (struct brw_stage_prog_data *)p;
ralloc_free(prog_data->param);
ralloc_free(prog_data->pull_param);
}

7
src/mesa/drivers/dri/i965/brw_program.h
View file

@ -76,6 +76,13 @@ bool brw_debug_recompile_sampler_key(struct brw_context *brw,
const struct brw_sampler_prog_key_data *key);
void brw_add_texrect_params(struct gl_program *prog);
bool
brw_stage_prog_data_compare(const struct brw_stage_prog_data *a,
const struct brw_stage_prog_data *b);
void
brw_stage_prog_data_free(const void *prog_data);
#ifdef __cplusplus
} /* extern "C" */
#endif

6
src/mesa/drivers/dri/i965/brw_state_cache.c
View file

@ -342,9 +342,9 @@ brw_init_caches(struct brw_context *brw)
cache->aux_compare[BRW_VS_PROG] = brw_vs_prog_data_compare;
cache->aux_compare[BRW_GS_PROG] = brw_gs_prog_data_compare;
cache->aux_compare[BRW_WM_PROG] = brw_wm_prog_data_compare;
cache->aux_free[BRW_VS_PROG] = brw_vs_prog_data_free;
cache->aux_free[BRW_GS_PROG] = brw_gs_prog_data_free;
cache->aux_free[BRW_WM_PROG] = brw_wm_prog_data_free;
cache->aux_free[BRW_VS_PROG] = brw_stage_prog_data_free;
cache->aux_free[BRW_GS_PROG] = brw_stage_prog_data_free;
cache->aux_free[BRW_WM_PROG] = brw_stage_prog_data_free;
}
static void

51
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -443,8 +443,8 @@ vec4_visitor::pack_uniform_registers()
/* Move the references to the data */
for (int j = 0; j < size; j++) {
prog_data->param[dst * 4 + new_chan[src] + j] =
prog_data->param[src * 4 + j];
stage_prog_data->param[dst * 4 + new_chan[src] + j] =
stage_prog_data->param[src * 4 + j];
}
this->uniform_vector_size[dst] += size;
@ -595,16 +595,16 @@ vec4_visitor::move_push_constants_to_pull_constants()
pull_constant_loc[i / 4] = -1;
if (i >= max_uniform_components) {
const float **values = &prog_data->param[i];
const float **values = &stage_prog_data->param[i];
/* Try to find an existing copy of this uniform in the pull
* constants if it was part of an array access already.
*/
for (unsigned int j = 0; j < prog_data->nr_pull_params; j += 4) {
for (unsigned int j = 0; j < stage_prog_data->nr_pull_params; j += 4) {
int matches;
for (matches = 0; matches < 4; matches++) {
if (prog_data->pull_param[j + matches] != values[matches])
if (stage_prog_data->pull_param[j + matches] != values[matches])
break;
}
@ -615,11 +615,12 @@ vec4_visitor::move_push_constants_to_pull_constants()
}
if (pull_constant_loc[i / 4] == -1) {
assert(prog_data->nr_pull_params % 4 == 0);
pull_constant_loc[i / 4] = prog_data->nr_pull_params / 4;
assert(stage_prog_data->nr_pull_params % 4 == 0);
pull_constant_loc[i / 4] = stage_prog_data->nr_pull_params / 4;
for (int j = 0; j < 4; j++) {
prog_data->pull_param[prog_data->nr_pull_params++] = values[j];
stage_prog_data->pull_param[stage_prog_data->nr_pull_params++] =
values[j];
}
}
}
@ -1403,11 +1404,12 @@ vec4_visitor::setup_uniforms(int reg)
if (brw->gen < 6 && this->uniforms == 0) {
this->uniform_vector_size[this->uniforms] = 1;
prog_data->param = reralloc(NULL, prog_data->param, const float *, 4);
stage_prog_data->param =
reralloc(NULL, stage_prog_data->param, const float *, 4);
for (unsigned int i = 0; i < 4; i++) {
unsigned int slot = this->uniforms * 4 + i;
static float zero = 0.0;
prog_data->param[slot] = &zero;
stage_prog_data->param[slot] = &zero;
}
this->uniforms++;
@ -1416,7 +1418,7 @@ vec4_visitor::setup_uniforms(int reg)
reg += ALIGN(uniforms, 2) / 2;
}
prog_data->nr_params = this->uniforms * 4;
stage_prog_data->nr_params = this->uniforms * 4;
prog_data->curb_read_length = reg - prog_data->dispatch_grf_start_reg;
@ -1731,31 +1733,4 @@ brw_vec4_setup_prog_key_for_precompile(struct gl_context *ctx,
}
}
bool
brw_vec4_prog_data_compare(const struct brw_vec4_prog_data *a,
const struct brw_vec4_prog_data *b)
{
/* Compare all the struct (including the base) up to the pointers. */
if (memcmp(a, b, offsetof(struct brw_vec4_prog_data, param)))
return false;
if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
return false;
if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
return false;
return true;
}
void
brw_vec4_prog_data_free(const struct brw_vec4_prog_data *prog_data)
{
ralloc_free((void *)prog_data->param);
ralloc_free((void *)prog_data->pull_param);
}
} /* extern "C" */

3
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -79,9 +79,6 @@ void
brw_vec4_setup_prog_key_for_precompile(struct gl_context *ctx,
struct brw_vec4_prog_key *key,
GLuint id, struct gl_program *prog);
bool brw_vec4_prog_data_compare(const struct brw_vec4_prog_data *a,
const struct brw_vec4_prog_data *b);
void brw_vec4_prog_data_free(const struct brw_vec4_prog_data *prog_data);
#ifdef __cplusplus
} /* extern "C" */

21
src/mesa/drivers/dri/i965/brw_vec4_gs.c
View file

@ -62,8 +62,10 @@ do_gs_prog(struct brw_context *brw,
/* We also upload clip plane data as uniforms */
param_count += MAX_CLIP_PLANES * 4;
c.prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
c.prog_data.base.pull_param = rzalloc_array(NULL, const float *, param_count);
c.prog_data.base.base.param =
rzalloc_array(NULL, const float *, param_count);
c.prog_data.base.base.pull_param =
rzalloc_array(NULL, const float *, param_count);
if (gp->program.OutputType == GL_POINTS) {
/* When the output type is points, the geometry shader may output data
@ -360,12 +362,12 @@ brw_gs_prog_data_compare(const void *in_a, const void *in_b)
const struct brw_gs_prog_data *a = in_a;
const struct brw_gs_prog_data *b = in_b;
/* Compare the base vec4 structure. */
if (!brw_vec4_prog_data_compare(&a->base, &b->base))
/* Compare the base structure. */
if (!brw_stage_prog_data_compare(&a->base.base, &b->base.base))
return false;
/* Compare the rest of the struct. */
const unsigned offset = sizeof(struct brw_vec4_prog_data);
const unsigned offset = sizeof(struct brw_stage_prog_data);
if (memcmp(((char *) a) + offset, ((char *) b) + offset,
sizeof(struct brw_gs_prog_data) - offset)) {
return false;
@ -373,12 +375,3 @@ brw_gs_prog_data_compare(const void *in_a, const void *in_b)
return true;
}
void
brw_gs_prog_data_free(const void *in_prog_data)
{
const struct brw_gs_prog_data *prog_data = in_prog_data;
brw_vec4_prog_data_free(&prog_data->base);
}

1
src/mesa/drivers/dri/i965/brw_vec4_gs.h
View file

@ -35,7 +35,6 @@ struct gl_shader_program;
bool brw_gs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
bool brw_gs_prog_data_compare(const void *a, const void *b);
void brw_gs_prog_data_free(const void *in_prog_data);
#ifdef __cplusplus
} /* extern "C" */

14
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
View file

@ -667,12 +667,12 @@ vec4_visitor::setup_uniform_values(ir_variable *ir)
int i;
for (i = 0; i < uniform_vector_size[uniforms]; i++) {
prog_data->param[uniforms * 4 + i] = &components->f;
stage_prog_data->param[uniforms * 4 + i] = &components->f;
components++;
}
for (; i < 4; i++) {
static float zero = 0;
prog_data->param[uniforms * 4 + i] = &zero;
stage_prog_data->param[uniforms * 4 + i] = &zero;
}
uniforms++;
@ -690,7 +690,7 @@ vec4_visitor::setup_uniform_clipplane_values()
this->userplane[i] = dst_reg(UNIFORM, this->uniforms);
this->userplane[i].type = BRW_REGISTER_TYPE_F;
for (int j = 0; j < 4; ++j) {
prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j];
stage_prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j];
}
++this->uniforms;
}
@ -725,7 +725,7 @@ vec4_visitor::setup_builtin_uniform_values(ir_variable *ir)
int swiz = GET_SWZ(slots[i].swizzle, j);
last_swiz = swiz;
prog_data->param[this->uniforms * 4 + j] = &values[swiz];
stage_prog_data->param[this->uniforms * 4 + j] = &values[swiz];
if (swiz <= last_swiz)
this->uniform_vector_size[this->uniforms]++;
}
@ -3265,12 +3265,12 @@ vec4_visitor::move_uniform_array_access_to_pull_constants()
* add it.
*/
if (pull_constant_loc[uniform] == -1) {
const float **values = &prog_data->param[uniform * 4];
const float **values = &stage_prog_data->param[uniform * 4];
pull_constant_loc[uniform] = prog_data->nr_pull_params / 4;
pull_constant_loc[uniform] = stage_prog_data->nr_pull_params / 4;
for (int j = 0; j < uniform_size[uniform] * 4; j++) {
prog_data->pull_param[prog_data->nr_pull_params++]
stage_prog_data->pull_param[stage_prog_data->nr_pull_params++]
= values[j];
}
}

6
src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
View file

@ -415,10 +415,10 @@ vec4_vs_visitor::emit_program_code()
vs_compile->vp->program.Base.Parameters;
unsigned i;
for (i = 0; i < params->NumParameters * 4; i++) {
prog_data->pull_param[i] =
stage_prog_data->pull_param[i] =
&params->ParameterValues[i / 4][i % 4].f;
}
prog_data->nr_pull_params = i;
stage_prog_data->nr_pull_params = i;
}
}
@ -446,7 +446,7 @@ vec4_vs_visitor::setup_vp_regs()
this->uniform_size[this->uniforms] = 1; /* 1 vec4 */
this->uniform_vector_size[this->uniforms] = components;
for (unsigned i = 0; i < 4; i++) {
prog_data->param[this->uniforms * 4 + i] = i >= components
stage_prog_data->param[this->uniforms * 4 + i] = i >= components
? 0 : &plist->ParameterValues[p][i].f;
}
this->uniforms++; /* counted in vec4 units */

20
src/mesa/drivers/dri/i965/brw_vs.c
View file

@ -182,12 +182,12 @@ brw_vs_prog_data_compare(const void *in_a, const void *in_b)
const struct brw_vs_prog_data *a = in_a;
const struct brw_vs_prog_data *b = in_b;
/* Compare the base vec4 structure. */
if (!brw_vec4_prog_data_compare(&a->base, &b->base))
/* Compare the base structure. */
if (!brw_stage_prog_data_compare(&a->base.base, &b->base.base))
return false;
/* Compare the rest of the struct. */
const unsigned offset = sizeof(struct brw_vec4_prog_data);
const unsigned offset = sizeof(struct brw_stage_prog_data);
if (memcmp(((char *) a) + offset, ((char *) b) + offset,
sizeof(struct brw_vs_prog_data) - offset)) {
return false;
@ -206,6 +206,7 @@ do_vs_prog(struct brw_context *brw,
const GLuint *program;
struct brw_vs_compile c;
struct brw_vs_prog_data prog_data;
struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
void *mem_ctx;
int i;
struct gl_shader *vs = NULL;
@ -241,8 +242,8 @@ do_vs_prog(struct brw_context *brw,
*/
param_count += c.key.base.nr_userclip_plane_consts * 4;
prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
prog_data.base.pull_param = rzalloc_array(NULL, const float *, param_count);
stage_prog_data->param = rzalloc_array(NULL, const float *, param_count);
stage_prog_data->pull_param = rzalloc_array(NULL, const float *, param_count);
GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
prog_data.inputs_read = vp->program.Base.InputsRead;
@ -545,12 +546,3 @@ brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
return success;
}
void
brw_vs_prog_data_free(const void *in_prog_data)
{
const struct brw_vs_prog_data *prog_data = in_prog_data;
brw_vec4_prog_data_free(&prog_data->base);
}

1
src/mesa/drivers/dri/i965/brw_vs.h
View file

@ -94,7 +94,6 @@ void brw_vs_debug_recompile(struct brw_context *brw,
struct gl_shader_program *prog,
const struct brw_vs_prog_key *key);
bool brw_vs_prog_data_compare(const void *a, const void *b);
void brw_vs_prog_data_free(const void *in_prog_data);
#ifdef __cplusplus
} /* extern "C" */

10
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
View file

@ -51,7 +51,7 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
*/
_mesa_load_state_parameters(&brw->ctx, prog->Parameters);
if (!prog_data->nr_pull_params) {
if (!prog_data->base.nr_pull_params) {
if (stage_state->const_bo) {
drm_intel_bo_unreference(stage_state->const_bo);
stage_state->const_bo = NULL;
@ -63,20 +63,20 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
/* _NEW_PROGRAM_CONSTANTS */
drm_intel_bo_unreference(stage_state->const_bo);
uint32_t size = prog_data->nr_pull_params * 4;
uint32_t size = prog_data->base.nr_pull_params * 4;
stage_state->const_bo = drm_intel_bo_alloc(brw->bufmgr, "vec4_const_buffer",
size, 64);
drm_intel_gem_bo_map_gtt(stage_state->const_bo);
for (i = 0; i < prog_data->nr_pull_params; i++) {
for (i = 0; i < prog_data->base.nr_pull_params; i++) {
memcpy(stage_state->const_bo->virtual + i * 4,
prog_data->pull_param[i],
prog_data->base.pull_param[i],
4);
}
if (0) {
for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) {
for (i = 0; i < ALIGN(prog_data->base.nr_pull_params, 4) / 4; i++) {
float *row = (float *)stage_state->const_bo->virtual + i * 4;
printf("const surface %3d: %4.3f %4.3f %4.3f %4.3f\n",
i, row[0], row[1], row[2], row[3]);

26
src/mesa/drivers/dri/i965/brw_wm.c
View file

@ -122,28 +122,19 @@ brw_wm_prog_data_compare(const void *in_a, const void *in_b)
const struct brw_wm_prog_data *a = in_a;
const struct brw_wm_prog_data *b = in_b;
/* Compare all the struct (including the base) up to the pointers. */
if (memcmp(a, b, offsetof(struct brw_wm_prog_data, param)))
/* Compare the base structure. */
if (!brw_stage_prog_data_compare(&a->base, &b->base))
return false;
if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
return false;
if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
/* Compare the rest of the structure. */
const unsigned offset = sizeof(struct brw_stage_prog_data);
if (memcmp(((char *) a) + offset, ((char *) b) + offset,
sizeof(struct brw_wm_prog_data) - offset))
return false;
return true;
}
void
brw_wm_prog_data_free(const void *in_prog_data)
{
const struct brw_wm_prog_data *prog_data = in_prog_data;
ralloc_free((void *)prog_data->param);
ralloc_free((void *)prog_data->pull_param);
}
/**
* All Mesa program -> GPU code generation goes through this function.
* Depending on the instructions used (i.e. flow control instructions)
@ -177,8 +168,9 @@ bool do_wm_prog(struct brw_context *brw,
}
/* The backend also sometimes adds params for texture size. */
param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
c->prog_data.param = rzalloc_array(NULL, const float *, param_count);
c->prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
c->prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
c->prog_data.base.pull_param =
rzalloc_array(NULL, const float *, param_count);
memcpy(&c->key, key, sizeof(*key));

1
src/mesa/drivers/dri/i965/brw_wm.h
View file

@ -122,6 +122,5 @@ void brw_wm_debug_recompile(struct brw_context *brw,
struct gl_shader_program *prog,
const struct brw_wm_prog_key *key);
bool brw_wm_prog_data_compare(const void *a, const void *b);
void brw_wm_prog_data_free(const void *in_prog_data);
#endif

8
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -464,7 +464,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
struct brw_fragment_program *fp =
(struct brw_fragment_program *) brw->fragment_program;
struct gl_program_parameter_list *params = fp->program.Base.Parameters;
const int size = brw->wm.prog_data->nr_pull_params * sizeof(float);
const int size = brw->wm.prog_data->base.nr_pull_params * sizeof(float);
const int surf_index =
brw->wm.prog_data->base.binding_table.pull_constants_start;
float *constants;
@ -473,7 +473,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
_mesa_load_state_parameters(ctx, params);
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_pull_params == 0) {
if (brw->wm.prog_data->base.nr_pull_params == 0) {
if (brw->wm.base.const_bo) {
drm_intel_bo_unreference(brw->wm.base.const_bo);
brw->wm.base.const_bo = NULL;
@ -490,8 +490,8 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
/* _NEW_PROGRAM_CONSTANTS */
drm_intel_gem_bo_map_gtt(brw->wm.base.const_bo);
constants = brw->wm.base.const_bo->virtual;
for (i = 0; i < brw->wm.prog_data->nr_pull_params; i++) {
constants[i] = *brw->wm.prog_data->pull_param[i];
for (i = 0; i < brw->wm.prog_data->base.nr_pull_params; i++) {
constants[i] = *brw->wm.prog_data->base.pull_param[i];
}
drm_intel_gem_bo_unmap_gtt(brw->wm.base.const_bo);

10
src/mesa/drivers/dri/i965/gen6_vs_state.c
View file

@ -48,7 +48,7 @@ gen6_upload_vec4_push_constants(struct brw_context *brw,
/* XXX: Should this happen somewhere before to get our state flag set? */
_mesa_load_state_parameters(ctx, prog->Parameters);
if (prog_data->nr_params == 0) {
if (prog_data->base.nr_params == 0) {
stage_state->push_const_size = 0;
} else {
int params_uploaded;
@ -56,7 +56,7 @@ gen6_upload_vec4_push_constants(struct brw_context *brw,
int i;
param = brw_state_batch(brw, type,
prog_data->nr_params * sizeof(float),
prog_data->base.nr_params * sizeof(float),
32, &stage_state->push_const_offset);
/* _NEW_PROGRAM_CONSTANTS
@ -65,10 +65,10 @@ gen6_upload_vec4_push_constants(struct brw_context *brw,
* side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
* wouldn't be set for them.
*/
for (i = 0; i < prog_data->nr_params; i++) {
param[i] = *prog_data->param[i];
for (i = 0; i < prog_data->base.nr_params; i++) {
param[i] = *prog_data->base.param[i];
}
params_uploaded = prog_data->nr_params / 4;
params_uploaded = prog_data->base.nr_params / 4;
if (0) {
printf("Constant buffer:\n");

14
src/mesa/drivers/dri/i965/gen6_wm_state.c
View file

@ -51,23 +51,23 @@ gen6_upload_wm_push_constants(struct brw_context *brw)
/* XXX: Should this happen somewhere before to get our state flag set? */
_mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
if (prog_data->nr_params == 0) {
if (prog_data->base.nr_params == 0) {
brw->wm.base.push_const_size = 0;
} else {
float *constants;
unsigned int i;
constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
prog_data->nr_params * sizeof(float),
prog_data->base.nr_params * sizeof(float),
32, &brw->wm.base.push_const_offset);
for (i = 0; i < prog_data->nr_params; i++) {
constants[i] = *prog_data->param[i];
for (i = 0; i < prog_data->base.nr_params; i++) {
constants[i] = *prog_data->base.param[i];
}
if (0) {
printf("WM constants:\n");
for (i = 0; i < prog_data->nr_params; i++) {
for (i = 0; i < prog_data->base.nr_params; i++) {
if ((i & 7) == 0)
printf("g%d: ", prog_data->first_curbe_grf + i / 8);
printf("%8f ", constants[i]);
@ -79,7 +79,7 @@ gen6_upload_wm_push_constants(struct brw_context *brw)
printf("\n");
}
brw->wm.base.push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
brw->wm.base.push_const_size = ALIGN(prog_data->base.nr_params, 8) / 8;
}
}
@ -105,7 +105,7 @@ upload_wm_state(struct brw_context *brw)
bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params == 0) {
if (brw->wm.prog_data->base.nr_params == 0) {
/* Disable the push constant buffers. */
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));

2
src/mesa/drivers/dri/i965/gen7_wm_state.c
View file

@ -186,7 +186,7 @@ upload_ps_state(struct brw_context *brw)
dw4 |= (brw->max_wm_threads - 1) << max_threads_shift;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params > 0)
if (brw->wm.prog_data->base.nr_params > 0)
dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
/* From the IVB PRM, volume 2 part 1, page 287:

2
src/mesa/drivers/dri/i965/gen8_ps_state.c
View file

@ -163,7 +163,7 @@ upload_ps_state(struct brw_context *brw)
dw6 |= (brw->max_wm_threads - 2) << HSW_PS_MAX_THREADS_SHIFT;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params > 0)
if (brw->wm.prog_data->base.nr_params > 0)
dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
dw6 |= GEN7_PS_8_DISPATCH_ENABLE;