Commit graph

51169 commits

Author SHA1 Message Date
Vadim Girlin
a1a0974401 Revert "r600g: set round_mode to truncate and get rid of tgsi_f2i on evergreen"
This reverts commit 60bf0f05b4.

It seems round_mode behaves differently in some cases depending on  the
instruction/slot. Reverting it for now.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=50232

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:28:08 +04:00
Vadim Girlin
1c5c4243c9 radeon/llvm: add FLT_TO_UINT, UINT_TO_FLT instructions
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:27:46 +04:00
Vadim Girlin
5a1b59b4e6 radeon/llvm: prepare to revert the round mode state to default
Use TRUNC before FLT_TO_INT on evergreen/cayman.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:27:33 +04:00
Vadim Girlin
7fa7c608cb radeon/llvm: fix sampler index in llvm_emit_tex
Sampler index isn't a second source operand for some tgsi texture
instructions. Let's assume it's always the last.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=50230

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:27:23 +04:00
Vadim Girlin
029776753b radeon/llvm: fix opcode for RECIP_UINT_r600
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=50312

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:23:06 +04:00
Vadim Girlin
6806f81fb4 radeon/llvm/loader: convert hardcoded gpu name to option
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:22:38 +04:00
Vadim Girlin
482041a538 r600g: add RECIP_INT, PRED_SETE_INT to r600_bytecode_get_num_operands
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=50315

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-05-25 17:22:12 +04:00
Vinson Lee
35f302d97e i915g: Check for geometry shader earlier in i915_set_constant_buffer.
Fix resource leak defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-05-24 18:50:07 -07:00
Vinson Lee
5cf693266f scons: Fix SCons build infrastructure for FreeBSD.
This patch gets the FreeBSD SCons build working again. The build still
fails though.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-05-24 18:49:40 -07:00
Tom Stellard
33e7db9a1d radeon/llvm: Lower UDIV using the Selection DAG 2012-05-24 14:12:32 -04:00
Tom Stellard
d088da917b radeon/llvm: Remove auto-generated AMDIL->ISA conversion code 2012-05-24 14:12:32 -04:00
Tom Stellard
662ccbfc21 radeon/llvm: Remove AMDIL instructions MULHI, SMUL 2012-05-24 14:12:32 -04:00
Tom Stellard
177b420283 radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR) 2012-05-24 14:12:32 -04:00
Tom Stellard
9d41a401dc radeon/llvm: Remove AMDIL FTOI and ITOF instructions 2012-05-24 14:12:32 -04:00
Tom Stellard
a8ba697c1e radeon/llvm: Remove AMDIL EXP* instructions 2012-05-24 14:12:31 -04:00
Tom Stellard
dd9927eb36 radeon/llvm: Remove AMDIL ADD instructions 2012-05-24 14:12:31 -04:00
Tom Stellard
1404e6b9fc radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT) 2012-05-24 14:12:31 -04:00
Tom Stellard
3059c075a7 radeon/llvm: Remove AMDILMachinePeephole pass 2012-05-24 14:12:31 -04:00
Tom Stellard
e9d8901a80 radeon/llvm: Remove AMDIL CMP instructions and associated lowering code 2012-05-24 14:12:31 -04:00
Tom Stellard
ea00632fe0 radeon/llvm: Remove AMDIL ROUND_NEAREST instruction 2012-05-24 14:12:31 -04:00
Tom Stellard
0bfa3b3e96 radeon/llvm: Remove AMDIL ROUND_POSINF instruction 2012-05-24 14:12:31 -04:00
Tom Stellard
d4984f3463 radeon/llvm: Add custom SDNode for FRACT 2012-05-24 14:12:30 -04:00
Tom Stellard
5523502ff9 radeon/llvm: Use -1 as true value for SET* integer instructions 2012-05-24 14:12:30 -04:00
Tom Stellard
86dfae1103 radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes
Support for these was inadvertently dropped in commit
cee23ab246
2012-05-24 14:12:30 -04:00
Tom Stellard
cc7a6d2691 radeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter()
We need to return immediately after inserting instructions that require
S_WAITCNT so that the parent class' custom inserter won't try to insert
them again.
2012-05-24 14:12:30 -04:00
Vinson Lee
0f6a3a7de3 tgsi: Initialize Padding struct fields.
Fix uninitialized scalar variable defects report by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-05-23 21:58:37 -07:00
Kenneth Graunke
88128516d4 i965: Gut the separate OpenGL ES extension enabling.
We should just set the bits of functionality that we support; the
GL/ES1/ES2 flags in extensions.c will take care of advertising the
appropriate extensions for the current API.

This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2
when libtxc_dxtn is installed or the force_s3tc driconf option is set.
The main extension code set this up properly, but the ES-specific code
failed to do so.

Otherwise, the extension strings reported by es1_info, es2_info, and
glxinfo all remain the same.

This patch manually disables the ARB_framebuffer_object bit on ES
to preserve the behavior of 1c0f5d8324.

v2: Rebase, fix the i915 Makefile, and unconditionally set the
    OES_draw_texture bit as core Mesa will only apply it to ES1 now.

Tested-by: Daniel Charles <daniel.charles@intel.com> [v1]
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> [v1]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 17:17:54 -07:00
Kenneth Graunke
d4667516b6 mesa: Remove the OES_draw_texture extension from ES2.
This extension appears to be written against ES 1.0.
In ES 2.0, you really want to be using FBOs instead.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 17:03:35 -07:00
Jordan Justen
dc50145253 i965: use cut index to handle primitive restart when possible
If the primitive restart index and the primitive type can
be handled by the cut index feature, then use the hardware
to handle the primitive restart feature.

The VBO module's software handling of primitive restart is
used as a fall back.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-05-23 15:19:09 -07:00
Jordan Justen
f9389fbfb2 i965: add flag to enable cut_index
When brw->prim_restart.enable_cut_index is set, the cut index
will be enabled when uploading index_buffer commands.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-05-23 15:19:09 -07:00
Jordan Justen
df7d1323de i965: create code path to handle primitive restart in hardware
For newer hardware we disable the VBO module's software handling
of primitive restart. We now handle primitive restarts in
brw_handle_primitive_restart.

The initial version of brw_handle_primitive_restart simply calls
vbo_sw_primitive_restart, and therefore still uses the VBO
module software primitive restart support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-05-23 15:19:09 -07:00
Paul Berry
9f6932cb83 glsl/tests: Add .gitignore for uniform initialization unit test.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-05-23 14:24:33 -07:00
Paul Berry
aa173e16a0 glsl/constant propagation: kill whole var if LHS involves array indexing.
When considering which components of a variable were killed by an
assignment, constant propagation would previously just use the write
mask of the assignment.  This worked if the LHS of the assignment was
simple, e.g.:

v.xy = ...; // (assign (xy) (var_ref v) ...)

But it did the wrong thing if the LHS of the assignment involved an
array indexing operator, since in this case the write mask is always
(x):

v[i] = ...; // (assign (x) (deref_array (var_ref v) (var_ref i)) ...)

In general, we can't predict which vector component will be selected
by array indexing, so the only safe thing to do in this case is to
kill the entire variable.

Fixes piglit tests {fs,vs}-vector-indexing-kills-all-channels.shader_test.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-05-23 14:21:48 -07:00
Ian Romanick
b45052b3f7 glsl/tests: Add test for uniform initialization by the linker
v2: Put unit tests in src/glsl/tests rather than tests/glsl.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:42:08 -07:00
Ian Romanick
49da2590c2 mesa: Use initializers to configure samplers
Now that the linker handles initializers of samplers just like any
other uniform, a bunch of this annoying code is unnecessary.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:42:08 -07:00
Ian Romanick
75dac69262 ir_to_mesa: Don't set initial uniform values again
This work is now done by the linker, so we don't need to keep doing it
here.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:42:08 -07:00
Ian Romanick
c343b980d6 ir_to_mesa: Propagate initial values in _mesa_associate_uniform_storage
The linker may have set initial values for uniforms.  Propagate these
values to the driver's backing storage when it is first associated.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:42:08 -07:00
Ian Romanick
76027f5b5c glsl: Propagate sampler uniform initializers to gl_shader_program::SamplerUnits
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:42:07 -07:00
Ian Romanick
b610881317 glsl: Initialize samplers to 0, propagate sampler values to the gl_program
The spec requires that samplers be initialized to 0.  Since this
differs from the 1-to-1 mapping of samplers to texture units assumed
by ARB assembly shaders (and the gl_program structure), be sure to
propagate this date from the gl_shader_program to the gl_program.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
CC: Vadim Girlin <vadimgirlin@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49088
2012-05-23 11:42:07 -07:00
Ian Romanick
a2e623054b glsl: Set initial values for uniforms in the linker
v2: Fix handling of arrays-of-structure.  Thanks to Eric Anholt for
pointing this out.

v3: Minor comment change based on feedback from Ken.

Fixes piglit glsl-1.20/execution/uniform-initializer/fs-structure-array
and glsl-1.20/execution/uniform-initializer/vs-structure-array.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 11:41:49 -07:00
Eric Anholt
29362875f2 i965/gen6+: Add support for GL_ARB_blend_func_extended.
v2: Add support for gen6, and don't turn it on if blending is
    disabled. (fixes GPU hang), and note it in docs/GL3.txt

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-05-23 10:46:15 -07:00
Eric Anholt
175ad8050e mesa: Keep a computed value for dual source blend func with each buffer.
The i965 driver needed this as well for hardware setup, so instead of
duplicating the logic, just save it off.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2012-05-23 10:45:43 -07:00
Eric Anholt
68216f3581 i965/gen6+: Add support for fast depth clears.
Improves citybench high-res performance 3.0% +- 0.4%, n=10.  Improves
Lightsmark 1024x768 performance 0.74% +/- 0.20% (n=78).  No
significant difference on openarena (n=5, didn't fast clear) or nexuiz
(n=3).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:40:11 -07:00
Eric Anholt
5b248e5982 i965/gen6: Add CC viewport state setup to blorp code.
While it doesn't have the same warning in the simulator as in gen7,
let's emit it out of paranoia.  We wouldn't want our resolves of some
previous clear to get clamped to some current clamping value.

Suggested-by: pretty much everyone
2012-05-23 10:39:45 -07:00
Eric Anholt
39a91be20d i965/gen7: Add CC viewport setup to blorp code.
When doing fast clears, a fulsim warning said that the batch was being
emitted without the viewport set up.  While the fast clear pass I was
looking at doesn't use the clear value, the later resolves which also
didn't set up the vieport would trigger the same.  It's not obvious
from the error message whether it meant "fast clear value gets clamped
to something you haven't defined" or "fast clear value doesn't get
clamped, and I saw it was out of the current (uninitialized) range,
and you probably wanted it clamped to that (uninitialized) range".  Be
paranoid and assume the first case.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:27 -07:00
Eric Anholt
54308f78a2 i965: Drop a layer of indirection in doing HiZ resolves.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:27 -07:00
Eric Anholt
072634da4a i965: Replace intel_need_resolve with the hiz ops it maps to.
Having this enum separate caused us to need a bunch of helper
functions to translate to the op to be executed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:27 -07:00
Eric Anholt
5b226ad603 i965: Add an interface for doing hiz ops from C code.
This required moving gen6_hiz_op, and I put it in intel_resolve_map.h
for the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:27 -07:00
Eric Anholt
7da9795070 i965: Rename the clear function for this driver.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:26 -07:00
Eric Anholt
3e1656567c i965: Simplify the remaining clear logic by relying on the meta clear.
The GLSL clear path doesn't need any buffer presence checks, since
those are already handled in the normal drawing path code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2012-05-23 10:18:26 -07:00