Commit graph

4126 commits

Author SHA1 Message Date
Otavio Pontes
d4d1f52284 anv/hasvk: Clamping Scissor Rect values in a valid range
On cmd_buffer_emit_scissor(), if VkViewport height or width are set to
a value lower than 1.0, y_max or x_max can be attributed negative values,
causing an overflow. That leads to ScissorRectangleYMax or
ScissorRectangleXMax to be set to values on an unsupported range.

Clamping x_max and y_max in the valid range solves the problem.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7471
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20200>
(cherry picked from commit 2e775b8bdb)
2022-12-14 20:47:01 +00:00
Lionel Landwerlin
e2fc0b33cd intel: factor out dispatch PS enabling logic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20169>
(cherry picked from commit b9403b1c47)
2022-12-14 20:47:01 +00:00
Sviatoslav Peleshko
d43425f7e0 anv: Defer flushing PIPE_CONTROL bits forbidden in CCS while in GPGPU mode
Fixes: 313aeee8 ("anv: Use pending pipe control mechanism in flush_pipeline_select()
")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7816
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20124>
(cherry picked from commit 77ecf9149c)
2022-12-14 20:47:00 +00:00
Lionel Landwerlin
a17409115a anv: correctly predicate ray tracing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7479fe6ae0 ("anv: Implement vkCmdTraceRays and vkCmdTraceRaysIndirect")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20011>
(cherry picked from commit af3f7948d1)
2022-12-14 20:47:00 +00:00
Lionel Landwerlin
a4eeeb8f78 anv: generate correct addresses for state pool offsets
Fixes a number of CTS patterns on DG2 :

   - dEQP-VK.dynamic_rendering.primary_cmd_buff.random*
   - dEQP-VK.draw.*secondary_cmd*
   - dEQP-VK.dynamic_rendering.*secondary_cmd*
   - dEQP-VK.geometry.*secondary_cmd_buffer
   - dEQP-VK.multiview.*secondary_cmd*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9c1c1888d9 ("intel/fs: put scratch surface in the surface state heap")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19946>
(cherry picked from commit 9bb055ff5d)
2022-11-23 19:12:00 +00:00
Lionel Landwerlin
b92f135377 anv: fixup context initialization on DG2
Fixing a typo :(

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 507a86e131 ("anv: ensure CPS is initialized when KHR_fragment_shading_rate is disabled")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19922>
(cherry picked from commit f7d6c6e1ed)
2022-11-23 19:12:00 +00:00
Lionel Landwerlin
77a9b631db anv: ensure CPS is initialized when KHR_fragment_shading_rate is disabled
We need to set CPS_MODE_NONE when no per coarse pixel dispatch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 231651fd89 ("anv: implement VK_KHR_fragment_shading_rate")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19867>
(cherry picked from commit 507a86e131)
2022-11-23 19:11:59 +00:00
Lionel Landwerlin
46517e0b65 anv: fix 3d state initialization
We missed a couple of restriction leading to inconsistent 3d pipeline
state. It is mostly noticeable when doing a multiple sample dispatch
as the verify first 3d operation.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7531
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19867>
(cherry picked from commit 62f12c2dad)
2022-11-23 19:11:59 +00:00
Lionel Landwerlin
d567ac1dc8 intel/fs: put scratch surface in the surface state heap
In 4ceaed7839 we made scratch surface state allocations part of the
internal heap (mapped to STATE_BASE_ADDRESS::SurfaceStateBaseAddress)
so that it doesn't uses slots in the application's expected 1M
descriptors (especially with vkd3d-proton).

But all our compiler code relies on BSS
(STATE_BASE_ADDRESS::BindlessSurfaceStateBaseAddress).

The additional issue is that there is only 26bits of surface offset
available in CS instruction (CFE_STATE, 3DSTATE_VS, etc...) for
scratch surfaces. So we need the drivers to put the scratch surfaces
in the first chunk of STATE_BASE_ADDRESS::SurfaceStateBaseAddress
(hence all the driver changes).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ceaed7839 ("anv: split internal surface states from descriptors")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7687
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19727>
(cherry picked from commit 9c1c1888d9)
2022-11-23 19:11:59 +00:00
Lionel Landwerlin
9476566032 anv: get rid of ilog2_round_up
__builtin_clz(value - 1) is undefined for with value=1 (because
__builtin_clz(0) is undefined).

Because we set rt_pipeline->stack_size = 1 when a ray tracing pipeline
doesn't need any stack allocation to differentiate from a dynamic size
(rt_pipeline->stack_size = 0) we can run into this undefinied behavior
issue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f68d64dac0 ("anv: Add support for vkCmdSetRayTracingPipelineStackSizeKHR")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19781>
(cherry picked from commit 440da44a84)
2022-11-23 19:11:58 +00:00
Lionel Landwerlin
97a017ed25 anv: bump pool bucket max allocation size
Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above
the limit we currently have.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19669>
(cherry picked from commit ae76bba34a)
2022-11-17 14:05:03 +00:00
Tapani Pälli
fc57b9ac44 anv: setup stage bitmask for Wa_22011440098
Fixes: 40b66a4499 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
(cherry picked from commit ecd4517560)
2022-11-17 14:05:03 +00:00
Lionel Landwerlin
d7ca6ccee2 anv: split internal surface states from descriptors
On Intel HW we use the same mechanism for internal operations surfaces
as well as application surfaces (VkDescriptor).

This change splits the surface pool in 2, one part dedicated to
internal allocations, the other to application VkDescriptors.

To do so, the STATE_BASE_ADDRESS::SurfaceStateBaseAddress points to a
4Gb area, with the following layout :
   - 1Gb of binding table pool
   - 2Gb of internal surface states
   - 1Gb of bindless surface states

That way any entry from the binding table can refer to both internal &
bindless surface states but none of the driver allocations interfere
with the allocation of the application.

Based off a change from Sviatoslav Peleshko.

v2: Allocate image view null surface state from bindless heap (Sviatoslav)
    Removed debug stuff (Sviatoslav)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7110
Cc: mesa-stable
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19275>
(cherry picked from commit 4ceaed7839)
2022-11-17 14:05:03 +00:00
Lionel Landwerlin
91dfc02570 anv: fixup invalid enum for nir environment
Also switching away from PIPE_

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8c4c4c3ee1 ("anv: Add softtp64 workaround")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19638>
(cherry picked from commit 68fd9d2829)
2022-11-17 14:05:02 +00:00
Lionel Landwerlin
e54150d6e1 anv: fix missing VkPhysicalDeviceExtendedDynamicState3PropertiesEXT handling
Fixes: 13c422e1b2 ("anv: toggle on EXT_extended_dynamic_state3")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19573>
(cherry picked from commit 97b3dd34c1)
2022-11-09 21:22:06 +00:00
Lionel Landwerlin
32a7d9b892 anv: Reduce RHWO optimization (Wa_1508744258)
Implement Wa_1508744258:

   Disable RHWO by setting 0x7010[14] by default except during resolve
   pass.

Disable the RCC RHWO optimization at all times except when resolving
single sampled color surfaces.

v2: Move stalling to genX(cmd_buffer_apply_pipe_flushes) for clarity (Mark)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19450>
(cherry picked from commit ba0336ab3f)
2022-11-09 21:22:05 +00:00
Marcin Ślusarz
dcaaeb56ef anv: program 3DSTATE_MESH_DISTRIB with the recommended values
It improves performance of vk_meshlet_cadscene on A770.

Fixes: f083df8710 ("anv: update task/mesh distribution with the recommended values")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19412>
2022-11-02 08:56:53 +00:00
Marcin Ślusarz
d1d2dee970 anv: set 3DSTATE_[MESH|TASK]_CONTROL.MaximumNumberofThreadGroups
Documentation is worded in a confusing way, which may be understood that
we don't have to set this field to get good results.

MESH part of this commit improves performance of vk_meshlet_cadscene
by a factor of 2 on A380.

Fixes: ef04caea9b ("anv: Implement Mesh Shading pipeline")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19412>
2022-11-02 08:56:53 +00:00
Illia Abernikhin
aa4ac5ff8b utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*
Rename env_var_as_unsigned() -> debug_get_num_option(), because duplicate
Rename env_var_as_bool() -> debug_get_bool_option(), because duplicate

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7177

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19336>
2022-11-02 07:25:39 +00:00
Kenneth Graunke
fde99747e9 nir: Drop infer_non_readable option for nir_opt_access()
Everybody sets it to true now, and the only reason for the option to
exist was to work around a bug that's now been fixed.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19162>
2022-11-02 03:42:04 +00:00
Tapani Pälli
f9176d9b2c anv: remove some unused functions
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19368>
2022-10-31 06:59:36 +00:00
Lionel Landwerlin
6b52834ece anv: remove shader fp64 inspection after parsing
Unfortunately some crucible tests are using all floating point widths
in a single shader and specializing a variable to select what code
path to use for a particular supported floating point width. This is
reporting errors in the validation layers.

Remove the validation for now.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes 8c4c4c3ee1 ("anv: Add softtp64 workaround")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19401>
2022-10-30 22:16:52 +00:00
Mykhailo Skorokhodov
a954933f4f drirc: Add fp64_workaround_enabled option
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>
2022-10-28 10:08:50 +00:00
Mykhailo Skorokhodov
8c4c4c3ee1 anv: Add softtp64 workaround
Pass float64.glsl into nir_lower_doubles() resolves the problem on
ICL/TGL when the shader uses float64, but the device doesn't support
that type.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>
2022-10-28 10:08:50 +00:00
Mykhailo Skorokhodov
829d74b2f2 anv/meson: Add float64_spv_h custom target
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>
2022-10-28 10:08:50 +00:00
Marcin Ślusarz
ea7e331fb8 anv: add mesh shading tracepoints
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
2022-10-27 15:03:28 +00:00
Marcin Ślusarz
2bc82581ad anv: add support for mesh shading in INTEL_MEASURE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
2022-10-27 15:03:28 +00:00
Lionel Landwerlin
ed7d64962e intel/common: add detection of protected context support
v2: Add anv bits
    Fix missing i915 extension chaining helper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
2022-10-27 10:53:18 +00:00
Iago Toral Quiroga
9deef4cde6 vulkan/runtime: include robustness info when hashing a shader stage
Suggested by Jason Ekstrand.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
2022-10-27 08:17:11 +00:00
Lionel Landwerlin
93dbd14ed7 anv: init major/minor before WSI
So that we can provide that information to WSI if it asks for it
immediately.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19224>
2022-10-26 20:34:15 +00:00
Lionel Landwerlin
324d945589 anv: disable mesh in memcpy
We can't have streamout and mesh enabled at the same time.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ef04caea9b ("anv: Implement Mesh Shading pipeline")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19323>
2022-10-26 19:55:11 +00:00
Lionel Landwerlin
d766093199 anv: enable localized loads for lower_shader_calls
On Q2RTX shaders :

Instructions in all programs: 31039 -> 26150 (-15.8%)
SENDs in all programs: 1587 -> 1148 (-27.7%)
Loops in all programs: 4 -> 4 (+0.0%)
Cycles in all programs: 420218 -> 392179 (-6.7%)
Spills in all programs: 157 -> 132 (-15.9%)
Fills in all programs: 337 -> 262 (-22.3%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16556>
2022-10-26 12:53:26 +00:00
Lionel Landwerlin
1d10d17817 nir/lower_shader_calls: add an option structure for future optimizations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16556>
2022-10-26 12:53:25 +00:00
Luis Felipe Strano Moraes
eb6668ee86 anv: adding parsetab.py to the .gitignore for grl
This file is autogenerated by python's ply package and is used during
compilation to cache tables built by it for quicker parsing.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19153>
2022-10-20 02:24:39 +00:00
Luis Felipe Strano Moraes
eff1517cd7 anv: added proper handling for input argument in intel_clc
That was previously listed on the getopt_long struct but not actually
being used. This makes intel_clc argument processing easier as now
all of its arguments are handled with getopt and anything after the
special argument '--' is passed along to clang to form the final build
command.

Thanks to Dylan Baker for help with changes to the meson file.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19153>
2022-10-20 02:24:39 +00:00
Iván Briano
91085bf337 anv: enable rayTraversalPrimitiveCulling feature
It is mandatory if VK_KHR_ray_query is supported.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19152>
2022-10-20 00:03:55 +00:00
Iván Briano
d9747169b6 anv: support VK_PIPELINE_CREATE_RAY_TRACING_SKIP_*
VK_PIPELINE_CREATE_RAY_TRACING_SKIP_AABBS_BIT_KHR and
VK_PIPELINE_CREATE_RAY_TRACING_SKIP_TRIANGLES_BIT_KHR, when specified,
make TraceRay behave as if the corresponding shader flags were set, but
without affecting the value of IncomingRayFlags in shaders.

v2 (Lionel): Improve comments

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19152>
2022-10-20 00:03:55 +00:00
Mark Janes
141703f906 anv: work around improper buffer usage in hitman3
Avoid memory errors by returning an error immediately instead of
attempting to allocate the buffer view with an unsupported format.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6998

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17972>
2022-10-19 03:24:36 +00:00
Lionel Landwerlin
a31e8a7568 anv: add a layer for hitman3
This title is trying to create a buffer view with usage not supported by Anv.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17972>
2022-10-19 03:24:36 +00:00
Mark Janes
74d0be27ae anv: compile anv_acceleration_structure.c
This file was unintentionally excluded from meson build support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17972>
2022-10-19 03:24:36 +00:00
Iván Briano
63b2f735b1 anv: use DX rules for point rasterization
It seems that's what the reference renderer in the CTS expects for
Vulkan. This mostly matters if the edges of a point primitive fall
exactly on a pixel sampling point.

Fixes some upcoming tests under
dEQP-VK.pipeline.monolithic.depth.format.*.point_list*

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19026>
2022-10-19 00:20:48 +00:00
Iván Briano
d042669747 anv: compile_upload_rt_shader expects a valid pointer
Fixes crashes on almost every CTS test that uses raytracing pipelines.

Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19130>
2022-10-18 23:55:48 +00:00
Tapani Pälli
b02e9ef35a anv: fill AlphaToCoverageEnable lazily from state
Now the first blend state is filled only when emitted.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19105>
2022-10-18 10:44:57 +03:00
Tapani Pälli
9f75355643 anv: move emit_shading_rate to gfx8_cmd_buffer
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19105>
2022-10-18 10:44:38 +03:00
Luis Felipe Strano Moraes
5bc52a9103 anv: fix FTBFS on grl due to changes in clang 15
This was causing build failures when RT is enabled on recent Fedora releases.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7404

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19094>
2022-10-17 21:27:19 +00:00
Rohan Garg
16d061d3ac anv: Enable 16 bit float ops on devices that have a LSC
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17988>
2022-10-17 15:56:29 +02:00
José Roberto de Souza
86c9aa6bfe intel: Add and use intel_engines_class_to_string()
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18975>
2022-10-15 20:04:51 +00:00
José Roberto de Souza
5269d91efc intel: Convert missing i915 engine types to intel
This convertions were missed due to bad rebased in my end, sorry.

Fixes: 03b959286e ("intel: Make engine related functions and types not i915 dependent")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18975>
2022-10-15 20:04:51 +00:00
Lionel Landwerlin
b49b18f0b7 anv: reduce BT emissions & surface state writes with push descriptors
Zink on Anv running Gfxbench gl_driver2 is significantly slower than
Iris.

The reason is simple, whereas Iris implements uniform updates using
push constants and only has to emit 3DSTATE_CONSTANT_* packets, Zink
uses push descriptors with a uniform buffer, which on our
implementation use both push constants & binding tables.

Anv ends up doing the following for each uniform update :
   - allocate 2 surface states :
      - one for the uniform buffer as the offset specify by zink
      - one for the descriptor set buffer
   - pack the 2 RENDER_SURFACE_STATE
   - re-emit binding tables
   - re-emit push constants

Of all of those operations, only the last one ends up being useful in
this benchmark because all the uniforms have been promoted to push
constants.

This change defers the 3 first operations at draw time and executes
them only if the pipeline needs them.

Vkoverhead before / after :
  descriptor_template_1ubo_push:                      40670 / 85786
  descriptor_template_12ubo_push:                      4050 / 13820
  descriptor_template_1combined_sampler_push,         34410 / 34043
  descriptor_template_16combined_sampler_push,         2746 / 2711
  descriptor_template_1sampled_image_push,            34765 / 34089
  descriptor_template_16sampled_image_push,            2794 / 2649
  descriptor_template_1texelbuffer_push,             108537 / 111342
  descriptor_template_16texelbuffer_push,             20619 / 20166
  descriptor_template_1ssbo_push,                     41506 / 85976
  descriptor_template_8ssbo_push,                      6036 / 18703
  descriptor_template_1image_push,                    88932 / 89610
  descriptor_template_16image_push,                   20937 / 20959
  descriptor_template_1imagebuffer_push,             108407 / 113240
  descriptor_template_16imagebuffer_push,             32661 / 34651

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
2022-10-14 23:03:16 +00:00
Lionel Landwerlin
ff91c5ca42 anv: add analysis for push descriptor uses and store it in shader cache
We'll use this information to avoid :
   - binding table emission
   - allocation of surface states

v2: Fix anv_nir_push_desc_ubo_fully_promoted()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
2022-10-14 23:03:16 +00:00