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anv: generate correct addresses for state pool offsets

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Fixes a number of CTS patterns on DG2 :

   - dEQP-VK.dynamic_rendering.primary_cmd_buff.random*
   - dEQP-VK.draw.*secondary_cmd*
   - dEQP-VK.dynamic_rendering.*secondary_cmd*
   - dEQP-VK.geometry.*secondary_cmd_buffer
   - dEQP-VK.multiview.*secondary_cmd*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9c1c1888d9 ("intel/fs: put scratch surface in the surface state heap")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19946>
(cherry picked from commit 9bb055ff5d)
This commit is contained in:
Lionel Landwerlin 2022-11-23 09:21:36 +02:00 • committed by Eric Engestrom
parent 532521adbc
commit a4eeeb8f78
4 changed files with 26 additions and 19 deletions
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2
.pick_status.json
View file

@ -31,7 +31,7 @@
"description": "anv: generate correct addresses for state pool offsets",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "9c1c1888d9895d05246005620953ee307d1a17f1"
},

10
src/intel/vulkan/anv_private.h
View file

@ -823,6 +823,16 @@ void anv_state_pool_finish(struct anv_state_pool *pool);
struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
uint32_t state_size, uint32_t alignment);
void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
static inline struct anv_address
anv_state_pool_state_address(struct anv_state_pool *pool, struct anv_state state)
{
return (struct anv_address) {
.bo = pool->block_pool.bo,
.offset = state.offset - pool->start_offset,
};
}
void anv_state_stream_init(struct anv_state_stream *stream,
struct anv_state_pool *state_pool,
uint32_t block_size);

2
src/intel/vulkan/genX_blorp_exec.c
View file

@ -112,7 +112,7 @@ blorp_get_surface_base_address(struct blorp_batch *batch)
struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
return (struct blorp_address) {
.buffer = cmd_buffer->device->internal_surface_state_pool.block_pool.bo,
.offset = 0,
.offset = -cmd_buffer->device->internal_surface_state_pool.start_offset,
};
}
#endif

31
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -944,11 +944,13 @@ genX(copy_fast_clear_dwords)(struct anv_cmd_buffer *cmd_buffer,
assert(cmd_buffer && image);
assert(image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
struct anv_address ss_clear_addr = {
.bo = cmd_buffer->device->internal_surface_state_pool.block_pool.bo,
.offset = surface_state.offset +
cmd_buffer->device->isl_dev.ss.clear_value_offset,
};
struct anv_address ss_clear_addr =
anv_state_pool_state_address(
&cmd_buffer->device->internal_surface_state_pool,
(struct anv_state) {
.offset = surface_state.offset +
cmd_buffer->device->isl_dev.ss.clear_value_offset
});
const struct anv_address entry_addr =
anv_image_get_clear_color_addr(cmd_buffer->device, image, aspect);
unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size;
@ -1690,22 +1692,17 @@ genX(CmdExecuteCommands)(
* copy the surface states for the current subpass into the storage
* we allocated for them in BeginCommandBuffer.
*/
struct anv_bo *ss_bo =
primary->device->internal_surface_state_pool.block_pool.bo;
struct anv_state src_state = primary->state.gfx.att_states;
struct anv_state dst_state = secondary->state.gfx.att_states;
assert(src_state.alloc_size == dst_state.alloc_size);
genX(cmd_buffer_so_memcpy)(primary,
(struct anv_address) {
.bo = ss_bo,
.offset = dst_state.offset,
},
(struct anv_address) {
.bo = ss_bo,
.offset = src_state.offset,
},
src_state.alloc_size);
genX(cmd_buffer_so_memcpy)(
primary,
anv_state_pool_state_address(&primary->device->internal_surface_state_pool,
dst_state),
anv_state_pool_state_address(&primary->device->internal_surface_state_pool,
src_state),
src_state.alloc_size);
}
anv_cmd_buffer_add_secondary(primary, secondary);