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anv: Implement vkCmdTraceRays and vkCmdTraceRaysIndirect
v2: Fix anv_cmd_state::binding_tables array size (Lionel) v2: Fix anv_cmd_state::samplers array size (Lionel) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
This commit is contained in:
Jason Ekstrand
Marge Bot
parent
ac6d7a1758
commit
7479fe6ae0
2 changed files with 245 additions and 4 deletions
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@ -2983,8 +2983,8 @@ struct anv_cmd_state {
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struct anv_vertex_binding vertex_bindings[MAX_VBS];
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bool xfb_enabled;
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struct anv_xfb_binding xfb_bindings[MAX_XFB_BUFFERS];
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struct anv_state binding_tables[MESA_SHADER_STAGES];
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struct anv_state samplers[MESA_SHADER_STAGES];
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struct anv_state binding_tables[MESA_VULKAN_SHADER_STAGES];
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struct anv_state samplers[MESA_VULKAN_SHADER_STAGES];
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unsigned char sampler_sha1s[MESA_SHADER_STAGES][20];
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unsigned char surface_sha1s[MESA_SHADER_STAGES][20];
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@ -34,6 +34,7 @@
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#include "common/intel_l3_config.h"
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#include "genxml/gen_macros.h"
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#include "genxml/genX_pack.h"
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#include "genxml/gen_rt_pack.h"
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#include "nir/nir_xfb_info.h"
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@ -4928,6 +4929,227 @@ void genX(CmdDispatchIndirect)(
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emit_cs_walker(cmd_buffer, pipeline, true, prog_data, 0, 0, 0);
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}
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#if GFX_VERx10 >= 125
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static void
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calc_local_trace_size(uint8_t local_shift[3], const uint32_t global[3])
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{
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unsigned total_shift = 0;
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memset(local_shift, 0, 3);
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bool progress;
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do {
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progress = false;
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for (unsigned i = 0; i < 3; i++) {
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assert(global[i] > 0);
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if ((1 << local_shift[i]) < global[i]) {
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progress = true;
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local_shift[i]++;
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total_shift++;
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}
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if (total_shift == 3)
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return;
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}
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} while(progress);
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/* Assign whatever's left to x */
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local_shift[0] += 3 - total_shift;
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}
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static struct GFX_RT_SHADER_TABLE
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vk_sdar_to_shader_table(const VkStridedDeviceAddressRegionKHR *region)
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{
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return (struct GFX_RT_SHADER_TABLE) {
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.BaseAddress = anv_address_from_u64(region->deviceAddress),
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.Stride = region->stride,
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};
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}
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static void
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cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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const VkStridedDeviceAddressRegionKHR *raygen_sbt,
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const VkStridedDeviceAddressRegionKHR *miss_sbt,
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const VkStridedDeviceAddressRegionKHR *hit_sbt,
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const VkStridedDeviceAddressRegionKHR *callable_sbt,
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bool is_indirect,
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uint32_t launch_width,
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uint32_t launch_height,
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uint32_t launch_depth,
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uint64_t launch_size_addr)
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{
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struct anv_cmd_ray_tracing_state *rt = &cmd_buffer->state.rt;
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struct anv_ray_tracing_pipeline *pipeline = rt->pipeline;
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if (anv_batch_has_error(&cmd_buffer->batch))
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return;
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/* If we have a known degenerate launch size, just bail */
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if (!is_indirect &&
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(launch_width == 0 || launch_height == 0 || launch_depth == 0))
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return;
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genX(cmd_buffer_config_l3)(cmd_buffer, pipeline->base.l3_config);
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genX(flush_pipeline_select_gpgpu)(cmd_buffer);
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cmd_buffer->state.rt.pipeline_dirty = false;
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genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
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/* Add these to the reloc list as they're internal buffers that don't
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* actually have relocs to pick them up manually.
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*
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* TODO(RT): This is a bit of a hack
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*/
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anv_reloc_list_add_bo(cmd_buffer->batch.relocs,
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cmd_buffer->batch.alloc,
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rt->scratch.bo);
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/* Allocate and set up our RT_DISPATCH_GLOBALS */
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struct anv_state rtdg_state =
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anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
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BRW_RT_PUSH_CONST_OFFSET +
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sizeof(struct anv_push_constants),
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64);
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struct GFX_RT_DISPATCH_GLOBALS rtdg = {
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.MemBaseAddress = (struct anv_address) {
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.bo = rt->scratch.bo,
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.offset = rt->scratch.layout.ray_stack_start,
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},
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.CallStackHandler =
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anv_shader_bin_get_bsr(pipeline->trivial_return_shader, 0),
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.AsyncRTStackSize = rt->scratch.layout.ray_stack_stride / 64,
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.NumDSSRTStacks = rt->scratch.layout.stack_ids_per_dss,
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.MaxBVHLevels = BRW_RT_MAX_BVH_LEVELS,
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.Flags = RT_DEPTH_TEST_LESS_EQUAL,
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.HitGroupTable = vk_sdar_to_shader_table(hit_sbt),
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.MissGroupTable = vk_sdar_to_shader_table(miss_sbt),
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.SWStackSize = rt->scratch.layout.sw_stack_size / 64,
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.LaunchWidth = launch_width,
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.LaunchHeight = launch_height,
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.LaunchDepth = launch_depth,
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.CallableGroupTable = vk_sdar_to_shader_table(callable_sbt),
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};
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GFX_RT_DISPATCH_GLOBALS_pack(NULL, rtdg_state.map, &rtdg);
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/* Push constants go after the RT_DISPATCH_GLOBALS */
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assert(GFX_RT_DISPATCH_GLOBALS_length * 4 <= BRW_RT_PUSH_CONST_OFFSET);
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memcpy(rtdg_state.map + BRW_RT_PUSH_CONST_OFFSET,
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&cmd_buffer->state.rt.base.push_constants,
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sizeof(struct anv_push_constants));
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struct anv_address rtdg_addr = {
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.bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
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.offset = rtdg_state.offset,
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};
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uint8_t local_size_log2[3];
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uint32_t global_size[3] = {};
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if (is_indirect) {
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/* Pick a local size that's probably ok. We assume most TraceRays calls
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* will use a two-dimensional dispatch size. Worst case, our initial
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* dispatch will be a little slower than it has to be.
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*/
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local_size_log2[0] = 2;
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local_size_log2[1] = 1;
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local_size_log2[2] = 0;
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struct mi_builder b;
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mi_builder_init(&b, &cmd_buffer->device->info, &cmd_buffer->batch);
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struct mi_value launch_size[3] = {
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mi_mem32(anv_address_from_u64(launch_size_addr + 0)),
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mi_mem32(anv_address_from_u64(launch_size_addr + 4)),
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mi_mem32(anv_address_from_u64(launch_size_addr + 8)),
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};
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/* Store the original launch size into RT_DISPATCH_GLOBALS
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*
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* TODO: Pull values from genX_bits.h once RT_DISPATCH_GLOBALS gets
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* moved into a genX version.
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*/
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mi_store(&b, mi_mem32(anv_address_add(rtdg_addr, 52)),
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mi_value_ref(&b, launch_size[0]));
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mi_store(&b, mi_mem32(anv_address_add(rtdg_addr, 56)),
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mi_value_ref(&b, launch_size[1]));
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mi_store(&b, mi_mem32(anv_address_add(rtdg_addr, 60)),
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mi_value_ref(&b, launch_size[2]));
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/* Compute the global dispatch size */
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for (unsigned i = 0; i < 3; i++) {
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if (local_size_log2[i] == 0)
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continue;
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/* global_size = DIV_ROUND_UP(launch_size, local_size)
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*
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* Fortunately for us MI_ALU math is 64-bit and , mi_ushr32_imm
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* has the semantics of shifting the enture 64-bit value and taking
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* the bottom 32 so we don't have to worry about roll-over.
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*/
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uint32_t local_size = 1 << local_size_log2[i];
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launch_size[i] = mi_iadd(&b, launch_size[i],
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mi_imm(local_size - 1));
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launch_size[i] = mi_ushr32_imm(&b, launch_size[i],
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local_size_log2[i]);
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}
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mi_store(&b, mi_reg32(GPGPU_DISPATCHDIMX), launch_size[0]);
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mi_store(&b, mi_reg32(GPGPU_DISPATCHDIMY), launch_size[1]);
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mi_store(&b, mi_reg32(GPGPU_DISPATCHDIMZ), launch_size[2]);
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} else {
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uint32_t launch_size[3] = { launch_width, launch_height, launch_depth };
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calc_local_trace_size(local_size_log2, launch_size);
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for (unsigned i = 0; i < 3; i++) {
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/* We have to be a bit careful here because DIV_ROUND_UP adds to the
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* numerator value may overflow. Cast to uint64_t to avoid this.
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*/
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uint32_t local_size = 1 << local_size_log2[i];
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global_size[i] = DIV_ROUND_UP((uint64_t)launch_size[i], local_size);
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}
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}
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anv_batch_emit(&cmd_buffer->batch, GENX(COMPUTE_WALKER), cw) {
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cw.IndirectParameterEnable = is_indirect;
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cw.PredicateEnable = false;
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cw.SIMDSize = SIMD8;
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cw.LocalXMaximum = (1 << local_size_log2[0]) - 1;
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cw.LocalYMaximum = (1 << local_size_log2[1]) - 1;
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cw.LocalZMaximum = (1 << local_size_log2[2]) - 1;
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cw.ThreadGroupIDXDimension = global_size[0];
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cw.ThreadGroupIDYDimension = global_size[1];
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cw.ThreadGroupIDZDimension = global_size[2];
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cw.ExecutionMask = 0xff;
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cw.EmitInlineParameter = true;
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const gl_shader_stage s = MESA_SHADER_RAYGEN;
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struct anv_state *surfaces = &cmd_buffer->state.binding_tables[s];
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struct anv_state *samplers = &cmd_buffer->state.samplers[s];
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cw.InterfaceDescriptor = (struct GENX(INTERFACE_DESCRIPTOR_DATA)) {
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.KernelStartPointer = pipeline->trampoline.offset,
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.SamplerStatePointer = samplers->offset,
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/* i965: DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4), */
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.SamplerCount = 0,
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.BindingTablePointer = surfaces->offset,
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.NumberofThreadsinGPGPUThreadGroup = 1,
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.BTDMode = true,
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};
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struct brw_rt_raygen_trampoline_params trampoline_params = {
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.rt_disp_globals_addr = anv_address_physical(rtdg_addr),
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.raygen_bsr_addr = raygen_sbt->deviceAddress,
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.is_indirect = is_indirect,
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.local_group_size_log2 = {
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local_size_log2[0],
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local_size_log2[1],
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local_size_log2[2],
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},
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};
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STATIC_ASSERT(sizeof(trampoline_params) == 32);
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memcpy(cw.InlineData, &trampoline_params, sizeof(trampoline_params));
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}
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}
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void
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genX(CmdTraceRaysKHR)(
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VkCommandBuffer commandBuffer,
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@ -4939,7 +5161,16 @@ genX(CmdTraceRaysKHR)(
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uint32_t height,
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uint32_t depth)
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{
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unreachable("Unimplemented");
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
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cmd_buffer_trace_rays(cmd_buffer,
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pRaygenShaderBindingTable,
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pMissShaderBindingTable,
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pHitShaderBindingTable,
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pCallableShaderBindingTable,
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false /* is_indirect */,
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width, height, depth,
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0 /* launch_size_addr */);
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}
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void
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@ -4951,8 +5182,18 @@ genX(CmdTraceRaysIndirectKHR)(
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const VkStridedDeviceAddressRegionKHR* pCallableShaderBindingTable,
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VkDeviceAddress indirectDeviceAddress)
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{
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unreachable("Unimplemented");
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
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cmd_buffer_trace_rays(cmd_buffer,
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pRaygenShaderBindingTable,
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pMissShaderBindingTable,
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pHitShaderBindingTable,
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pCallableShaderBindingTable,
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true /* is_indirect */,
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0, 0, 0, /* width, height, depth, */
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indirectDeviceAddress);
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}
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#endif /* GFX_VERx10 >= 125 */
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static void
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genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer,
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