Commit graph

55884 commits

Author SHA1 Message Date
Matt Turner
ecc6c3d4ab glsl: Optimize lrp(0, y, a) into y * a.
Helps two programs in shader-db:

instructions in affected programs:     254 -> 234 (-7.87%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-28 10:36:06 -08:00
Brian Paul
43dee0295e mesa: do depth/stencil format conversion in glGetTexImage
glGetTexImage(GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8) was just
using memcpy() instead of _mesa_unpack_uint_24_8_depth_stencil_row()
to convert texels from the hardware format to the GL format.

Fixes issue reported by David Meng at Intel.  The new piglit
ext_packed_depth_stencil-getteximage test checks for this bug.

Also, add some format/type assertions.  We don't yet handle the
GL_FLOAT_32_UNSIGNED_INT_24_8_REV type.  That should be fixed in
a follow-on patch.

Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-28 07:02:55 -07:00
Brian Paul
84787aae95 mesa: fix depth/stencil comments in formats.h 2014-02-28 07:02:36 -07:00
Thomas Hellstrom
f5e681f3fa winsys/svga: Avoid calling drm getparam for max surface size on older kernels
This avoids the kernel driver spewing out errors about the param not being
supported.

Also correct the max surface size used when the kernel does not support the
query.

Reported-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-28 11:11:21 +01:00
Kenneth Graunke
085f61bd4e meta: Drop ctx->API checks.
API is always API_OPENGL_COMPAT (since commit 4e4a537ad5,
"meta: Push into desktop GL mode when doing meta operations."),
so most of these checks do nothing.

We could instead check save->API to only bother setting/restoring
relevant GL state, but I'm not sure saving a few _mesa_set_enable
calls is worth the complexity.  My understanding is the point of
the ctx->API guards was to avoid raising GL errors.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-27 10:07:40 -08:00
Kenneth Graunke
cf719a0204 meta: Restore API at the end of _mesa_meta_end(), not the start.
In _mesa_meta_begin(), we switch to API_OPENGL_COMPAT, then munge a lot
of state (including some that doesn't exist in the actual API - like
PolygonStipple in API_OPENGL_CORE).

It seems reasonable that in _mesa_meta_end(), we should restore it,
then switch back to the original API.  This at least makes it symmetric.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-02-27 10:07:40 -08:00
Roland Scheidegger
612a1d5be1 util/u_format: don't crash in util_format_translate if we can't do translation
Some formats can't be handled - in particular cannot handle ints/uints formats,
which lack the pack_rgba_float/unpack_rgba_float functions. Instead of trying
to call these (and crash) return an error (I'm not sure yet if we should try
to translate such formats too here might not make much sense).

v2: suggested by Jose, use separate checks for pack/unpack of rgba_8unorm and
rgba_float functions (right now if one exists the other should as well).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-02-27 17:56:10 +01:00
Kenneth Graunke
80c1b9349c i965: Convert VUE map generation checks to if rather than switch.
There are currently only two VUE map layouts: one for Gen4-5, and one
for everything else.  We keep having to add new "case N+1" labels for
every new hardware generation, and so far it's always been the same.

This patch makes it so we only have to do work in the case where
something actually changes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-27 00:05:55 -08:00
Kenneth Graunke
9b1a6745f6 i965: Only emit VS state pipe control workaround on IVB and BYT.
According to the BSpec's 3D workarounds page, this is unnecessary on
shipping Haswell hardware, and was never necessary on Broadwell.  It
unfortunately doesn't say anything about Baytrail.

The workaround database confirms those results for Ivybridge, Haswell,
and Broadwell.  Baytrail is less clear - one page says it's necessary,
while the other says it isn't.  For now, be conservative and leave it
enabled.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-27 00:05:48 -08:00
Ilia Mirkin
51fc093421 nouveau: add a nouveau_compiler binary to compile TGSI into shader ISA
This makes it easy to compare output between different cards, especially
for ones that you don't have (and/or not in the current machine).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:48 -05:00
Ilia Mirkin
dd370f0af6 nv30: remove nv30_context use from nvfx_*prog
This should pave the way to being able to use the compiler without a
context. Also leads to cleaner code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:47 -05:00
Ilia Mirkin
41dbc4c444 nv30: remove unused sprite flipping parameter
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:47 -05:00
Ilia Mirkin
fe2738f998 nv30: remove unused render_mode and hw_pointsprite_control
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:46 -05:00
Ilia Mirkin
8f23d08928 nv30: remove use_nv4x, it is identical to is_nv4x
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:45 -05:00
Michel Daenzer
59936a49dd radeonsi: Prevent geometry shader from emitting too many vertices 2014-02-27 10:27:55 +09:00
Anuj Phogat
b3094d9927 i965: Fix the region's pitch condition to use blitter
intelEmitCopyBlit uses a signed 16-bit integer to represent
buffer pitch, so it can only handle buffer pitches < 32k.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-26 13:43:00 -08:00
Brian Paul
863a1f7757 glsl: add switch case for MESA_SHADER_COMPUTE
To fix warning about unhandled enum value.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-02-26 13:29:16 -07:00
Kenneth Graunke
fe8f3bef31 meta: Use a #define for the vector type to avoid %svec4 everywhere.
By adding "#define gvec4 %svec4" to the top of our fragment shader, we
can write generic code without needing to specialize it to vec4, ivec4,
or uvec4 via asprintf.

This also makes the INT and UNSIGNED_INT merge function code identical,
so I combined those two cases.

It's not a big savings, but a little bit tidier.

v2: Rebase on Vinson's MSVC build fixes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-26 02:33:58 -08:00
Kenneth Graunke
f896e82301 i965: Don't try to dump shader source for fixed-function FS programs.
sh->Source is NULL and this will segfault.

Fixes MESA_GLSL=dump with "The Swapper".

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:31:24 -08:00
Kenneth Graunke
b18871c863 i965: Don't forget to subtract mt->first_level in minify calls.
This fixes fbo-clear-formats GL_ARB_depth_texture on Ironlake, which
regressed since commit f128bcc7c2
("i965: Drop mt->levels[].width/height.")  intel_miptree_copy_slice was
calling minify(.., 7) on a 2x2 texture with mt->first_level == 7.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75292
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:29:44 -08:00
Kenneth Graunke
ac0a8b9540 glsl: Delete LRP_TO_ARITH lowering pass flag.
Tt's kind of a trap---calling do_common_optimization() after
lower_instructions() may cause opt_algebraic() to reintroduce
ir_triop_lrp expressions that were lowered, effectively defeating the
point.  Because of this, nobody uses it.

v2: Delete more code (caught by Ian Romanick).

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:16:56 -08:00
Kenneth Graunke
2fdea48e21 i965: Stop lowering ir_triop_lrp.
Both the vector and scalar backends now support it natively, so there's
no point in lowering it.

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:16:55 -08:00
Kenneth Graunke
56879a7ac4 i965/vec4: Handle ir_triop_lrp on Gen4-5 as well.
When the vec4 backend encountered an ir_triop_lrp, it always emitted an
actual LRP instruction, which only exists on Gen6+.  Gen4-5 used
lower_instructions() to decompose ir_triop_lrp at the IR level.

Since commit 8d37e9915a ("glsl: Optimize open-coded lrp into lrp."),
we've had an bug where lower_instructions translates ir_triop_lrp into
arithmetic, but opt_algebraic reassembles it back into a lrp.

To avoid this ordering concern, just handle ir_triop_lrp in the backend.
The FS backend already does this, so we may as well do likewise.

v2: Add a comment reminding us that we could emit better assembly if we
    implemented the infrastructure necessary to support using MAC.
    (Assembly code provided by Eric Anholt).

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75253
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:16:53 -08:00
Kenneth Graunke
ffde483f3c i965/vec4: Add a brw->gen >= 6 assertion in three-source emitters.
Three source instructions didn't exist until Gen6.  vec4_generator has
assertions to catch this, but catching it in the visitor provides a
nicer backtrace.

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2014-02-26 02:16:34 -08:00
Chia-I Wu
bb9c8071ea ilo: create u_upload_mgr last
Similar to u_blitter, u_upload_mgr is now a client of the pipe context.  Its
creation needs to be delayed until the context has been (almost) initialized.
2014-02-26 11:33:37 +08:00
Fredrik Höglund
3616e862f2 glx: Fix the GLXFBConfig attrib sort priorities
The sort priorites for GLX_SAMPLES and GLX_SAMPLE_BUFFERS are
not defined in GL_ARB_multisample, but they are defined in
the GLX 1.4 specification.

Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-26 02:17:12 +01:00
Fredrik Höglund
f41c2f6c33 glx: Fix the default values for GLXFBConfig attributes
The default values for GLX_DRAWABLE_TYPE and GLX_RENDER_TYPE are
GLX_WINDOW_BIT and GLX_RGBA_BIT respectively, as specified in
the GLX 1.4 specification.

This fixes the glx-choosefbconfig-defaults piglit test.

Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-26 02:16:42 +01:00
Tom Stellard
54df6a0491 Re-commit 'clover: Fix build with LLVM 3.5'
This was accidentally reverted in 9dfd7c5f75
2014-02-25 14:43:26 -08:00
Vinson Lee
f094866d93 mesa: Add GL_ARB_buffer_storage to dispatch_sanity.cpp.
Fixes 'make check' failure introduced with commit
119ffa7307.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75503
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-02-25 14:00:08 -08:00
Timothy Arceri
9dfd7c5f75 Revert "Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/mesa"
This reverts commit 1b79582f32, reversing
changes made to 376a98d345.
2014-02-26 08:46:08 +11:00
Timothy Arceri
1b79582f32 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/mesa
ry,
2014-02-26 08:39:32 +11:00
Tom Stellard
fcd499730b clover: Fix build with LLVM 3.5 2014-02-25 13:32:37 -08:00
Timothy Arceri
376a98d345 glsl: removed unused dimension_count varible
This variable is no longer needed after the cleanup to the
code prior to the first arrays of array series

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-02-26 08:31:25 +11:00
Eric Anholt
42c2366de5 i965: Fix segfaults since the buffer_storage changes. 2014-02-25 12:19:15 -08:00
Ilia Mirkin
d1b1329c3a nv50: enable txg where supported
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-25 14:42:34 -05:00
Ilia Mirkin
0e71c65db0 nv50: enable cube map array texture support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-25 14:42:34 -05:00
Brian Paul
5a3dc449a9 libgl-xlib: add -Isrc/gallium/winsys flag
So that sw/xlib/xlib_sw_winsys.h can be found.  Fixes a build break.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-02-25 12:35:07 -07:00
Brian Paul
c88a0b6af3 st/mesa: add comment to explain _min(), _maxf(), etc. functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-02-25 12:35:07 -07:00
Marek Olšák
9855477e90 r600g,radeonsi: consolidate create_surface and surface_destroy
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:26 +01:00
Marek Olšák
b9aa8ed009 radeonsi: inline util_blitter_copy_texture
This will be used for changing texture properties without modifying
pipe_resource like r600g, but not in this series. For now, this change
allows consolidation of pipe_surface functions.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:22 +01:00
Marek Olšák
f7176d700f radeonsi: remove useless psbox variable from resource_copy_region
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:20 +01:00
Marek Olšák
80eb377a37 radeonsi: compute depth surface registers only once
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:18 +01:00
Marek Olšák
629b019a40 radeonsi: compute color surface registers only once
Same as r600g.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:17 +01:00
Marek Olšák
6b4e03216a r600g: remove r600_resource.h
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:15 +01:00
Marek Olšák
ec266d06d0 r600g: remove r600_surface::htile_enabled
v2: use one of the htile registers instead

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:12 +01:00
Marek Olšák
7fc6ece40e r600g: use r600_surface::db_z_info
db_z_info was unused. This just renames the variable to match the register
name.

Now, db_depth_info is unused on Evergreen.
Both variables will be needed on SI though.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:10 +01:00
Marek Olšák
40b9812a76 r600g,radeonsi: share r600_surface
I'm gonna use this in radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:08 +01:00
Marek Olšák
933eaeee25 radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to framebuffer state
It doesn't depend on anything else.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25 16:08:05 +01:00
Marek Olšák
dca350201e mesa: allow buffers to be mapped multiple times
OpenGL allows a buffer to be mapped only once, but we also map buffers
internally, e.g. in the software primitive restart fallback, for PBOs,
vbo_get_minmax_index, etc. This has always been a problem, but it will
be a bigger problem with persistent buffer mappings, which will prevent
all Mesa functions from mapping buffers for internal purposes.

This adds a driver interface to core Mesa which supports multiple buffer
mappings and allows 2 mappings: one for the GL user and one for Mesa.

Note that Gallium supports an unlimited number of buffer and texture
mappings, so it's not really an issue for Gallium.

v2: fix unmapping in xm_dd.c, remove the GL errors there
v3: fix the intel driver (by Fredrik)

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2014-02-25 16:07:33 +01:00
Marek Olšák
04fb4bf61b gallium/upload_mgr: remove useless variable "size"
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2014-02-25 16:07:33 +01:00