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r600g: use r600_surface::db_z_info
db_z_info was unused. This just renames the variable to match the register name. Now, db_depth_info is unused on Evergreen. Both variables will be needed on SI though. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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parent
40b9812a76
commit
7fc6ece40e
1 changed files with 10 additions and 10 deletions
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@ -1641,15 +1641,15 @@ static void evergreen_init_depth_surface(struct r600_context *rctx,
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nbanks = eg_num_banks(rscreen->b.tiling_info.num_banks);
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offset >>= 8;
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surf->db_depth_info = S_028040_ARRAY_MODE(array_mode) |
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S_028040_FORMAT(format) |
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S_028040_TILE_SPLIT(tile_split)|
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S_028040_NUM_BANKS(nbanks) |
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S_028040_BANK_WIDTH(bankw) |
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S_028040_BANK_HEIGHT(bankh) |
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S_028040_MACRO_TILE_ASPECT(macro_aspect);
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surf->db_z_info = S_028040_ARRAY_MODE(array_mode) |
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S_028040_FORMAT(format) |
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S_028040_TILE_SPLIT(tile_split)|
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S_028040_NUM_BANKS(nbanks) |
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S_028040_BANK_WIDTH(bankw) |
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S_028040_BANK_HEIGHT(bankh) |
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S_028040_MACRO_TILE_ASPECT(macro_aspect);
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if (rscreen->b.chip_class == CAYMAN && rtex->resource.b.b.nr_samples > 1) {
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surf->db_depth_info |= S_028040_NUM_SAMPLES(util_logbase2(rtex->resource.b.b.nr_samples));
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surf->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(rtex->resource.b.b.nr_samples));
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}
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surf->db_depth_base = offset;
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surf->db_depth_view = S_028008_SLICE_START(surf->base.u.tex.first_layer) |
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@ -1709,7 +1709,7 @@ static void evergreen_init_depth_surface(struct r600_context *rctx,
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S_028ABC_HTILE_HEIGHT(1) |
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S_028ABC_FULL_CACHE(1) |
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S_028ABC_LINEAR(1);
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surf->db_depth_info |= S_028040_TILE_SURFACE_ENABLE(1);
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surf->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1);
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surf->db_preload_control = 0;
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}
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@ -2279,7 +2279,7 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
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r600_write_context_reg(cs, R_028008_DB_DEPTH_VIEW, zb->db_depth_view);
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r600_write_context_reg_seq(cs, R_028040_DB_Z_INFO, 8);
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radeon_emit(cs, zb->db_depth_info); /* R_028040_DB_Z_INFO */
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radeon_emit(cs, zb->db_z_info); /* R_028040_DB_Z_INFO */
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radeon_emit(cs, zb->db_stencil_info); /* R_028044_DB_STENCIL_INFO */
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radeon_emit(cs, zb->db_depth_base); /* R_028048_DB_Z_READ_BASE */
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radeon_emit(cs, zb->db_stencil_base); /* R_02804C_DB_STENCIL_READ_BASE */
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