On Xe2 and Xe3, the flushing is necessary due to aliasing of TGM data
in L1 memory (HSD 14020414266). On newer platforms, it is necessary
for proper post-format data conversion handling (HSD 22020984324).
See the Instruction_Fence page (63969) for documentation on the fact
that the threadgroup scope ignores flushes.
Thanks to Francisco Jerez and Kenneth Graunke on their help for this
patch.
v2: restrict the flushing to TGM (Lionel).
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
If we're a bit clever with the bits, we can make one fixup helper that
works for all rounding modes. See the giant comment for details.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41295>
This makes the tests names a bit more consistent and takes advantage of
the namespacing that gtest already gives us. (There's no reason to put
the whole prefix in the test name again.)
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41295>
Smashing bits is super sketchy. However, all the bits do is force the
test down the _slow path so let's explicitly test that instead.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41295>
This prints the swizzle pattern for all non-XOR tiling modes.
It can be used to determine which GPUs have the same tiling.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41405>
Synchronize it with the values it actually accepts right now.
v2: Other values were added by other patches after I wrote this one.
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41277>
These options were replaced by ANV_DEBUG=no-sparse and
ANV_DEBUG=sparse-trtt in April of 2025, by 789f13359a ("anv:
consolidate environment variables"). The ANV_DEBUG versions are
already documented.
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41277>
This can only happen with RADV_DEBUG=fullsync which literally flushes
all caches, but INV_ICACHE is invalid with RELEASE_MEM apparently.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41396>
This removes 18042479026 as we don't utilize BRW_AOP_MOV in compiler
and adds missing xe2 entries for 14025112257.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41281>
The common Mesa Vulkan WSI code checks some DRI options.
Add them to the option list of the PVR driver.
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41197>
The DRI options list is formatted specically and clang-format cannot
handle it properly.
Disable clang-format for this snippet.
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41197>
Bringing force_vk_vendor as the first option, force_vk_devicename
will be added later
Signed-off-by: hmtheboy154 <buingoc67@gmail.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
[Icenowy: rebased on top of main]
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41197>
The kernel looks at drm_panthor_timestamp_info::flags, so it can't be
uninitialized.
Fixes: 302127fe ("pan/kmod: Add timestamp uapi support")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41418>
There's no point in having these as separate passes that live in the
compiler. We already have lower_res_indices(), which is panfrost's
equivalent to panvk's descriptor lowering. We can just do it there.
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41320>
We currently rely on nir_lower_tex_options::lower_index_to_offset but
there's really no reason for this. Our pan_nir_res_handle() helper can
already take both an immediate and a dynamic index.
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41320>
It's only a couple lines of code since we're already doing this for
UBOs. It doesn't need to be a separate pass.
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41320>
Previously, we only supported one of the index or the offset source and
relied on lower_index_to_offset to ensure we only had one or the other.
However, now that we're doing things in NIR, it's trivial to support the
full index+offset form.
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41320>
Everything inside the gfx folder isn't built when HAVE_GFX_COMPUTE
isn't present so we don't need to stub these methods.
Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41133>
And move code specific to gfx/compute from radeonsi_screen_create_impl there.
ac_init_llvm_once has to stay in si_pipe.c because it has to be called very
early to avoid conflicts with u_queue initialisation.
Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41133>
Same as si_resource_copy_resource except it only supports buffers.
Also make sure that si_compute_clear_copy_buffer doesn't do
anything when has_gfx_compute is false.
Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41133>