fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-08 04:48:08 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

iris: use INTEL_NEEDS_WA_14025112257 define for workaround

Browse source 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41281>
This commit is contained in:
Tapani Pälli 2026-04-30 07:48:43 +03:00 • committed by Marge Bot
parent c381b4fdd4
commit c6f503bed6
2 changed files with 9 additions and 15 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/gallium/drivers/iris/iris_blorp.c
View file

@ -446,14 +446,12 @@ iris_blorp_exec_blitter(struct blorp_batch *blorp_batch,
iris_bo_bump_seqno(params->dst.addr.buffer, batch->next_seqno,
IRIS_DOMAIN_OTHER_WRITE);
/*
* TDOD: Add INTEL_NEEDS_WA_14025112257 check once HSD is propogated for all
* other impacted platforms.
*/
if (batch->screen->devinfo->ver >= 20 && batch->name == IRIS_BATCH_COMPUTE) {
#if INTEL_NEEDS_WA_14025112257
if (batch->name == IRIS_BATCH_COMPUTE) {
iris_emit_pipe_control_flush(batch, "WA_14025112257",
PIPE_CONTROL_STATE_CACHE_INVALIDATE);
}
#endif
}
static void

16
src/gallium/drivers/iris/iris_state.c
View file

@ -663,14 +663,12 @@ iris_rewrite_compute_walker_pc(struct iris_batch *batch,
for (uint32_t i = 0; i < GENX(COMPUTE_WALKER_length); i++)
walker[i] |= dwords[i];
/*
* TDOD: Add INTEL_NEEDS_WA_14025112257 check once HSD is propogated for all
* other impacted platforms.
*/
if (screen->devinfo->ver >= 20 && batch->name == IRIS_BATCH_COMPUTE) {
#if INTEL_NEEDS_WA_14025112257
if (batch->name == IRIS_BATCH_COMPUTE) {
iris_emit_pipe_control_flush(batch, "WA_14025112257",
PIPE_CONTROL_STATE_CACHE_INVALIDATE);
}
#endif
#else
UNREACHABLE("Unsupported");
#endif
@ -9227,14 +9225,12 @@ struct GENX(COMPUTE_WALKER_BODY) body = {
}
}
/*
* TDOD: Add INTEL_NEEDS_WA_14025112257 check once HSD is propogated for all
* other impacted platforms.
*/
if (screen->devinfo->ver >= 20 && batch->name == IRIS_BATCH_COMPUTE) {
#if INTEL_NEEDS_WA_14025112257
if (batch->name == IRIS_BATCH_COMPUTE) {
iris_emit_pipe_control_flush(batch, "WA_14025112257",
PIPE_CONTROL_STATE_CACHE_INVALIDATE);
}
#endif
trace_intel_end_compute(&batch->trace, grid->grid[0], grid->grid[1], grid->grid[2], 0);
}