Commit graph

15202 commits

Author SHA1 Message Date
Lionel Landwerlin
c199f44d17 intel/fs: name sources for A64 opcodes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin
23ce94ff7e intel/nir/rt: add a new number of SIMD lanes per DSS helper
v2: Add prefix brw_nir_rt (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin
61c9b7a82e intel/fs: add support for Eu/Thread/Lane id
This index will be used for accessing ray query data in memory.

v2: Drop a MOV (Caio)

v3: Rework back code emission (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin
3dabe93257 intel/fs: rework dss_id opcode into generic opcode
We'll want different types of IDs based on topology. Let's make this
more flexible and also move the bit shifting code a layer above where
it's easier to do bitshifting operations, especially if you need to
stash things into temporary registers.

v2: Keep previous comment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin
4deb8e86df nir: change intel dss_id intrinsic to topology_id
This will allow to reuse the same intrinsic for various topology based
ID.

v2: fix intrinsic comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
2022-02-08 12:55:24 +00:00
Lionel Landwerlin
fdb74a77d2 intel/ds: fix compilation with perfetto
Forgot to test with perfetto...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9da3d714b8 ("anv: add dynamic rendering traces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5992
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14914>
2022-02-08 12:29:21 +00:00
Kenneth Graunke
9c5dc4985b blorp: Assert that blorp_copy() on the blitter can handle it
Safeguards against callers that don't guarantee the necessary things.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
2022-02-07 09:50:01 -08:00
Kenneth Graunke
d2646e147b intel/genxml: Add missing MI_FLUSH_DW::Flush CCS field
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
2022-02-07 09:50:01 -08:00
Kenneth Graunke
c7a357787f anv: Increase maxUniformBufferRange to 2^30 when not using the sampler
The limit here is from the RENDER_SURFACE_STATE height/width/depth
fields - it's 2^30 for ISL_FORMAT_RAW buffers, and 2^27 otherwise.

anv_isl_format_for_descriptor_type() uses ISL_FORMAT_R32G32B32A32_FLOAT
for uniform buffers when compiler->indirect_ubos_use_sampler is set
(Icelake and earlier), but ISL_FORMAT_RAW when it isn't (Tigerlake+).

So we can increase the limit on Tigerlake and later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14892>
2022-02-05 11:23:16 -08:00
Lionel Landwerlin
9da3d714b8 anv: add dynamic rendering traces
v2: Get rid of subpass_count

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
2022-02-04 23:43:48 +00:00
Lionel Landwerlin
d0811ca046 anv: flush utrace before at device destroy
Ensuring any remaining traces are displayed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
2022-02-04 23:43:48 +00:00
Dylan Baker
2f916f2be6 meson: add support for meson devenv with vulkan
Meson devenv is a feature added in meson 0.58 (thus the features is
version guarded) that allows creating a shell environment with
environment variables automatically setup for running the project inside
the build dir. Some variables (such as LD_LIBRARY_PATH and PATH) are set
automatically, others must be added by the project.

For vulkan is is relativley simple, we create a new, uninstalled, icd
file for each driver and set the VK_ICD_FILENAMES variable
appropriately. This can be used with:

```sh
meson devenv -C $builddir
```

then, vulkan applications will automatically use the uninstall vulkan
driver, no need to install.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14826>
2022-02-04 09:08:47 -08:00
Emma Anholt
a177f0de8f ci: Uprev vulkan-cts to 1.2.8.0
This brings in some interesting new vulkan tests and fixes for the
spurious KHR-GL TF failures.  Also, reduces the runtime of
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36 so that it
should stop timing out.

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13779>
2022-02-03 22:41:23 +00:00
Emma Anholt
dbcdededb2 intel: Add missing dep of gen_*_header.py on utils.py.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14725>
2022-02-02 11:21:57 -08:00
Caio Oliveira
242c7a6513 anv: Add experimental support for VK_NV_mesh_shader
Enable setting ANV_EXPERIMENTAL_NV_MESH_SHADER=1 environment variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
d9416cd8bd intel/dev: Enable Mesh Shading for DG2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
da273b2b7b anv: Put first few push constants directly into Task/Mesh InlineData
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
27c32fd14b anv: include ClipDistance array in mesh shader per-vertex output
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
c95b4ac2eb anv: tell the hardware about gl_[Clip|Cull]Distance in mesh shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
bbde9f2448 anv: Implement indirect dispatch for Mesh pipeline
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
18e628135d anv: Add support for UBOs, SSBOs and push constants in Mesh pipeline
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
f12f5ae2f8 anv: Add support for non-zero firstTask in vkCmdDrawMeshTasksNV
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
97da3e0814 anv: Enable conditional rendering in vkCmdDrawMeshTasksNV
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
ef04caea9b anv: Implement Mesh Shading pipeline
The Mesh pipeline is implemented as a variant of the
regular (primitive) Graphics Pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
325ac235a7 anv: Add boilerplate for VK_NV_mesh_shader
Use minimum values for the properties.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
c93cbc77f7 intel/common: Add helper for URB allocation in Mesh pipeline
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Marcelo de Oliveira Filho
b01c73fd0a intel: Add INTEL_URB_DEREF_BLOCK_SIZE_MESH
And corresponding value in XML.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Lionel Landwerlin
665ffd4bf9 anv: Update VK_KHR_fragment_shading_rate for newer HW
Per primitive & attachment shading rate support added.

v2: Rebase on KHR_dynamic_rendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
fc837e9f8b anv/pass: rely on precomputed dynamic rendering pass/subpass more
For instance, the current code in genX_cmd_buffer.c assumes that the
depth/stencil attachments & resolves will be at the end of all
attachments, but that won't be the case anymore with fragment rate
shading.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
16763e8b8e anv: force primitive shading rate write in last geometry stage
v2: Use new helper to check if stage supports variable shading rate
    setting

v3: Update comment & iterate backward (Caio)
    Apply only to relevant platforms (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
0cd93c59ef intel/compiler: add primitive rate output support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
cebf284ac1 intel/compiler: add a new pass to lower shading rate into HW format
Rework:
 * Jason: Modernize brw_nir_lower_shading_rate_output:
   1. Use nir_shader_instructions_pass()
   2. Use *_imm builder helpers.
   3. Use nir_intrinsic_base() instead of ->const_index[0]

v2: Also lower loads (Caio)

v3: Update stage check to trigger lowering (Caio)

v4: Assert on != MESH (Caio)

v5: Fixup instruction insertion (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
3ab7f4471c isl: disable CPB surface compression
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
dff08cbf8e isl: add support for coarse pixel control surfaces
Those surfaces are used as attachment to rendering passes and describe
the rate of coarse pixel shading for the pass.

v2: Move CPB_BIT tile filtering to isl_gfx125_filter_tiling() (Nanley)

v3: Drop unused macro (Nanley)
    s/isl_to_gen/isl_encode/ (Nanley)
    Remove pitch alignment 128B constraint already covered by tiling (Nanley)
    Move some asserts together (Nanley)

v4: Disable miptail for now (Nanley)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
8d90fe587f intel/dev: details CPS feature support
DG2 introduces per primitive coarse pixel settings (in stages
preceding the PS shader) and also a control surface specifying the
rate at through the resulting surface.

v2: update comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
8bdbc93a9d genxml: add new 3DSTATE_PS_EXTRA bit
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
ea71fb0b4b genxml: gen12.5 changes for CPS
v2: Make genxml look more like BSpec (Caio)
    Fixup X_Focal/Y_Focal entries (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Nanley Chery
f724f95542 intel/isl: Add more PRM text for HiZ/STC requirement
Add text describing why HierarchicalDepthBufferEnable must be set along
with SeparateStencilBufferEnable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>
2022-02-02 16:25:10 +00:00
Nanley Chery
bc9ce9705c intel/isl: Fix depth buffer TiledSurface programming
The assert for the TiledSurface field caught a programming error, but
with a segfault instead of the usual route of assert-failing. We only
set this field when we have a depth surface, but we also need to set it
when one isn't provided. Fix this issue and drop the assert.

Fixes: b77d694223 ("intel/isl: Allow HiZ with Tile4/64 surfaces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5950
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>
2022-02-02 16:25:10 +00:00
Nanley Chery
146213d0ee intel/isl: Simplify Z-buffer tiling config during emit
For SNB and prior, assert that the surface is Y-tiled and use constants
when configuring the tiling parameters. This makes a follow-on commit
clearer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>
2022-02-02 16:25:10 +00:00
Iván Briano
965d58b058 anv: Report the right conformance version
Fixes: df8ac77af8 ("anv: Advertise Vulkan 1.3")

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14827>
2022-02-01 14:36:18 -08:00
Iván Briano
ea0fa5c6bc anv: Handle resolveImageLayout on dynamic rendering
Fixes: 5d9e8bc9be ("anv: implement the meat of VK_KHR_dynamic_rendering")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5942

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14812>
2022-02-01 19:51:23 +00:00
Caio Oliveira
8bab8f6422 compiler, intel: Add gl_shader_stage_is_mesh()
And replace the previous Intel-specific function.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14823>
2022-02-01 17:41:25 +00:00
Connor Abbott
913bec10c4 nir/lower_subgroups: Rename lower_shuffle to lower_relative_shuffle
This option only applies to relative shuffles (up/down/xor), and in a
moment we're going to add an option to lower normal shuffles, so rename
it.

While we're here, rename lower_shuffle() to lower_to_shuffle() for
similar reasons.

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14412>
2022-02-01 16:27:45 +00:00
Lionel Landwerlin
928156bc9d intel/tracepoint: simplify tracepoint descriptions
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14818>
2022-02-01 09:28:30 +00:00
Jason Ekstrand
d85a9d658f anv/image: Call into WSI to create swapchain images
This guarantees that we get an image that's created with exactly the
swapchain image creation parameters instead of trying to emulate it
inside the driver.  Ideally, we'd use the fancy new bind helper too but
our magic ANV_IMAGE_MEMORY_BINDING_PRIVATE gets in the way and we really
do want to re-bind ourself.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12031>
2022-01-31 19:46:55 +00:00
Jason Ekstrand
a2e986b6d9 anv/image: Add some asserts when binding swapchain images
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12031>
2022-01-31 19:46:55 +00:00
Jason Ekstrand
ca791f5c5d wsi/common: Set VK_IMAGE_CREATE_ALIAS_BIT
With Vulkan 1.1, we have a VkImageSwapchainCreateInfoKHR struct which
lets you create a new VkImage which aliases a swapchain image.  However,
there is no corresponding swapchain create flag so we have to set
VK_IMAGE_CREATE_ALIAS_BIT all the time.

We need to do a bit of work in ANV to prevent it from asserting the
moment it sees one of these.  Fortunately, they're already safe because
WSI images go through a different bind path for
VkBindImageMemorySwapchainInfoKHR.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12031>
2022-01-31 19:46:55 +00:00
Thomas H.P. Andersen
ac59a266cc anv: drop a set but unused variable
Fixes a warning with clang

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14790>
2022-01-31 16:10:31 +00:00
Thomas H.P. Andersen
bdfb1885b8 anv: drop a set but unused variable
Fixes a warning with clang

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14790>
2022-01-31 16:10:31 +00:00