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intel/isl: Fix depth buffer TiledSurface programming

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The assert for the TiledSurface field caught a programming error, but
with a segfault instead of the usual route of assert-failing. We only
set this field when we have a depth surface, but we also need to set it
when one isn't provided. Fix this issue and drop the assert.

Fixes: b77d694223 ("intel/isl: Allow HiZ with Tile4/64 surfaces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5950
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>
This commit is contained in:
Nanley Chery 2022-01-31 16:07:34 -05:00 • committed by Marge Bot
parent 146213d0ee
commit bc9ce9705c
1 changed files with 2 additions and 4 deletions
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6
src/intel/isl/isl_emit_depth_stencil.c
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@ -153,16 +153,14 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
if (separate_stencil || info->hiz_usage == ISL_AUX_USAGE_HIZ) {
assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
db.SeparateStencilBufferEnable = true;
db.HierarchicalDepthBufferEnable = true;
/* From the IronLake PRM, Vol 2 Part 1,
* 3DSTATE_DEPTH_BUFFER::Tiled Surface,
*
* When Hierarchical Depth Buffer is enabled, this bit must be set.
*
* HiZ only works on tiled depth buffers.
*/
assert(info->depth_surf->tiling != ISL_TILING_LINEAR);
db.HierarchicalDepthBufferEnable = true;
db.TiledSurface = true;
}
#endif