Commit graph

470 commits

Author SHA1 Message Date
Timur Kristóf
92ba76710d ac/gpu_info: Add can_chain_ib2 field to ac_gpu_info
GFX6 supports IB2, but not chaining inside IB2.
It only supports chaining in IB1.
See waCpIb2ChainingUnsupported in PAL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37280>
2025-10-07 15:49:01 +00:00
Vitaliy Triang3l Kuzmin
dea20be1b3 ac: Enable HTILE TC Z clear value bug workaround on GFX1013
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:50 +00:00
Vitaliy Triang3l Kuzmin
4e3a5f60e1 radv,ac: Split has_tc_compat_zrange_bug into Z and ZS, document it
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:49 +00:00
Vitaliy Triang3l Kuzmin
5243f292ef radv,ac: GFX10 depth/stencil HTILE mipmap bug info variable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:48 +00:00
Yonggang Luo
d83234c8f3 radv: Move the amdgpu.h defines for Win32 to ac_linux_drm.h
This is for fixes compiling with MINGW/GCC

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36598>
2025-08-07 07:47:42 +00:00
Samuel Pitoiset
1f490c836b ac/gpu_info,radv: use the maximum virtual address from the kernel
Instead of hardcoding it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36573>
2025-08-06 07:55:38 +02:00
Antonio Ospite
ddf2aa3a4d build: avoid redefining unreachable() which is standard in C23
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>

See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in

And this causes build errors when building for C23:

-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
                 from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
  123 | #define unreachable(str)    \
      |         ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
  456 | #define unreachable() (__builtin_unreachable ())
      |         ^~~~~~~~~~~
-----------------------------------------------------------------------

So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.

Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.

This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.

All the instances of the macro, including the definition, were updated
with the following command line:

  git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
  while read file; \
  do \
    sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
  done && \
  sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437>
2025-07-31 17:49:42 +00:00
Yogesh Mohan Marimuthu
0068dbd76b ac: enable kernelq reg shadowing only when userq is disabled
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:25 +00:00
Yogesh Mohan Marimuthu
1000ee3d2f ac,radeonsi,radv: rename register_shadowing_required
rename register_shadowing_required to has_kernelq_reg_shadowing

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35106>
2025-07-13 20:05:25 +00:00
Qiang Yu
d9df597042 ac,radv: move mesh_fast_launch_2 to ac
To be shared with radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
jesse.zhang
56d758d321 amd: Add user queue HQD count to hw_ip info
Add a new field userq_num_hqds to drm_amdgpu_info_hw_ip to expose the
number of available hardware queue descriptors (HQDs) for user queues.
This allows userspace to query the maximum number of user queues that
can be created for a particular IP block.

the patch link in driver side:
https://lists.freedesktop.org/archives/amd-gfx/2025-June/126686.html

v2: we should also put userq_num_hqds into radeon_info and
print it where other fields are printed. (Marek Olšák)

v3: rename num_userqs to num_queue_slots
    and add print log in ac_print_gpu_info. (Marek Olšák)
v4: rename userq_num_hqds to userq_num_slots in hw_ip_info,
    and update the hw information (Marek Olšák)

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35850>
2025-07-08 10:17:51 +00:00
Pierre-Eric Pelloux-Prayer
c1fdd540aa ac/info: add ac_drm_query_pci_bus_info
This allows to return dummy values for the vpipe case.

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34470>
2025-06-27 08:15:50 +00:00
Pierre-Eric Pelloux-Prayer
ddf73e76a9 ac/info: use u_sync_provider instead of DRM_CAP_SYNCOBJ(_TIMELINE)
So we get the correct results regardless of the backend (amdgpu,
virtio nctx, vpipe, null).

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34470>
2025-06-27 08:15:50 +00:00
Pierre-Eric Pelloux-Prayer
84c137ff14 amd/virtio: add vpipe support
When vpipe is used we won't have a valid fd available,
so make sure init doesn't fail.

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34470>
2025-06-27 08:15:50 +00:00
Pierre-Eric Pelloux-Prayer
ffdf13bd48 ac/info: rename has_local_buffers into has_vm_always_valid
The has_local_buffers name is based on the original name of this
feature (the GEM flag was AMDGPU_GEM_CREATE_LOCAL).

But in v3 the flag was renamed AMDGPU_GEM_CREATE_VM_ALWAYS_VALID,
so it's clearer to have the Mesa flag to match the kernel one.

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34470>
2025-06-27 08:15:49 +00:00
David Rosca
3b6f23a8e1 ac/gpu_info: Add vcn_fw_revision
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35543>
2025-06-17 16:28:59 +00:00
Peyton Lee
fd1930b035 amd: add vpe_version
vpe_version describes which generation of vpe capabilities a chip has.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35361>
2025-06-12 07:44:27 +00:00
Marek Olšák
c3034fa82c amd: replace most u_bit_consecutive* with BITFIELD_MASK/RANGE
Some checks are pending
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35346>
2025-06-04 17:46:38 +00:00
Yogesh Mohan Marimuthu
1af419deed ac: for userq do not set info->has_fw_based_shadowing
register shadow enabling for user queue is different code flow than
kernel queue. In case of kernel queue preamble ib is initialized which
is not requried for kernel queue.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34803>
2025-05-27 14:25:50 +00:00
Yogesh Mohan Marimuthu
137907945f ac: add AMD_USERQ env var to enable user queue
user queue is enabled only if AMD_USERQ env var is set and Kernel
supports user queue.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34803>
2025-05-27 14:25:50 +00:00
Yogesh Mohan Marimuthu
97c48c5aa7 ac: fix getting mcbp info for userq
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34803>
2025-05-27 14:25:50 +00:00
Samuel Pitoiset
235f70e475 ac/gpu_info: add has_cp_dma_with_null_prt_bug
CP DMA is broken on GFX8-9 with NULL PRT pages. The workaround is to
use compute instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35071>
2025-05-21 09:41:23 +00:00
Samuel Pitoiset
e345b03c89 ac/gpu_info: rename has_zerovram_support to has_default_zerovram_support
To avoid confusion between RADEON_FLAG_ZERO_VRAM and default VRAM
allocation clears since AMDGPU 3.59+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35021>
2025-05-20 12:43:59 +00:00
Samuel Pitoiset
b79f1a3af3 ac/gpu_info: allow 32-bit predicate on GFX11+
This is natively supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34953>
2025-05-15 05:51:04 +00:00
Samuel Pitoiset
4b16de5e0d ac/gpu_info: add has_zerovram_support
AMDGPU 3.59.0+ clears VRAM on allocations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34896>
2025-05-12 06:53:55 +00:00
Konstantin Seurer
84b9c281fe radv: Return VK_ERROR_INCOMPATIBLE_DRIVER for unsupported devices
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VK_ERROR_INITIALIZATION_FAILED will fail physical device enumeration.
Returning VK_ERROR_INCOMPATIBLE_DRIVER means that the driver can still
be used on supported GPUs when multiple GPUs are installed.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34783>
2025-05-07 08:26:33 +02:00
Marek Olšák
5e487dbc49 amd: stop using CLEAR_STATE on gfx11
It's not allowed with user queues, so this will make it simpler to support
user queues.

There are 2 groups of registers:
- those that are never set by radv and radeonsi - those are now set
  in the shared preamble
- those that are set by radv but not radeonsi - those are now set
  in the radeonsi preamble

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34589>
2025-05-02 18:40:11 +00:00
Marek Olšák
2948f7ce96 ac/gpu_info: rename tess ring variables, fold double_offchip_wg
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
6d9e708642 ac/gpu_info: reduce the tess offchip ring size and compute it proportionately
.. to the CU count. We allocated too much.

This reduces the tess offchip ring size as follows (examples):
- GFX11-12:
  - Navi31, Navi33, and Navi48 get 75% decrease.
  - Navi32 gets 68.75% decrease.
  - Phoenix gets 81.25% decrease.
  - Phoenix2 gets 93.75% decrease.
- GFX10.3:
  - Navi21 and Navi22 get 37.5% decrease.
  - Navi23 and Navi24 get 50% decrease.
  - Rembrandt gets 62.5% decrease.
  - VanGogh gets 75% decrease.
  - Raphael gets 93.75% decrease.
- GFX8-9:
  - Vega10 gets 0% decrease.
  - Vega20 gets 49.6% decrease.
  - Raven gets 65.3% decrease.
  - Raven2 gets 93.7% decrease.
  - Stoney gets 81% decrease.

No difference in performance was measured.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
9333c0a1ed ac/gpu_info: compute the tess factor ring size proportionately to the CU count
No change in the size on GPUs with 16 CUs per SE such as Navi31 and Navi48.
Navi21 and Navi32 get 25% increase. (20 CUs per SE)

APUs get a significant decrease. For example:
- Phoenix gets 25% decrease
- Vangogh gets 50% decrease
- Phoenix2 gets 75% decrease
- Raphael and Stoney get 87.5% decrease

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
b8f2fb81f6 ac/gpu_info: print tessellation ring info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
a905a17f39 ac: use HS offchip wg size from radeon_info in ac_compute_num_tess_patches
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
d82eda72a1 ac/gpu_info: move HS info into radeon_info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
ea294349bd radv: move the tess factor ring after the tess offchip ring
to match radeonsi

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:54:59 -04:00
Marek Olšák
c057d9105f ac/gpu_info: add total_tess_ring_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:54:59 -04:00
Marek Olšák
97119d980c ac/gpu_info: clean up ac_get_hs_info, use standard terms like workgroup
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:54:59 -04:00
Yogesh Mohan Marimuthu
e63b24bee8 ac,radeonsi: clear_state is not supported in user queue
Some checks are pending
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
2025-04-18 07:45:33 +00:00
Yogesh Mohan Marimuthu
61fd80a42e ac,winsys/amdgpu: get userq_ip_mask supported from kernel info ioctl
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
2025-04-18 07:45:33 +00:00
Konstantin Seurer
fe739a2da2 ac: Add rt_version
rt_version describes which generation of RT capabilities a chip has.
This matches what PAL does.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Samuel Pitoiset
d94f8b4460 ac/gpu_info,radv: add scratch_wavesize_granularity info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34549>
2025-04-17 10:35:40 +00:00
Marek Olšák
963147d7fd ac/gpu_info: add 256 to payload_entry_size to increase future task shader perf
It has no effect because num_entries is 1K, but the table shows a lot of
potential.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
2025-04-16 06:08:48 +00:00
Marek Olšák
d7c903f258 ac/gpu_info: add payload_entry_size into ac_task_info
to stop causing full RADV recompiles when it's changed.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
2025-04-16 06:08:48 +00:00
Marek Olšák
0dafd04695 ac/gpu_info: remove has_tmz_support function
It's not needed since:
    8b3056343f - ac/gpu_info: bump required DRM minor version to 3.42.0 (kernel 5.15+)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
2025-04-16 06:08:48 +00:00
Marek Olšák
0be5a3559a ac/gpu_info: increase the attribute ring size for gfx12
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
2025-04-16 06:08:48 +00:00
Samuel Pitoiset
8b3056343f ac/gpu_info: bump required DRM minor version to 3.42.0 (kernel 5.15+)
Linux 5.15+ (LTS) has been released in October 31 and it's supported
until December 2026. Linux 4.x are very old at this point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34375>
2025-04-07 06:44:23 +00:00
Samuel Pitoiset
042770ceea ac,radv: remove has_scheduled_fence_dependency
This isn't used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34375>
2025-04-07 06:44:22 +00:00
Samuel Pitoiset
0bc9d59c2e ac,radv: add a workaround for a hw bug with primitive restart on GFX10-GFX10.3
At least, NAVI10, NAVI21 and NAVI24 are affected by this what looks
like a hardware bug when primitive restart is changed and no context
registers are written between draws. It seems the hardware doesn't
consider primitive restart at all in this situation.

Adding SQ_NON_EVENT(0) as suggested by Marek seems to fix it reliably
without introducing any overhead. It's basically a NOP packet that adds
a small delay.

Fixes new VKCTS coverage dEQP-VK.transform_feedback.primitive_restart.*.
Also fixes this old vkd3d-proton issue.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7258
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33929>
2025-03-10 08:44:31 +00:00
Marek Olšák
96722aeda3 ac/gpu_info: use max_good_cu_per_sa for computation of max_scratch_waves
every CU should be able to use scratch

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:46 +00:00
Ivan Avdeev
7271b8ee49 radv,radeonsi: disable compute queue for BC250
BC250 is known to have non-functional compute queue. Thousands
for Vulkan CTS tests fail, and many games are known to have visual
glitches. RADV_DEBUG=nocompute is the known workaround for all these
issues.

Disable compute queue for this chip in both radv and radeonsi.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33116>
2025-03-04 08:07:31 +00:00
Ivan Avdeev
ff6504d4c0 radv: add experimental support for AMD BC-250 board
AMD BC-250 is a mining board based on an AMD APU with an integrated GPU
that kernel recognizes as Cyan Skillfish.

It is basically RDNA1/GFX10, but with added hardware ray tracing
support. LLVM calls it GFX1013, see
https://llvm.org/docs/AMDGPU/AMDGPUAsmGFX1013.html

Support for this GPU hasn't been extensively tested. Some games are
known to work, some non-trivial ray query compute and ray tracing
pipeline rendering works too. Q2RTX works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33116>
2025-03-04 08:07:31 +00:00