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ac: use HS offchip wg size from radeon_info in ac_compute_num_tess_patches

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
This commit is contained in:
Marek Olšák 2025-04-14 20:11:38 -04:00
parent d82eda72a1
commit a905a17f39
3 changed files with 4 additions and 5 deletions
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1
src/amd/common/ac_gpu_info.c
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@ -1792,6 +1792,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
S_0089B0_OFFCHIP_GRANULARITY(wg_size_enum);
}
info->hs_offchip_workgroup_dw_size = wg_size_in_dwords;
info->tess_offchip_ring_size = num_workgroups * wg_size_in_dwords * 4;
info->tess_factor_ring_size = 48 * 1024 * info->max_se;
info->total_tess_ring_size = info->tess_offchip_ring_size + info->tess_factor_ring_size;

1
src/amd/common/ac_gpu_info.h
View file

@ -295,6 +295,7 @@ struct radeon_info {
/* Tessellation rings. */
uint32_t hs_offchip_param;
uint32_t hs_offchip_workgroup_dw_size;
uint32_t tess_factor_ring_size;
uint32_t tess_offchip_ring_size;
uint32_t total_tess_ring_size;

7
src/amd/common/ac_shader_util.c
View file

@ -966,11 +966,8 @@ uint32_t ac_compute_num_tess_patches(const struct radeon_info *info, uint32_t nu
num_patches = MIN2(num_patches, 16); /* recommended */
/* Make sure the output data fits in the offchip buffer */
if (vram_per_patch) {
const uint32_t tess_offchip_block_dw_size = info->family == CHIP_HAWAII ? 4096 : 8192;
num_patches =
MIN2(num_patches, (tess_offchip_block_dw_size * 4) / vram_per_patch);
}
if (vram_per_patch)
num_patches = MIN2(num_patches, (info->hs_offchip_workgroup_dw_size * 4) / vram_per_patch);
/* Make sure that the data fits in LDS. This assumes the shaders only
* use LDS for the inputs and outputs.