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radv: add experimental support for AMD BC-250 board

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AMD BC-250 is a mining board based on an AMD APU with an integrated GPU
that kernel recognizes as Cyan Skillfish.

It is basically RDNA1/GFX10, but with added hardware ray tracing
support. LLVM calls it GFX1013, see
https://llvm.org/docs/AMDGPU/AMDGPUAsmGFX1013.html

Support for this GPU hasn't been extensively tested. Some games are
known to work, some non-trivial ray query compute and ray tracing
pipeline rendering works too. Q2RTX works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33116>
This commit is contained in:
Ivan Avdeev 2024-12-29 22:12:13 -05:00 • committed by Marge Bot
parent 72fe9e3fa3
commit ff6504d4c0
8 changed files with 19 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/amd/addrlib/src/amdgpu_asic_addr.h
View file

@ -90,6 +90,7 @@
#define AMDGPU_NAVI10_RANGE 0x01, 0x0A //# 1 <= x < 10
#define AMDGPU_NAVI12_RANGE 0x0A, 0x14 //# 10 <= x < 20
#define AMDGPU_NAVI14_RANGE 0x14, 0x28 //# 20 <= x < 40
#define AMDGPU_GFX1013_RANGE 0x84, 0x85 //# 132 <= x < 133
#define AMDGPU_NAVI21_RANGE 0x28, 0x32 //# 40 <= x < 50
#define AMDGPU_NAVI22_RANGE 0x32, 0x3C //# 50 <= x < 60
#define AMDGPU_NAVI23_RANGE 0x3C, 0x46 //# 60 <= x < 70

10
src/amd/common/ac_gpu_info.c
View file

@ -804,6 +804,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
identify_chip(NAVI10);
identify_chip(NAVI12);
identify_chip(NAVI14);
identify_chip(GFX1013);
identify_chip(NAVI21);
identify_chip(NAVI22);
identify_chip(NAVI23);
@ -1208,7 +1209,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
*/
info->has_accelerated_dot_product =
info->family == CHIP_VEGA20 ||
(info->family >= CHIP_MI100 && info->family != CHIP_NAVI10);
(info->family >= CHIP_MI100 && info->family != CHIP_NAVI10 && info->family != CHIP_GFX1013);
/* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
info->has_load_ctx_reg_pkt =
@ -1339,7 +1340,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->sdma_supports_sparse = info->sdma_ip_version >= SDMA_4_0;
/* SDMA v5.0+ (GFX10+) supports DCC and HTILE, but Navi 10 has issues with it according to PAL. */
info->sdma_supports_compression = info->sdma_ip_version >= SDMA_5_0 && info->family != CHIP_NAVI10;
info->sdma_supports_compression = info->sdma_ip_version >= SDMA_5_0 && info->family != CHIP_NAVI10 && info->family != CHIP_GFX1013;
/* Get the number of good compute units. */
info->num_cu = 0;
@ -1476,6 +1477,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
case CHIP_RENOIR:
case CHIP_NAVI10:
case CHIP_NAVI12:
case CHIP_GFX1013:
case CHIP_NAVI21:
case CHIP_NAVI22:
case CHIP_NAVI23:
@ -1725,7 +1727,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->has_set_sh_pairs_packed = info->register_shadowing_required;
}
info->has_image_bvh_intersect_ray = info->gfx_level >= GFX10_3;
/* GFX1013 is GFX10 plus ray tracing instructions */
info->has_image_bvh_intersect_ray = info->gfx_level >= GFX10_3 ||
info->family == CHIP_GFX1013;
set_custom_cu_en_mask(info);

2
src/amd/common/ac_surface.c
View file

@ -1771,7 +1771,7 @@ ASSERTED static bool is_dcc_supported_by_L2(const struct radeon_info *info,
return single_indep && valid_64b;
}
if (info->family == CHIP_NAVI10) {
if (info->family == CHIP_NAVI10 || info->family == CHIP_GFX1013) {
/* Only independent 128B blocks are supported. */
return single_indep && valid_128b;
}

3
src/amd/common/amd_family.c
View file

@ -43,6 +43,7 @@ const char *ac_get_family_name(enum radeon_family family)
CASE(NAVI10);
CASE(NAVI12);
CASE(NAVI14);
CASE(GFX1013);
CASE(NAVI21);
CASE(NAVI22);
CASE(NAVI23);
@ -149,6 +150,8 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
return "gfx1011";
case CHIP_NAVI14:
return "gfx1012";
case CHIP_GFX1013:
return "gfx1013";
case CHIP_NAVI21:
return "gfx1030";
case CHIP_NAVI22:

1
src/amd/common/amd_family.h
View file

@ -107,6 +107,7 @@ enum radeon_family
CHIP_NAVI10, /* Radeon 5600, 5700 */
CHIP_NAVI12, /* Radeon Pro 5600M */
CHIP_NAVI14, /* Radeon 5300, 5500 */
CHIP_GFX1013, /* AMD BC-250 */
/* GFX10.3 (RDNA 2) */
CHIP_NAVI21, /* Radeon 6800, 6900 (formerly "Sienna Cichlid") */
CHIP_NAVI22, /* Radeon 6700 (formerly "Navy Flounder") */

2
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -5910,7 +5910,7 @@ visit_bvh64_intersect_ray_amd(isel_context* ctx, nir_intrinsic_instr* instr)
node, tmax, origin, dir, inv_dir,
};
if (bld.program->gfx_level == GFX10_3) {
if (bld.program->gfx_level == GFX10_3 || bld.program->family == CHIP_GFX1013) {
std::vector<Temp> scalar_args;
for (Temp tmp : args) {
for (unsigned i = 0; i < tmp.size(); i++)

1
src/amd/compiler/aco_print_asm.cpp
View file

@ -130,6 +130,7 @@ to_clrx_device_name(amd_gfx_level gfx_level, radeon_family family)
switch (family) {
case CHIP_NAVI10: return "gfx1010";
case CHIP_NAVI12: return "gfx1011";
case CHIP_GFX1013: return "gfx1013";
default: return nullptr;
}
default: return nullptr;

6
src/amd/vulkan/winsys/null/radv_null_winsys.c
View file

@ -142,9 +142,11 @@ radv_null_winsys_query_info(struct radeon_winsys *rws, struct radeon_info *gpu_i
gpu_info->has_image_load_dcc_bug = gpu_info->family == CHIP_NAVI23 || gpu_info->family == CHIP_VANGOGH;
gpu_info->has_accelerated_dot_product =
gpu_info->family == CHIP_VEGA20 || (gpu_info->family >= CHIP_MI100 && gpu_info->family != CHIP_NAVI10);
gpu_info->family == CHIP_VEGA20 ||
(gpu_info->family >= CHIP_MI100 && gpu_info->family != CHIP_NAVI10 && gpu_info->family != CHIP_GFX1013);
gpu_info->has_image_bvh_intersect_ray = gpu_info->gfx_level >= GFX10_3;
gpu_info->has_image_bvh_intersect_ray = gpu_info->gfx_level >= GFX10_3 ||
gpu_info->family == CHIP_GFX1013;
gpu_info->address32_hi = gpu_info->gfx_level >= GFX9 ? 0xffff8000u : 0x0;