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Author SHA1 Message Date
Aleksi Sapon
c200b18e87 llvmpipe: use half-even rounding in lerp 
This fixes a biases in texture linear sampling,
which can be very noticeable when strong lighting
is applied on mipmapped textures generated at
runtime using successive linear blitting.

More bits aren't actually needed for lerp and the
intrinsic rounding is wrong, so it is removed in
favour of a correct uniform codegen.

Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com>
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37986>
 2025-12-05 15:45:53 +00:00
Aleksi Sapon
34b34c2462 llvmpipe: use half-even rounding in norm and fixed mul 
The accumulation of biased results leads to images
that are slighly too bright or dark. This is particularly
noticeable in specular highlights, which magnify errors
a lot.

Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com>
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37986>
 2025-12-05 15:45:53 +00:00
Aleksi Sapon
4f3de8b956 llvmpipe: doc fixes 
Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com>
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37986>
 2025-12-05 15:45:53 +00:00
Aitor Camacho
0104b3df41 kk: Expose shader storage image read/write without format
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Features:
- shaderStorageImageReadWithoutFormat
- shaderStorageImageWriteWithoutFormat

Acked-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38791>
 2025-12-05 09:06:18 +00:00
Eric R. Smith
3ce6bcb9e8 panfrost: do not allow skipping of fragment shader when alpha-to-coverage
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When alpha to coverage is enabled we cannot allow the fragment shader to
be skipped, because the calculated alpha result is essentially a side
effect (it can cause some samples to be discarded).

This brings the OpenGL driver in line with panvk, which already has this
check in its version of fs_required().

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38794>
 2025-12-05 07:55:21 +00:00
Marek Olšák
53014c0c1a winsys/amdgpu: protect driver stats changes by a mutex
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64-bit reads are atomic (except 32-bit arch), but + and - require locking
or atomics, but 32-bit arch doesn't support 64-bit atomics.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38798>
 2025-12-05 03:35:37 +00:00
Marek Olšák
0724428d55 winsys/amdgpu: retry the CS ioctl on -ENOMEM only if GDS OA is used 
It's not needed otherwise.

The loop was also duplicated. This removes the second one.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38798>
 2025-12-05 03:35:36 +00:00
Tomoki Imai
f56e70f230 lavapipe: Support VkDrmFormatModifierPropertiesList2EXT
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This change add support VkDrmFormatModifierPropertiesList2EXT to
lavapipe driver. Previously VkDrmFormatModifierPropertiesListExt is
already supported and returns a list with one element but
VkDrmFormatModifierPropertiesList2EXT returns a empty list.

A lack of VkDrmFormatModifierPropertiesList2EXT becomes an issue
especially when the Vulkan Validation layers is enabled, it internally
uses VkDrmFormatModifierPropertiesList2EXT to confirm the
drmFormatModifierTilingFeatures is compatible to VkImageUsageFlagBits.
Without this patch it detects that the image is not compatible and
outputs warnings.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14414
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38822>
 2025-12-05 01:45:56 +00:00
Job Noorman
0574bfd5f4 tu: add UBO lowering workaround for Yooka-Laylee 
A vertex shader performs OOB UBO reads causing vertex corruption.
Disable UBO to const lowering to force bounds checking which fixes the
corruption.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38781>
 2025-12-05 00:19:46 +00:00
Emma Anholt
66b157095c nir/shader_bisect: Allow passing in a --lo / --hi to continue a run.
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Sometimes you fumble an answer, and would like to not restart from the
beginning (or just want to see the behavior of the script late in the run
if you're debugging it).  Pass in the last bad range, and you can keep
going.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38760>
 2025-12-04 22:47:25 +00:00
Emma Anholt
4287bb761e nir/shader_bisect: Fix C code printing after review feedback changes. 
When I added in the printed-shader and env var value both being tracked in
shaders[], it broke the C printing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38760>
 2025-12-04 22:47:25 +00:00
Emma Anholt
fd6489c026 tu: Drop emitting of deprecated packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:12 +00:00
Emma Anholt
ab6b2e4663 freedreno/registers: Restore reg definitions required by kernel. 
Fixes missing bitset defines, introduced by bfdccc7563
("freedreno/registers: Mark functions as constexpr where possible").

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:12 +00:00
Emma Anholt
a001867e45 freedreno/registers: Simplify a bit of reg printing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:11 +00:00
Emma Anholt
b69f53816c freedreno/registers: Apply autopep8 to gen_header.py. 
Nonstandard indentation was making my editor furious.  No changes needed
to be brought over from kernel 6.18 before I did.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:11 +00:00
Emma Anholt
09e758bcd0 tu: Convert remaining tu_cs_emit_pkt4()s to avoid deprecated reg definitions. 
We can just pack a dummy value and pull the reg out of it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:10 +00:00
Emma Anholt
54652a4c39 tu: Use non-deprecated reg packing for RB_CLEAR_TARGET(). 
It only has the one variant, so no need to template the function yet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:10 +00:00
Emma Anholt
c8abe7f3db tu: Pass around the new packing struct for GRAS_LRZ_CNTL. 
This way we can use non-deprecated reg packing, and get the proper 8xx
register offset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:10 +00:00
Emma Anholt
a3740003c2 tu: Use appropriate variant for HLSQ regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:10 +00:00
Emma Anholt
7e027d5672 tu: Use proper reg packing in another place. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:10 +00:00
Emma Anholt
dae582ecc1 tu: Use appropriate variants for SP regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:09 +00:00
Emma Anholt
298237b362 tu: Use appropriate variants for other GRAS regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:09 +00:00
Emma Anholt
69cf144144 tu: use non-deprecated packing for GRAS_CL_ARRAY_SIZE. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:08 +00:00
Emma Anholt
c5bb86c8df tu: Use non-deprecated packing for SP_DITHER_CNTL. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:07 +00:00
Emma Anholt
08e17ff222 tu: Use a register pack for VPC_VARYING_LM_TRANSFER_CNTL_DISABLE[]. 
Prep for dropping deprecated pack support.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:07 +00:00
Emma Anholt
6d8f08a678 tu: Use appropriate variants for GRAS_SU regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:07 +00:00
Emma Anholt
7eb24634c3 tu: Only emit GRAS_SU_RENDER_CNTL and SP_RENDER_CNTL on >=a7xx. 
These leaked into a6xx in c166c5100b ("tu/a750: Basic a750 support"),
and were caught by moving to the modern reg packing.  Emits the right GRAS
register for 8xx now, too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:06 +00:00
Emma Anholt
4aec44ea91 tu: Use appropriate chip variants for RB regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:06 +00:00
Emma Anholt
247a0389d6 tu: Use appropriate chip variants for A2D reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:05 +00:00
Emma Anholt
5d4598199e tu: Use appropriate chip variants for CONSERVATIVE_RAS_CNTL. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:05 +00:00
Emma Anholt
907dfeb732 tu: Use appropriate chip variants in PS setup. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:04 +00:00
Emma Anholt
b38bd7f868 tu: Use appopriate chip variants in SC scissor/viewport reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:04 +00:00
Emma Anholt
249680b508 tu: Use appropriate chip variants for SP_CS reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:03 +00:00
Emma Anholt
002fc56a0c tu: Use appropriate chip variants for VPC/PC reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:03 +00:00
Emma Anholt
8ed98f7429 tu: Use appropriate chip variants for SC_BIN_CNTL reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:02 +00:00
Emma Anholt
d335232fe5 tu: Use appropriate chip variants for VRS reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:01 +00:00
Emma Anholt
08782fbdc3 tu: Use appropriate chip variants for LRZ reg packing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:01 +00:00
Emma Anholt
1f016974fa tu: Use appropriate chip variants for FOVEAT regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:00 +00:00
Emma Anholt
5a6bfc1614 tu: Use non-deprecated names for scratch regs. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:18:00 +00:00
Emma Anholt
f12a9b91c9 tu: Explicitly use 6XX scratch reg packing in perfcntrs_pass_cs_entries. 
It looks like this will change in 8xx, but for now this gets us off of
deprecated reg packing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:58 +00:00
Emma Anholt
454c665552 tu: Move tu6_emit_gs() to use reg packing. 
Gets us the right regs on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:58 +00:00
Emma Anholt
56e63dc5ed tu: Move VPC_SO_FLUSH_BASE to use reg packing. 
Gets us the right reg on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:58 +00:00
Emma Anholt
4bc21cd77d tu: Convert tu_init_cmdbuf_start_a725_quirk() to non-deprecated packing. 
We can just pass 7xx as the CHIP, rather than templating.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:58 +00:00
Emma Anholt
a7ffdd31c5 tu: Template tu_pipeline_builder_parse_rasterization_order() by CHIP. 
This gets us the right reg on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:57 +00:00
Emma Anholt
fbcc32e990 tu: Template tu6_emit_vpc_varying_modes() by CHIP. 
This gets us the right regs on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:57 +00:00
Emma Anholt
436f6059b4 tu: Template tu7_emit_subpass_shading_rate by CHIP. 
This gets us the right regs on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:56 +00:00
Emma Anholt
99f31785a2 tu: Template tu6_emit_msaa() by CHIP. 
This gets us the right regs on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:56 +00:00
Emma Anholt
22a8475151 tu: Template update_vsc_pipe by CHIP. 
This lets us use non-deprecated reg packing, and fixes incorrect emitting
of 0D08 on 6xx that was introduced in 0cf27a7236 ("tu: Clear
`VSC_UNKNOWN_0D08` on A7XX")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:55 +00:00
Emma Anholt
17e47f4dff tu: Template fdm_apply_store_coords() by CHIP. 
Gets the right regs on 8xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:55 +00:00
Emma Anholt
339c3c7970 tu: Use non-deprecated reg packing in tu6_setup_streamout()'s CRBs. 
This gets us the right registers on a8xx.  We can clean this up later with
the CRB builder.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
 2025-12-04 22:17:54 +00:00