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tu: Use appropriate chip variants for RB regs.

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
This commit is contained in:
Emma Anholt 2025-12-02 15:03:42 -08:00 • committed by Marge Bot
parent 247a0389d6
commit 4aec44ea91
2 changed files with 10 additions and 12 deletions
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10
src/freedreno/vulkan/tu_cmd_buffer.cc
View file

@ -560,7 +560,7 @@ emit_rb_ccu_cntl(struct tu_cs *cs, struct tu_device *dev, bool gmem)
(a6xx_ccu_cache_size)(dev->physical_device->info->props.gmem_ccu_color_cache_fraction);
if (CHIP == A7XX) {
tu_cs_emit_regs(cs, A7XX_RB_CCU_CACHE_CNTL(
tu_cs_emit_regs(cs, RB_CCU_CACHE_CNTL(CHIP,
.depth_offset_hi = depth_offset_hi,
.color_offset_hi = color_offset_hi,
.depth_cache_size = CCU_CACHE_SIZE_FULL,
@ -855,9 +855,7 @@ tu6_emit_bin_size(struct tu_cs *cs,
.lrz_feedback_zmode_mask = p.lrz_feedback_zmode_mask, ));
/* no flag for RB_RESOLVE_CNTL_3... */
tu_cs_emit_regs(cs,
A6XX_RB_RESOLVE_CNTL_3(.binw = bin_w,
.binh = bin_h));
tu_cs_emit_regs(cs, RB_RESOLVE_CNTL_3(CHIP, .binw = bin_w, .binh = bin_h));
}
template <chip CHIP>
@ -2055,7 +2053,7 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs)
tu_cs_emit_write_reg(cs, REG_A6XX_RB_RBP_CNTL,
phys_dev->info->magic.RB_RBP_CNTL);
if (CHIP >= A7XX) {
tu_cs_emit_regs(cs, A7XX_RB_UNKNOWN_8E09(0x7));
tu_cs_emit_regs(cs, RB_UNKNOWN_8E09(CHIP, 0x7));
tu_cond_exec_end(cs);
}
@ -2992,7 +2990,7 @@ tu6_sysmem_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
.rt7_sysmem = true,
));
tu_cs_emit_regs(cs, A7XX_RB_CLEAR_TARGET(.clear_mode = CLEAR_MODE_SYSMEM));
tu_cs_emit_regs(cs, RB_CLEAR_TARGET(CHIP, .clear_mode = CLEAR_MODE_SYSMEM));
}
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);

12
src/freedreno/vulkan/tu_pipeline.cc
View file

@ -2566,8 +2566,8 @@ tu6_emit_viewport(struct tu_cs *cs,
}
tu_cs_emit_regs(cs,
A6XX_RB_VIEWPORT_ZCLAMP_MIN(z_clamp_min),
A6XX_RB_VIEWPORT_ZCLAMP_MAX(z_clamp_max));
RB_VIEWPORT_ZCLAMP_MIN(CHIP, z_clamp_min),
RB_VIEWPORT_ZCLAMP_MAX(CHIP, z_clamp_max));
}
struct apply_viewport_state {
@ -3394,10 +3394,10 @@ tu6_emit_rast(struct tu_cs *cs,
A6XX_GRAS_SU_POINT_SIZE(1.0f));
if (CHIP == A6XX && cs->device->physical_device->info->props.has_legacy_pipeline_shading_rate) {
tu_cs_emit_regs(cs, A6XX_RB_UNKNOWN_8A00());
tu_cs_emit_regs(cs, A6XX_RB_UNKNOWN_8A10());
tu_cs_emit_regs(cs, A6XX_RB_UNKNOWN_8A20());
tu_cs_emit_regs(cs, A6XX_RB_UNKNOWN_8A30());
tu_cs_emit_regs(cs, RB_UNKNOWN_8A00(CHIP));
tu_cs_emit_regs(cs, RB_UNKNOWN_8A10(CHIP));
tu_cs_emit_regs(cs, RB_UNKNOWN_8A20(CHIP));
tu_cs_emit_regs(cs, RB_UNKNOWN_8A30(CHIP));
}
}