Commit graph

76268 commits

Author SHA1 Message Date
Brian Paul
ae70d0d68c docs: Visual Studio 2013 or later is now required 2016-02-12 15:08:35 -07:00
Timothy Arceri
4e59362d1b glsl: replace _strtoui64() with strtoull() for MSVC
Now that MSVC 2013 is required we can remove this.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-13 08:57:01 +11:00
Jose Fonseca
950da38164 mesa: Use _aligned_malloc/free for MinGW too.
We already use these for gallium in
src/gallium/auxiliary/os/os_memory_stdc.h and it's always better to
minimize divergences between MinGW and MSVC.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-12 14:51:28 +00:00
Jose Fonseca
c69ef377c8 mesa: Remove support for MSVC2008.
Spotted by Emil Velikov.

Trivial.
2016-02-12 10:31:15 +00:00
Jose Fonseca
5bc8d34526 util/u_atomic: Remove MSVC 2008 support.
Spotted by Emil Velikov.

Trivial.
2016-02-12 10:31:15 +00:00
Topi Pohjolainen
30711d984f i965: Stop considering if msrt aux buffers need aux buffer
Auxiliary buffers are always created with sample number of zero
which effectively prevents intel_miptree_create_layout() from trying
to associate auxiliary buffers with auxiliary buffers.

Now that there is more direct path available lets start using it
instead and stop even checking for such (im)possibility.

v2 (Ben): Do not signal msaa layout with explicit argument but
          using layout_flags instead.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-02-12 09:17:29 +02:00
Topi Pohjolainen
422b1386d7 i965: Separate miptree creation from auxiliary buffer setup
Currently the logic allocating and setting up miptrees is closely
combined with decision making when to re-allocate buffers in
X-tiled layout and when to associate colors with auxiliary buffers.

These auxiliary buffers are in turn also represented as miptrees
and are created by the same miptree creation logic calling itself
recursively. This means considering in vain if the auxiliary buffers
should be represented in X-tiled layout or if they should be
associated with auxiliary buffers again.
While this is somewhat unnecessary, this doesn't impose any problems
currently. Miptrees for auxiliary buffers are created as simgle-sampled
fusing the consideration for multi-sampled compression auxiliary
buffers. The format in turn is such that is not applicable for
single-sampled fast clears (that would require accompaning auxiliary
buffer).
But once the driver starts to support lossless compression of color
buffers the auxiliary buffer will have a format that would itself
be applicable for lossless compression. This would be rather
difficult and ugly to detect in the current miptree creation logic,
and therefore this patch seeks to separate the association logic
from the general allocation and setup steps.

v2 (Ben):
   - Do not reconsider for X-tiling in intel_miptree_create()
     as it was just forced to Y-tiling in miptree_create().
   - Do not drop checks for allocation failures.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-02-12 09:13:07 +02:00
Topi Pohjolainen
d089f2d932 i965: Isolate aligned dimensions for stencil only
This makes the logic a little more explicit and helps to keep
subsequent patches easier to read.

Suggested-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-02-12 09:13:07 +02:00
Topi Pohjolainen
0dcd9a09d1 i965: Restore vbo after color resolve during brw_try_draw_prims()
Part of brw_try_draw_prims() is a check to validate textures
(brw_validate_textures()). In case of textures that currently have
only level zero but are marked for mipmap generation, i965 driver
will decide to replace the underlying buffer with a larger one
capable of holding also the additional levels. This results into
blit from the original buffer to the newly allocated (see
intel_miptree_copy_teximage()). This blit is currently handled with
blitter engine and hence it won't effect the ongoing draw operation.
However, this blit in turn may trigger color resolve on the source
buffer. In principle, this should be possible with fast cleared
buffers but I only started hitting it when I enabled lossless
compression (that reguires similar resolve to fast cleared buffers).

Now, the color resolve is a meta operation and uses the same drawing
path we are already in middle of. After quite a bit of debugging I
realized that the resolve will modify the current vbo setup but it
won't restore it afterwards resulting in the original draw call
using wrong vertex data.
When brw_try_draw_prims() gets called, the vbo logic in the Mesa
core (see vbo_draw_arrays()) has just bound the vbo (see
vbo_bind_arrays() and recalculate_input_bindings()). Color resolve
operation will overwrite the vbo setup by calling vbo_bind_arrays()
against the resolve rectangle (see brw_draw_rectlist()). Once the
color resolve is done the vbo setup is left to the resolve rectangle
state and the original drawing call yields bogus results.

This patch aims to restore the original state after the color
resolve by calling vbo_bind_arrays() yet again after the vertex
array state in the core context have been restored.

Now having said all this, I'd also like to state that I'm quite
uncomfortable with the nested meta operations. Ths original draw
call in this case is in fact a meta operation itself. It is a blit
from level zero to level one when generating the additional mipmap
levels (see _mesa_meta_GenerateMipmap()). Imagine the complexity
if the blit in the middle from buffer to another would go to meta
path also instead of blitter.

I would very tempted to try to move all the resolves to happen
before a meta operation is started.
Additionally I still feel that work I did earlier in the spring/
summer time moving meta operations to use direct state upload
bypassing the core context would make sense.

v2: Force input recalculation by setting the flag explicitly

v3: Do not attempt to restore vbo for opengles1 which doesn't
    support vertex buffer objects.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-02-12 09:13:07 +02:00
Topi Pohjolainen
779429d063 i965: Validate textures before altering driver state
Validation may kick off copies and subsequently color resolves.
Color resolves (and the copies themselves if ending up in meta path)
will overwrite the internal driver state but are not prepared to
restore it. Instead of adding that capability the validation can be
simply performed before the state is updated.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-02-12 09:13:07 +02:00
Kenneth Graunke
76f6f59c6e i965: Make brw_clear_cache flag all the bits on both pipelines.
Setting brw->ctx.NewDriverState and brw->ctx.NewGLState affects
the dirty bits for the current pipeline.  But, we need to flag
everything dirty on *both* pipelines, so that when we switch
back, we'll realize our programs are stale and re-upload them.

To accomplish this, flag the saved state for both pipelines.
Only one of them should matter, but this way we don't have to
check which we need to set.  It's harmless to set the other.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-11 22:53:19 -08:00
Samuel Iglesias Gonsálvez
61ceb36ead glsl: Allow invariant qualifer in block members in desktop OpenGL.
Feedback from Khronos is that 'invariant' should be allowed on block
members for desktop OpenGL. Fix piglit regression added by fe1e89a0:
invariant-qualifier-in-out-block-01.vert

v2:
- Allow it for in/out blocks in OpenGL ES too, so when OES_shader_io_blocks
is supported we don't need to do any change (Timothy)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89330
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-02-12 07:20:47 +01:00
Kenneth Graunke
e9644cb1f9 i965: Consider tessellation in get_pipeline_state_l3_weights.
I think this was just missed; Curro and I were probably writing
code simultaneously and forgot to combine them at the end.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-11 19:15:17 -08:00
Kenneth Graunke
f275c61c30 i965: Split brw_upload_texture_surfaces into compute/render atoms.
When uploading state for the compute pipeline, we don't want to
look at VS/TCS/TES/GS/FS programs, as they might be stale, and
aren't relevant anyway.  Likewise, the render pipeline shouldn't
look at CS.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-11 19:15:08 -08:00
Marek Olšák
f3943614ff radeonsi: fix build with LLVM 3.6
Broken by this cleanup: 3dc1cb0cc7

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-12 00:41:36 +01:00
Jason Ekstrand
9f8c01b03c i965/gs: Pass VerticesIn though prog_data
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-11 15:07:20 -08:00
Jason Ekstrand
56eb9c44ad i965/fs: Pass usage of depth, W, and sample mask through prog_data
We really need to stop pulling information directly out of shaders for
state setup.  For one thing, if we want any sort of an on-disk shader
cache, having all of this metadata in one place is going to be crucial.
Also, passing it all through prog_data cleans up the compiler <-> state
setup API substantially.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-11 15:07:20 -08:00
Jason Ekstrand
ae3543950c i965/fs: Refactor setup_payload_gen6 to assume FS
It's extremely FS specific so the fact that we have a stage check in the
middle of it is rather bogus.  While were here, we rename
setup_payload_gen4 and setup_payload_gen6 to make it obvious that they are
both FS specific.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-11 15:07:20 -08:00
Samuel Pitoiset
d759f0ddf1 nv50,nvc0: remove unused parameter in nvXX_state_validate()
This 'words' parameter is there since 2011 but it has never been used.
While we are at it, get rid of the extern declaration.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-11 23:14:16 +01:00
Timothy Arceri
b600247035 glsl: don't validate interface blocks twice
We already check for opaque types so don't recheck for atomics
and images.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-12 09:12:23 +11:00
Timothy Arceri
98d3cc9fbc glsl: remove duplicate embedded struct validation
Commit c98deb18d5 in 2010 disallowed embedded struct definitions
in ES. Then in 2013 d9bb8b7b56 disallowed it for everything but
GLSL 1.10.

Commit c98deb18d5 seemed the cleanest way to do the check so its
been extended to cover GL and the other version has been removed.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-12 09:06:49 +11:00
Jose Fonseca
0d4898ae80 include,gallium: Remove pre-MSVC 2013 compatibility.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-11 21:36:00 +00:00
Jose Fonseca
a97a955b92 scons: Eliminate MSVC2008 compatibility.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-11 21:36:00 +00:00
Jose Fonseca
1cadfe08c4 configure: Eliminate MSVC2008 compatibility.
We no longer need to build any part of Mesa with Windows SDK 7.0.7600 or
MSVC 2008.  MSVC 2013 will be the oldest we support.

In practice this means people are now free to declare variables in the
middle of blocks, on the whole Mesa tree.

Care should still be taken with variable length arrays and void pointer
arithmetic.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Hella-acked-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-11 21:36:00 +00:00
Chris Forbes
a2c8b5ece5 i965: ir: dump floats as %-g rather than %f, so we can see denormals
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
2016-02-11 12:10:29 -08:00
Jordan Justen
9f36070c2f i965/gen7: Require kernel cmd_parser 5 for ARB_compute_shader
The indirect dispatch registers were whitelisted in command parser
version 5. (Version 5 is available as of Linux 4.4)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-11 10:49:13 -08:00
Marek Olšák
a8aa73f768 st/mesa: release GLSL IR in LinkShader after it's not needed
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-11 17:31:40 +01:00
Marek Olšák
906ecab450 mesa: call build_program_resource_list inside Driver.LinkShader
to allow LinkShader to free the GLSL IR.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-11 16:56:28 +01:00
Marek Olšák
0f235c960c st/mesa: use correct pipe functions to create tess shaders
Broken by one of my cleanups. Spotted by luck.

Radeonsi doesn't care, because all shader create callbacks go to the same
function.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-11 16:56:28 +01:00
Marek Olšák
100796c15c gallium/radeon: drop support for LLVM 3.5
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

v2: adjust the comment in the amdgpu winsys
2016-02-11 16:48:30 +01:00
Marek Olšák
3dc1cb0cc7 radeonsi: obtain commonly used LLVM types only once
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-11 16:48:30 +01:00
Marek Olšák
1643dca513 radeonsi: cleanup shader codegen
si_shader_ctx -> ctx
type * ptr -> type *ptr
si_shader_context *shader -> si_shader_context *ctx

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-11 16:48:30 +01:00
Marek Olšák
1c8a1a8fed radeonsi: fix a crash when binding a sampler buffer
Buffers don't contain r600_texture.

Broken by 7aedbbacae:
"radeonsi: put image, fmask, and sampler descriptors into one array"

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94091
2016-02-11 16:48:30 +01:00
Emil Velikov
0f3cea95ab docs: add news item and link release notes for 11.1.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-11 01:47:16 +00:00
Emil Velikov
0802afd92d docs: add sha256 checksums for 11.1.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e49dd21bcb)
2016-02-11 01:45:27 +00:00
Emil Velikov
323782aa57 docs: add release notes for 11.1.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 7bcd827806)
2016-02-11 01:45:25 +00:00
Jason Ekstrand
8750299a42 nir: Remove the const_offset from nir_tex_instr
When NIR was originally drafted, there was no easy way to determine if
something was constant or not.  The result was that we had lots of
special-casing for constant values such as this.  Now that load_const
instructions are SSA-only, it's really easy to find constants and this
isn't really needed anymore.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@gmail.com>
2016-02-10 16:33:50 -08:00
Jason Ekstrand
70dff4a55e nir/lower_vec_to_movs: Better report channels handled by insert_mov
This fixes two issues.  First, we had a use-after-free in the case where
the instruction got deleted and we tried to return mov->dest.write_mask.
Second, in the case where we are doing a self-mov of a register, we delete
those channels that are moved to themselves from the write-mask.  This
means that those channels aren't reported as being handled even though they
are.  We now stash off the write-mask before remove unneeded channels so
that they still get reported as handled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94073
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2016-02-10 16:33:14 -08:00
Marek Olšák
6ee1c386fe radeonsi: don't emit unnecessary NULL exports for unbound targets (v3)
v2: remove semantic index == 0 checks
    add the else statement to remove shadowing of args
v3: fix fbo-alphatest-nocolor regression

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
2016-02-10 23:53:17 +01:00
Ben Widawsky
088280e022 i965: Make sure we blit a full compressed block
This fixes an assertion failure in [at least] one of the Unreal Engine Linux
demo/games that uses DXT1 compression. Specifically, the "Vehicle Game".

At some point, the game ends up trying to blit mip level whose size is 2x2,
which is smaller than a DXT1 block. As a result, the assertion in the blit path
is triggered. It should be safe to simply make sure we align the width and
height, which is sadly an example of compression being less efficient.

NOTE: The demo seems to work fine without the assert, and therefore release
builds of mesa wouldn't stumble over this. Perhaps there is some unnoticeable
corruption, but I had trouble spotting it.

Thanks to Jason for looking at my backtrace and figuring out what was going on.

v2: Use NPOT alignment to make sure ASTC is handled properly (Ilia)
Remove comment about how this doesn't fix other bugs, because it does.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93358
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-10 14:08:46 -08:00
Marek Olšák
79d0082c64 radeon/uvd: silence a warning 2016-02-10 20:16:17 +01:00
Marek Olšák
d9c8a8fe61 r300g: silence warnings 2016-02-10 20:16:17 +01:00
Ian Romanick
0ecc9d907e meta/decompress: Don't pollute the renderbuffer namespace
tl;dr: For many types of GL object, we can *NEVER* use the Gen function.

In OpenGL ES (all versions!) and OpenGL compatibility profile,
applications don't have to call Gen functions.  The GL spec is very
clear about how you can mix-and-match generated names and non-generated
names: you can use any name you want for a particular object type until
you call the Gen function for that object type.

Here's the problem scenario:

 - Application calls a meta function that generates a name.  The first
   Gen will probably return 1.

 - Application decides to use the same name for an object of the same
   type without calling Gen.  Many demo programs use names 1, 2, 3,
   etc. without calling Gen.

 - Application calls the meta function again, and the meta function
   replaces the data.  The application's data is lost, and the app
   fails.  Have fun debugging that.

Fixes piglit 'object-namespace-pollution glGetTexImage-compressed
renderbuffer' test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:55 -08:00
Ian Romanick
3aeff21fbf meta: Use internal functions for renderbuffer access
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:53 -08:00
Ian Romanick
4087c17832 meta/decompress: Track renderbuffer using gl_renderbuffer instead of GL API object handle
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:50 -08:00
Ian Romanick
47a5aa4bfa i965/meta: Don't pollute the renderbuffer namespace
tl;dr: For many types of GL object, we can *NEVER* use the Gen function.

In OpenGL ES (all versions!) and OpenGL compatibility profile,
applications don't have to call Gen functions.  The GL spec is very
clear about how you can mix-and-match generated names and non-generated
names: you can use any name you want for a particular object type until
you call the Gen function for that object type.

Here's the problem scenario:

 - Application calls a meta function that generates a name.  The first
   Gen will probably return 1.

 - Application decides to use the same name for an object of the same
   type without calling Gen.  Many demo programs use names 1, 2, 3,
   etc. without calling Gen.

 - Application calls the meta function again, and the meta function
   replaces the data.  The application's data is lost, and the app
   fails.  Have fun debugging that.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92363
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:47 -08:00
Ian Romanick
03506c9ef1 i965/meta: Use internal functions for renderbuffer access
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:44 -08:00
Ian Romanick
4c6b0e017c i965/meta: Return struct gl_renderbuffer* from brw_get_rb_for_slice instead of GL API handle
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:42 -08:00
Ian Romanick
ab2b631703 meta: Don't save or restore the renderbuffer binding
Nothing left in meta does anything with the RBO binding, so we don't
need to save or restore it.  The FBO binding is still modified.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:40 -08:00
Ian Romanick
e273bbd60b meta: Use _mesa_CreateRenderbuffers instead of _mesa_GenRenderbuffers and _mesa_BindRenderbuffer
This has the advantage that it does not pollute the global binding
state.  It also enables later patches that will stop calling
_mesa_GenRenderbuffers / _mesa_CreateRenderbuffers which pollute the
renderbuffer namespace.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-10 10:59:36 -08:00