Commit graph

204405 commits

Author SHA1 Message Date
Eric Engestrom
adfe29cb46 ci: give high priority to post-merge jobs as well
Right now, `deploy-docs` (updating the docs.mesa3d.org website) is the
only job that can exist in that pipeline (along with `alpine/x86_64_build`,
but that job is always a no-op).

Right now this job can get stuck for a long time waiting for a runner,
but it's very short, and we kinda want the website to be updated quickly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34554>
2025-04-17 18:39:34 +00:00
José Roberto de Souza
a96e280dfe intel: Program XY_FAST_COLOR_BLT::Destination Mocs for gfx12
Copy engine is not used in gfx12 platforms on ANV but that is possible
in Iris.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34560>
2025-04-17 18:11:44 +00:00
Alyssa Rosenzweig
8b068ef6c1 hk: handle HIC with twiddled
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
88bdc27342 asahi: let booleans be your guide
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
551355d4e5 asahi,hk: factor out zls_control pack helper
makes both drivers a lot more readable, but especially gl

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
3a560dd32b asahi: identify ZLS compress load/store bits
obvious in retrospect!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
9757185153 hk: plumb ZLS tiling
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
454a90eaa8 asahi: plumb ZLS tiling bits
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
715f6b3b33 asahi: identify ZLS tiling bits
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
0dca602aff asahi: generalize compression check
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
72f3dcc8da asahi: generalize tiling checks
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
c4130af883 asahi: extend tile width/height in texture desc
we need to support up to 16384x16384 for atomics on twiddled images.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
f21dc4d0cf asahi: pack sample count in s/w texture descriptor
not needed for non-msaa case, and this lets us free up 2 bits.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig
8f57b5187f ail: support twiddled
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
6fdad684da ail: generalize ail_space_bits
for full twiddling.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
e5006dc6ae hk: fill sparse.write with nonzero values
fuzz for bugs.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
ffac153bcf hk: reindent/unscope
no functional change, split because the diff is all spacing changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
86d3489c35 hk: drop FS null checks
these are all dead now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
3ab8ce8579 hk: fix null FS corner cases
this fixes null FS + cull distance/API sample mask, which require a prolog.
fixes upcoming CTS.

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Alyssa Rosenzweig
d959557669 hk: fix tessellation + clipper queries
fixes upcoming cts

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:05 +00:00
Rhys Perry
427479c040 aco: remove va_vdst/vm_vsrc/sa_sdst variables
Use the "wait" variable instead.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34529>
2025-04-17 17:28:22 +00:00
Rhys Perry
3d6fa6996c aco: init vm_vsrc/sa_sdst from depctr_wait
fossil-db (navi31):
Totals from 5805 (7.31% of 79377) affected shaders:
Instrs: 14229621 -> 14207115 (-0.16%); split: -0.16%, +0.00%
CodeSize: 75358724 -> 75268624 (-0.12%); split: -0.12%, +0.00%
Latency: 133637034 -> 133624262 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 22067819 -> 22066213 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34529>
2025-04-17 17:28:22 +00:00
Rhys Perry
ce2be5ab8e aco: combine VALU lanemask hazard into VALUMaskWriteHazard
This is now basically the same as the original VALUMaskWriteHazard, except
it now considers both VALU and SALU writes.

Now that it's a part of VALUMaskWriteHazard, differences from the original
VALU lanemask workaround are:
- it includes SALU reads after the write
- it includes VALU writes and SALU/VALU reads after the write which are
  not lanemasks
- it combines s_waitcnt_depctr instructions when it's a read after both a
  SALU write and a VALU write
- non-exec VALU SGPR reads reset the SGPRs read by VALU as a lanemask
- exec SGPRs are ignored

resolve_all_gfx11() is also finished.

fossil-db (navi31):
Totals from 21538 (27.13% of 79377) affected shaders:
Instrs: 27628855 -> 27552972 (-0.27%); split: -0.30%, +0.03%
CodeSize: 145968448 -> 145667616 (-0.21%); split: -0.23%, +0.02%
Latency: 209537805 -> 209509519 (-0.01%); split: -0.02%, +0.00%
InvThroughput: 36304270 -> 36301624 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12623
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11480
Backport-to: 25.0
Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34529>
2025-04-17 17:28:22 +00:00
Mel Henning
eee3c8eab8 nak: Handle idp4 ureg latencies
Fixes: 6b8a4e6bb7 ("nak: Add Turing latency information")
Fixes: 7a01953a39 ("nak: Add Ampere and Ada latency information")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12993
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34563>
2025-04-17 17:10:40 +00:00
Mel Henning
de1ed48325 nak/spill_values: Spill constants across edges if needed
In a previous iteration of the spilling code, we added an extra check to
only spill across edges if the value being spilled is in the W set.
This was due to a misunderstanding of the modeling of S and W in Braun
and Hack.  In the current implementation, we maintain the invariant that
every live value is in at least one of S or W so we don't need that
check but it was left in by mistake.

One exception to this rule was added when we special-cased constant
values.  Now the invariant is that every live value is in S, in W, or is
a constant.  When we made this change, the check we accidentally left in
bit us because now if a value is constant but not in W, it wasn't
getting spilled across the edge.  This can result in a value getting
filled later which was never spilled, leading to undefined values.

Fixes: 7b82e26e3c ("nak: Don't spill/fill const values")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12993
Co-authored-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34563>
2025-04-17 17:10:40 +00:00
Eric Engestrom
8744c98fa9 meson: remove duplicate deprecated for power8 option
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes: c4b305079d ("meson: Simplify the power8 optimization logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34565>
2025-04-17 14:43:30 +00:00
Eric Engestrom
b9472db496 meson: remove duplicate deprecated for gallium-xa option
Fixes: cf40099730 ("meson: deprecate gallium-xa")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34565>
2025-04-17 14:43:30 +00:00
Rohan Garg
cbc1ec4f73 anv: re enable compression for CPS surfaces on platforms other than Xe
I accidentally disabled compression on CPS surfaces marked as storage or
color attachment for all platforms, when this should only be limited to
Xe.

Fixes: 80f9b6 ('anv: CPB surfaces that are used as color attachments or for stores cannot be compressed')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34297>
2025-04-17 14:24:11 +00:00
Rhys Perry
4fcf2eb1d7 aco/gfx12: VOPD src0/1 are src bank compatible if they are the same vgpr
fossil-db (gfx1201):
Totals from 66518 (83.80% of 79377) affected shaders:
Instrs: 36939667 -> 36656685 (-0.77%); split: -0.79%, +0.02%
CodeSize: 220575208 -> 220201764 (-0.17%); split: -0.21%, +0.04%
Latency: 258919732 -> 258137974 (-0.30%); split: -0.35%, +0.05%
InvThroughput: 49911351 -> 49643836 (-0.54%); split: -0.55%, +0.02%
VClause: 788661 -> 788430 (-0.03%); split: -0.04%, +0.01%
SClause: 1176416 -> 1176263 (-0.01%); split: -0.02%, +0.01%
VALU: 18014058 -> 17818119 (-1.09%); split: -1.10%, +0.01%
VOPD: 4926983 -> 5122922 (+3.98%); split: +4.01%, -0.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Rhys Perry
3446f2059d aco/gfx12: assume VOPD with two v_mov_b32 are src bank compatible
fossil-db (gfx1201):
Totals from 10576 (13.32% of 79377) affected shaders:
(no stats changed)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Rhys Perry
1bd5ae7b14 aco: refactor can_use_vopd so that it returns flags
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Rhys Perry
d4b418bbb9 aco: add are_src_banks_compatible helper for VOPD creation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Rhys Perry
4b0da5b51f aco: rename is_opy_only to can_be_opx
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Rhys Perry
408fa33c09 aco/gfx12: don't use second VALU for VOPD's OPX if there is a WaR
fossil-db (gfx1201):
Totals from 38908 (49.02% of 79377) affected shaders:
Instrs: 30268107 -> 30268131 (+0.00%); split: -0.00%, +0.00%
CodeSize: 180843648 -> 180843640 (-0.00%); split: -0.00%, +0.00%
Latency: 224905962 -> 224906072 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 44322988 -> 44323004 (+0.00%)
VALU: 15124145 -> 15124167 (+0.00%)
VOPD: 4018504 -> 4018482 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 25.0
Backport-to: 25.1
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
2025-04-17 14:00:29 +00:00
Tomeu Vizoso
a9fde960e6 etnaviv/ml: Support FullyConnected with signed weights
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34545>
2025-04-17 13:30:21 +00:00
Tomeu Vizoso
9615d44d6e teflon: Skip unsupported FullyConvolution operations
Drivers don't support these combinations yet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34545>
2025-04-17 13:30:21 +00:00
Tomeu Vizoso
9409595c32 etnaviv/ml: All tensors are now 4D, adapt to it
After "teflon: Set unused dimensions to 1", all tensors have 4
dimensions, so change the dim index accordingly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Tomeu Vizoso
c728e73d65 etnaviv/ml: Track memory layout of tensors
Improve the decision on when to add transpose and detranspose jobs by
tracking the memory layout that a tensor is in.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Tomeu Vizoso
c4a5f8d665 teflon: Set unused dimensions to 1
So drivers don't need to superfluously watch out for zeroes when
multiplying among dimensions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Tomeu Vizoso
23ae1c3bff teflon: Actually accept concatenations with different number of channels
It is supported now by Etnaviv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Tomeu Vizoso
bde0e69bcd etnaviv/ml: Consolidate transpose/detranspose
To simplify things, state that all operations as implemented expect
their input tensors to be in the channel order that the hardware
supports, and that the output tensors will be in that same order as
well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Tomeu Vizoso
e06265ed3a teflon: Only mark integers as signed
As these are the types that need special handling, eg. not
kTfLiteFloat32.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34498>
2025-04-17 13:13:09 +00:00
Samuel Pitoiset
209a0ede98 radv: add a function to emit meshlet registers on GFX11+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
836757bec3 radv: tidy up radv_emit_ps_epilog_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
dca35b7226 radv: tidy up radv_emit_geometry_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
d999afeb7a radv: tidy up radv_emit_vertex_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
85fdf69027 radv: simplify combining TES/VS+GS config registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
0dd9833348 radv: remove redundant assertion when emitting PS epilog state
It's already checked by radv_emit_32bit_pointer().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Samuel Pitoiset
a230d2daa3 radv: use radeon_set_sh_reg() for only 1 DWORD
It's just shorter to write.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34518>
2025-04-17 12:49:47 +00:00
Antonio Ospite
4dabc7776f ci/android: show how to add more Android CTS test cases
Show how to add more Android CTS tests cases, using --include-filters

Only CtsNativeHardwareTestCases and CtsSkQPTestCases are actually
enabled for now, because the android-angle-lavapipe-cts job is part of
the pre-merge pipeline and these modules would not be too expensive to
run.

The container size increases by about 60Mb and the test time from 4m to
7 min on a local system, so it's an acceptable compromise to show how
multiple modules can be tested.

A similar mechanism will be used to add CtsDeqpTestCases tests in the
future, probably in nightly or weekly jobs, because that would require
more space in the containers and a lot more time to run the tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34479>
2025-04-17 11:50:07 +00:00