Commit graph

165273 commits

Author SHA1 Message Date
Thong Thai
a5b18bd478 gallium/auxiliary/vl: clean-up progressive shader
Add the progressive shader to the vl_compositor_cs_cleanup_shaders
function.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8086
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8088
Tested-by: Mark Herbert <mark.herbert42@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit bb003d406e)

Fixes: 56eac722bd ("gallium/auxiliary/vl: compute shaders for progressive yuv")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20971>
2023-01-28 17:53:34 -05:00
Samuel Pitoiset
eac64397de radv: add a layer for fixing rendering issues with RAGE2
This game seems to incorrectly set the render area and since we switched
to full dynamic rendering, the framebuffer dimensions is no longer used.

Forcing the render area to be the framebuffer dimensions restore the
previous logic and it fixes rendering issues.

Fixes: c7d0d328d5 ("radv: Set the window scissor to the render area, not framebuffer")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20900>
(cherry picked from commit 1a93cd1556)
2023-01-27 09:17:37 -08:00
Jose Fonseca
89f0b69207 llvmpipe: Honor zero sample_mask when multisample is disabled.
The JIT generated FS shader has logic to obey sample mask when:
multisample is enabled, or multisample is disabled but FS writes sample
mask and pipe_rasterizer_state::no_ms_sample_mask_out.

However it did not handle the case where multisample was disabled, FS
did not write sample_mask, and sample mask was zero.  Instead it relied
upon the setup to discard the primitives, but that went away with commit
da5840f3.

We could restore the discard on zero mask behavior, but we would again
blurring the semantics of rasterization discard.  Instead this change
adds logic to primitive setup to cull the primitives when sample mask is
zero.

Fixes: da5840f3 ("llvmpipe: Faithfully honour pipe_rasterizer_state::rasterizer_discard flag")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20934>
(cherry picked from commit 77092ca8f4)
2023-01-27 09:17:37 -08:00
Kenneth Graunke
0d6434c842 egl: Rewrite eglGetMscRateANGLE to avoid probes and handle multi-monitor
RRGetScreenInfo re-probes connector status, which may result in an EDID
transfer for every output, which according to Adam Jackson can be on the
order of 100ms for a single EDID block.  So our previous implementation
of this eglGetMscRateANGLE was blocking for excessive periods of time
instead of being a quick query of the refresh rate like users expect.

This changes our eglGetMscRateANGLE implementation from using
RRGetScreenInfo to RRGetScreenResourcesCurrent and RRGetCrtcInfo.
This obtains the same monitor info without re-probing connectors.

Fixes a severe performance regression in Chromium WebGL performance.

While we're re-implementing the extension, we also implement proper
multi-monitor support: if there are multiple active CRTCs, we determine
which contains the largest portion of the surface, as specified in the
EGL_ANGLE_sync_control_rate extension.

We also now report fractional refresh rates correctly rather than
rounding to the nearest Hz.

Fixes: 4752655649 ("egl/x11: implement ANGLE_sync_control_rate")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6996
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7038
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20665>
(cherry picked from commit 41d5f0ee09)
2023-01-27 09:17:37 -08:00
Kenneth Graunke
98a6cfd395 loader: Add infrastructure for tracking active CRTC resources
This provides a cached view of the current screen resources, with the
coordinates and refresh rate for every active CRTC.  It's currently only
implemented for X11/XCB.

Fixes: 4752655649 ("egl/x11: implement ANGLE_sync_control_rate")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20665>
(cherry picked from commit 3170b63314)
2023-01-27 09:17:36 -08:00
Jesse Natalie
48de75f438 dzn: Report as a software device for non-Windows
Fixes: 5f1b8b3e6c ("dzn: Use DXGI swapchains")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20939>
(cherry picked from commit 2010b91547)
2023-01-27 09:17:35 -08:00
Dylan Baker
5f76187f23 .pick_status.json: Update to 1a93cd1556 2023-01-27 09:16:38 -08:00
Mike Blumenkrantz
406ef423b9 zink: fix VK_DYNAMIC_STATE_LINE_WIDTH usage
add a special tracker here to set the state only when necessary

Fixes: 659c39fafb ("zink: rework primitive rasterization type logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20886>
(cherry picked from commit 06a125942b)

Conflicts:
	src/gallium/drivers/zink/ci/zink-lvp-validation-settings.txt

Stable:
    - removed CI file taht doesn't exist in 23.0 branch
2023-01-26 09:13:22 -08:00
Corentin Noël
3962bcfdae kopper: Do not free the given screen in initScreen implementation
The given screen is already freed by the caller in case a NULL-pointer is
returned by the implementation.

Cc: mesa-stable
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20933>
(cherry picked from commit dd3730f8bd)
2023-01-26 09:11:50 -08:00
Samuel Pitoiset
c172f1de89 radv: fix ignoring graphics shader stages that don't need to be imported
If a shader stage is already imported from a library it should be
properly ignored.

Fixes recent CTS dEQP-VK.pipeline.fast_linked_library.misc.unused_shader_stages*.

Fixes: c8765c5244 ("radv: ignore shader stages that don't need to be imported with GPL")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20899>
(cherry picked from commit b97fee432c)
2023-01-26 09:11:50 -08:00
Friedrich Vock
f89be5c1d6 radv/rmv: Correct timestamp shifting
The shifting was off-by-one compared to how it is done in the kernel. Also, excess_length needs to be casted to uint64_t to prevent zeroing everything except the 5 LSBs.

Fixes: abf3bcd6 ("radv: Add RMV resource tracking")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
(cherry picked from commit e07729e8de)
2023-01-26 09:11:49 -08:00
Friedrich Vock
36ba0f36fd radv/rmv: Log bo destruction before freeing it
Fixes: abf3bcd6 ("radv: Add RMV resource tracking")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
(cherry picked from commit 292d7b95fc)
2023-01-26 09:11:49 -08:00
Friedrich Vock
9eec52701f radv/rmv: Avoid more CPU unmap deadlocks
Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
(cherry picked from commit 2d5d247203)
2023-01-26 09:11:48 -08:00
Friedrich Vock
b204c4fb23 radv/rmv: Also check the other pid field
Sometimes it seems like this field contains the correct pid instead.

Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20820>
(cherry picked from commit 2dec10c297)
2023-01-26 09:11:47 -08:00
Lionel Landwerlin
611a7b9f75 vulkan/wsi/wayland: improve same gpu detection
Some compositor like KWin do not return the render node.

v2: Make sure we test if only drm_info.hasPrimary is true (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: db42ed1e04 ("vulkan/wsi/wl: correctly find whether the compositor uses the same GPU")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8139
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20914>
(cherry picked from commit e27d217fb1)
2023-01-26 09:11:47 -08:00
Francisco Jerez
603914384a intel/fs: Fix src and dst types of LOAD_PAYLOAD ACP entries during copy propagation.
The ACP entries created by copy propagation to track the implied
copies of LOAD_PAYLOAD instructions don't model the behavior of
LOAD_PAYLOAD correctly, since (as of 41868bb682) header
moves are implicitly retyped to UD and the destination of non-header
copies implicitly uses the same type as the corresponding source, even
though the ACP entries created for such copies could incorrectly
represent a type conversion, which can lead to mis-optimization of the
program.

According to Marcin, this fixes the func.mesh.ext.workgroup_id.task.q0
crucible test.

Fixes: 41868bb682 ("i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction")
Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18980>
(cherry picked from commit 7b5e933629)
2023-01-26 09:11:46 -08:00
Chad Versace
924a4de013 util/glsl2spirv: Fix build with Python 3.6
ChromeOS still uses Python 3.6, but the glsl2spirv script uses module
'__future__.annotations', introduced in Python 3.7. Fix the build by
removing module, but otherwise preserve the type annotations.

Fixes: 949c3b55db ("util/glsl2spirv: add type annotations")
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20237>
(cherry picked from commit bca22a6578)
2023-01-26 09:11:46 -08:00
Italo Nicola
ab083f34d8 panfrost: fix off-by-one when exporting format modifiers
`count` should not be incremented before the check, because it causes
the modifiers array to be filled starting from position 1 instead of 0.

This bug causes one less format modifier to be available than would
otherwise be expected, which could then lead to a dmabuf query failing
in situations where a supported modifier wouldn't be advertised.

It also causes garbage data to be advertised as a modifier in position 0
of the array, although this is not very likely to cause issues.

Fixes: 2a1217513 ("panfrost: Implement panfrost_query_dmabuf_modifiers")
Cc: mesa-stable
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20879>
(cherry picked from commit 6c446377ff)
2023-01-26 09:11:39 -08:00
Samuel Pitoiset
450ac592e2 radv: fix RADV_DEBUG=hang with multiple cmdbuffer per submission
With RADV_DEBUG=hang, there is only one cmdbuffer per submission and
this has been broken recently.

This fixes a segfault when generating GPU hang reports.

Fixes: 76deaa1b1a ("radv: Refactor command buffer handling in radv_queue_submit_normal.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20860>
(cherry picked from commit 7b76d46e38)
2023-01-26 09:11:39 -08:00
Pierre-Eric Pelloux-Prayer
497e3028f0 radeonsi/gfx11: fix ge_cntl programming
gfx11 renamed PRIM_GRP_SIZE to VERTS_PER_SUBGRP but another change was
was missed.

Update our code based on PAL's UniversalCmdBuffer::CalcGeCntl function
(especially useVgtOnchipCntlForTess being false for gfx11).

Fixes: 25a66477d0 ("radeonsi/gfx11: register changes")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
(cherry picked from commit f73cdda983)
2023-01-26 09:11:38 -08:00
Kenneth Graunke
233f61ccdd iris: Add missing untyped data port flush on PIPELINE_SELECT
This is needed when switching away from GPGPU mode.  See the previous
commit for anv.  This is not likely to make a practical difference for
iris because it never switches back and forth between modes like anv.

Fixes: 172e0b0ebf ("iris: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>
(cherry picked from commit bd8e8d204d)
2023-01-26 09:11:38 -08:00
Kenneth Graunke
09480330d6 anv: Add missing untyped data port flush on PIPELINE_SELECT
See the comments in emit_apply_pipe_flushes().  Flushing HDC is not
sufficient in GPGPU mode, and we need to set the untyped data port flush
bit as well.

Fixes many dEQP-VK failures with INTEL_COMPUTE_CLASS=1 on Alchemist.

Fixes: 1067ec90a5 ("anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>
(cherry picked from commit a8108f1d44)
2023-01-26 09:11:37 -08:00
Emma Anholt
e3ec2e2ea9 zink: Re-emit the SpvBuiltInSampleMask access chain each load.
Otherwise, the access chain you emitted last time may not dominate the
current use.

Fixes the following validation failure in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.bits_unique_per_sample.multisample_texture_2:

  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv(ERROR / SPEC):
  msgNum: 7060244 - Validation Error: [
  UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
  0x55cf3cea2c60, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
  SPIR-V module not valid: ID '67[%67]' defined in block '23[%23]' does
  not dominate its use in block '31[%31]'

Fixes: 8899f6a198 ("zink: fix gl_SampleMaskIn spirv generation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 4286633eec)
2023-01-26 09:11:37 -08:00
Emma Anholt
06072d3bb5 zink: Fix up mismatches of memory model vs addressing model.
MemoryModelVulkan was left out for CSes using it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 1e4deb3b89)
2023-01-26 09:11:36 -08:00
Emma Anholt
4ad9d7be36 zink: Fix validation failure for maxLod < minLod.
GL lets you set a silly state, so do something plausible instead of
undefined.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit adf81044d4)
2023-01-26 09:11:36 -08:00
Emma Anholt
d6418b173d zink: Add missing Flat decorations on some inputs.
Fixes validation failures:

Test case 'dEQP-GLES31.functional.android_extension_pack.shaders.es32.extension_directive.oes_sample_variables'..
MESA: error: Validation Error: [
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
0x563a1838b790, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment
OpEntryPoint operand 31 with Input interfaces with integer or float type
must have a Flat decoration for Entry Point id 4.
%gl_SampleId = OpVariable %_ptr_Input_uint Input

Test case 'KHR-GL46.shader_ballot_tests.ShaderBallotAvailability'..
MESA: error: Validation Error: [ UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle = 0x5558e12f17e0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 | SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment OpEntryPoint operand 28 with Input interfaces with integer or float type must have a Flat decoration for Entry Point id 4.
  %gl_SubgroupLocalInvocationId = OpVariable %_ptr_Input_uint Input

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
(cherry picked from commit 2a33d509ca)
2023-01-26 09:11:35 -08:00
Dylan Baker
f5a5b74b02 .pick_status.json: Update to 50dee85b68 2023-01-26 09:11:31 -08:00
Dylan Baker
b27354806a
VERSION: bump for 23.0.0-rc3 2023-01-24 16:08:08 -08:00
Marcin Ślusarz
ea4ecc3e72 intel/compiler/mesh: handle const data in task & mesh programs
Started showing up when nir_opt_large_constants call was moved in 88756cee8d.
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.fullscreen_gradient*

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: 88756cee8d ("intel/compiler: Run nir_opt_large_constants before scalarizing consts")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20876>
(cherry picked from commit 536a2acfc2)
2023-01-24 15:27:06 -08:00
Samuel Pitoiset
598e985d65 radv/winsys: fix incorrect PCIID for GFX11 in the null winsys
Fixes: bbad550f3d ("radv/winsys: fill real info for CHIP_GFX1100")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20850>
(cherry picked from commit bf3c14b8a5)
2023-01-24 15:27:06 -08:00
Lionel Landwerlin
0a9dc20094 intel/fs: avoid cmod optimization on instruction with different write_mask
I've been running into failures with tests like :

dEQP-VK.robustness.robustness2.bind.notemplate.rgba32i.unroll.nonvolatile.uniform_buffer_dynamic.no_fmt_qual.len_4.samples_1.1d.frag

With the load_global_const_block_intel NIR intrinsic, you can load a
vec8/vec16 with a predicate. The predicate is correctly uniformized to
feed into the SEND instruction's flag register.

The problem is that a series of optimization first remove the
find_live_channel and then changes the broadcast into a simple MOV
instruction, on the assumption that the first channel is always active
if there is not control flow. This is correct.

But after that the cmod optimzation will remove this instruction :

   mov.nz.f0.0(16) null:D, vgrf16+0.0<0>:D NoMask

because it seems to be equivalent to :

   cmp.g.f0.0(16) vgrf16:D, vgrf12:D, 63d

In this case vgrf16 is the predicate to the load block SEND
instruction. Since the execution mask is different between both, some
of the channels of the SEND instruction end up not being loaded or
loaded with the wrong predication and we end up with incorrect UBO
data.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20852>
(cherry picked from commit a50d2fdb46)
2023-01-24 15:27:06 -08:00
Dylan Baker
488c900b08 .pick_status.json: Update to 12a471afac 2023-01-24 15:27:06 -08:00
Julia Tatz
eb112a38f6 zink: correct sparse bo mem_type_idx placement
VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT = 0x01 has been incidently the
correct memory type index, but isn't guaranteed to be, which is why it
hasn't caused issues yet

Fixes: f9515d93 ("zink: allocate/place memory using memoryTypeIndex directly")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit c71287e70c)
2023-01-24 15:27:06 -08:00
Julia Tatz
6f59991d29 zink: trival renames heap_idx -> memoryTypeIndex
Trival renames to correctly identify vulkan memory type indices aren't
the same as zink heaps

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit e20e8f2243)
2023-01-24 15:27:06 -08:00
Julia Tatz
b435372078 zink: zink_heap isn't 1-to-1 with memoryTypeIndex
Clarify the relationship between zink heaps and vulkan memory type
indices, and resolve the issues from mixing the two up.

Closes: #7588, #7813
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20264>
(cherry picked from commit f6d3a5755f)
2023-01-24 15:27:06 -08:00
Lionel Landwerlin
becfa703df anv: fix preemption enable emission in gpu_memcpy
This has to be before the MI_BATCH_BUFFER_END otherwise it has no
effect.

This also was messing around with you batch length alignment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b9aa66d5d0 ("anv: disable preemption for 3DPRIMITIVE during streamout")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20802>
(cherry picked from commit 6f02f9d108)

Conflicts:
	src/intel/vulkan/genX_gpu_memcpy.c
2023-01-24 15:27:06 -08:00
Erik Faye-Lund
a3c2f78c3d radeonsi: respect smoothing_enabled
When this was last changed, the smoothing_enabled flag seems to have
been forgotten about, breaking line-smoothing (and probably also polygon
smoothing).

Fixes: 4147add280 ("radeonsi: update db_eqaa even if msaa is disabled")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20810>
(cherry picked from commit 9f4f131f2e)

Conflicts:
	src/amd/ci/radeonsi-raven-fails.txt
	src/amd/ci/radeonsi-stoney-fails.txt
2023-01-24 15:27:06 -08:00
Georg Lehmann
01ff451d34 Revert "aco: Combine v_cvt_u32_f32 with insert to v_cvt_pk_u8_f32."
This reverts commit 6d02054047.

v_cvt_pk_u8_f32 returns 0xff instead of v_cvt_u32_f32 & 0xff if the input is
larger than 255.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8128

Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20829>
(cherry picked from commit e527f686ca)
2023-01-24 15:27:05 -08:00
Mike Blumenkrantz
14ecd96183 zink: use actual swapchain object for surface comparison
the outer swapchain object is persistent, which means checking it
will never yield an update after the first check

fixes #8122

Fixes: b2739c9f00 ("zink: set surface->dt when updating swapchain"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20814>
(cherry picked from commit 474ed4b877)
2023-01-24 15:27:05 -08:00
Jonathan Gray
6bd3bd5ae1 egl/dri2: avoid undefined unlocks
unlocks were incorrectly added to paths using dri2_egl_display() as
well as those using dri2_egl_display_lock()

pthread_mutex_unlock() when unlocked is documented by posix as
being undefined behaviour.  On OpenBSD pthread_mutex_unlock() will call
abort(3) if this happens.

Fixes: f1efe037df ("egl/dri2: Add display lock")
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20712>
(cherry picked from commit 0594b3c143)
2023-01-24 15:27:05 -08:00
Marek Olšák
1984d994fb glthread: handle GL_*_ARRAY in glEnable/Disable
Surprisingly, the GL compatibility profile allows these in both
glEnableClientState and glEnable.

Fixes: 0b1dd18591 - glthread: track which vertex array attribs are enabled

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 777166cc66)
2023-01-24 15:27:05 -08:00
Marek Olšák
9cd9c7e863 mesa: allow GL_UNSIGNED_INT64_ARB as vertex format for ARB_bindless_texture
This wasn't implemented, but the spec requires it.

Fixes: 1fe7b1f972 - mesa: implement ARB_bindless_texture

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 721526227c)
2023-01-24 15:27:05 -08:00
Marek Olšák
7289901ce7 util: fix util_is_vbo_upload_ratio_too_large
It was wrong. For example, if the draw vertex count was 10 and the upload
vertex count was 150, u_vbuf wouldn't unroll the draw and would instead
memcpy 150 vertices. This fixes that case.

Fixes: 068a3bf0d7 - util: move and adjust the vertex upload heuristic equation from u_vbuf

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20824>
(cherry picked from commit 4f6e785876)
2023-01-24 15:27:05 -08:00
Marek Olšák
cb9b189166 glthread: fix an upload buffer leak
Fixes: befbd54864 - glthread: don't use atomics for refcounting to decrease overhead on AMD Zen

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20804>
(cherry picked from commit 4d4995b32b)
2023-01-24 15:27:05 -08:00
Mike Blumenkrantz
f0d643eb27 zink: don't use ds3 blend states without color attachments
this is illegal and causes validation errors

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20799>
(cherry picked from commit 5d44318566)
2023-01-24 15:27:05 -08:00
Mike Blumenkrantz
0255c80d78 zink: delete need_blend_constants
this is an artifact of very old code before the dynamic state was set
for all graphics pipelines

now the checks only cause blend constants to not be updated, which triggers
bugs and validation failures

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20799>
(cherry picked from commit b4d18f2ad1)
2023-01-24 15:27:05 -08:00
Mike Blumenkrantz
73091e4d27 zink: preserve present resources during async presentation
ensure that these have a lifetime great enough to be presented

fixes #7781

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20793>
(cherry picked from commit 020db79340)
2023-01-24 15:27:05 -08:00
Dylan Baker
440050346e .pick_status.json: Update to 5039acfd9d 2023-01-24 15:27:05 -08:00
Rose Hudson
c1d8827f5a radeonsi: report 0 block size for Polaris HEVC encoding
makes encoded videos resemble the input again :)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7992
Fixes: c4482a3c1a ("radeonsi/vcn: enable multi-slice encoding")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20714>
(cherry picked from commit e8a60633da)
2023-01-24 15:27:05 -08:00
Tapani Pälli
c34510badf iris: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable
Field must be disabled if any render targets have integer
format, additionally for Gfx12+ field must be disabled when
num multisamples > 1 or forced multisample count > 1.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7892
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671>
(cherry picked from commit 247c06d419)
2023-01-24 15:27:05 -08:00