Commit graph

152430 commits

Author SHA1 Message Date
Marcin Ślusarz
9a28aea2a2 intel/compiler: invalidate metadata in brw_nir_initialize_mue
New "if" blocks may have been inserted.

Fixes: bc4f8c073a ("intel/compiler: inject MUE initialization")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
(cherry picked from commit 5dace41c10)
2022-04-20 21:44:50 -07:00
Marcin Ślusarz
30a980fb94 intel/compiler: invalidate all metadata in brw_nir_lower_intersection_shader
New "if" blocks were inserted.

Fixes: 303378e1dd ("intel/rt: Add lowering for combined intersection/any-hit shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
(cherry picked from commit 4fddef33d5)
2022-04-20 21:44:50 -07:00
Marcin Ślusarz
4f031f35fe anv: invalidate all metadata in anv_nir_lower_ubo_loads
lower_ubo_load_instr may insert "if" blocks.

Fixes: 61749b5a15 ("anv: Add a pass for lowering A64 UBO access")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
(cherry picked from commit 5bd3ba5b67)
2022-04-20 21:44:50 -07:00
Lionel Landwerlin
df6dc532d2 anv: allow getting the address of the beginning of the batch
There is no reason not to be able to get it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 34a0ce58c7 ("anv: add a new execution mode for secondary command buffers")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15968>
(cherry picked from commit 184084e21c)
2022-04-20 21:44:50 -07:00
Erik Faye-Lund
c849ae36e0 vulkan: explicitly cast object-type enum
VkObjectType and VkDebugReportObjectTypeEXT has the same enum-values.
Why the Vulkan WG thought this was a good idea, beats me. But it's what
we have to live with now.

Anyway, instead of having a statement that implicitly casts two
different values from the former to the latter, let's fully relsove the
type as the former, and cast the value when using it instead.

Fixes: 41318a5819 ("vulkan: Use vk_object_base::type for debug_report")
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15547>
(cherry picked from commit b27a2ba4fc)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
b7fe949ab9 zink: rework zink_kopper_update() assert
the dt might have been killed, so just assert that it's a display target

fixes #6317

Fixes: 8ade5588e3 ("zink: add kopper api")

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16017>
(cherry picked from commit 3d97367a60)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
445892367a zink: make a kopper debug print into an error
Fixes: 8ade5588e3 ("zink: add kopper api")

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16017>
(cherry picked from commit 9ecdc2e985)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
81b10bd0dd zink: fix extended restart prim types without dynamic state2
these are all allowed with the ext

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15978>
(cherry picked from commit 8806f444a5)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
24d6489d0d zink: support restart with PIPE_PRIM_LINES_ADJACENCY if ext is available
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15978>
(cherry picked from commit cd9424d93f)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
b27d409cfd zink: unconditionally set line width on rasterizer state change
the pipe cap is used for gating wideline support, so this will always
be 1.0 when not supported

furthermore, the previous code wasn't accurately checking line width
for tess shaders, breaking tests

cc: mesa-stable

fixes (nv):
KHR-GL46.tessellation_shader.tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
(cherry picked from commit d8b66fcbf9)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
df84664032 zink: use mixed zs renderpass for depth read/write
this is triggered by u_blitter when doing src==dst blits

Fixes: 7781a75229 ("zink: add a renderpass flag for mixed zs layout")

affects:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality*

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
(cherry picked from commit 9409756ee3)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
357e3130ad zink: reject resource creation if format features don't match attachment
if a rendertarget-specified image can't be a rendertarget or a blit dst
then it can't be used for the designated functionality and must be rejected

cc: mesa-stable

fixes hangs on various nv driver versions:
dEQP-GLES2.functional.texture.mipmap.2d.generate.rgba5551_fastest

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15960>
(cherry picked from commit 37ac8647fc)
2022-04-20 21:44:50 -07:00
Mike Blumenkrantz
247ecdcc05 zink: remove tcs patch slot map
this is illegal, and we'll just have to eat some piglit fails
until indirects are handled

Fixes: f7ade1f188 ("zink: simplify shader i/o assignment")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15976>
(cherry picked from commit 12cf9a1544)

Conflicts:
	src/gallium/drivers/zink/ci/zink-lvp-fails.txt
2022-04-20 21:44:50 -07:00
Sviatoslav Peleshko
72cc88d205 mesa: flush bitmap caches when changing scissors or window rects state
If we change the sate without flushing the bitmap cache, the cache might be
rendered with the new scissor, which excludes some parts that should've
been rendered with the old state, and vice versa.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6233

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15881>
(cherry picked from commit dd7278aa10)
2022-04-20 21:44:50 -07:00
Timothy Arceri
a27af70c1b nir: fix setting varying from uniform as flat
Here we just make sure we match the interpolation type on both
sides of the shader interface. Drivers like d3d12 are expecting
this.

Fixes: 9401990e6f ("nir/linker: set varying from uniform as flat")

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16003>
(cherry picked from commit 4b4bb46af4)
2022-04-20 21:44:50 -07:00
Samuel Pitoiset
424c960492 radv: fix initializing pipeline_key::topology for GFX9 and older
This is used to determine the geometry shader info on GFX9, and it
looks like it was broken for topologies that use adjacency.

This is also used to remove PSIZ from shaders that don't need it.

Found by inspection.

fossils-db (Polaris10):
Totals from 140 (0.10% of 135960) affected shaders:
SGPRs: 10448 -> 9696 (-7.20%)
VGPRs: 4376 -> 4264 (-2.56%)
CodeSize: 164316 -> 161028 (-2.00%)
Instrs: 26449 -> 25767 (-2.58%)
Latency: 184448 -> 180468 (-2.16%)
InvThroughput: 80772 -> 79092 (-2.08%)
VClause: 337 -> 328 (-2.67%); split: -2.97%, +0.30%
SClause: 859 -> 813 (-5.36%); split: -5.70%, +0.35%
Copies: 1027 -> 790 (-23.08%)
PreSGPRs: 2751 -> 2331 (-15.27%)
PreVGPRs: 3887 -> 3836 (-1.31%)

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15948>
(cherry picked from commit ed7d831525)
2022-04-20 21:44:50 -07:00
Lionel Landwerlin
db3e06f76c intel: fix URB programming for GT1s
We're missing a programming restriction.

Hopefully fixing
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_1.* on
Gfx9atoms

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6216
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>.
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
(cherry picked from commit b07c215c35)
2022-04-20 21:44:49 -07:00
Gert Wollny
353330c094 r600/sfn: Fix store_shared_r600 write masks
The error was caught by the new nir_validation code.

Fixes: 73ef225fc2
    nir: validate write_mask for all intrinsics that have it

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15994>
(cherry picked from commit ef75752ef8)
2022-04-20 21:44:49 -07:00
Emma Anholt
f1168c53ae nir: Add lowering for fround_even on r300.
When we put NIR in the compiler stack for r300, indirect addressing broke
for gallium nine.  DX's array indirects round the float value, so the DX
shader gets mapped to a TGSI "ARR ADDR[0] src.x" instruction.  Translating
that to NIR maps to r0[f2i32(fround(src.x))].  While we might hope that in
translation back using nir-to-tgsi after optimization we would recognize
the construct and emit ARR again, that's going to be error prone (think
"what if src.x is in a NIR register?") so we need a fallback plan.  r300
will be able to handle this lowering, so get it in place first to fix the
regression.

Fixes: #6297
Fixes: 7d2ea9b0ed ("r300: Request NIR shaders from mesa/st and use NIR-to-TGSI.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15870>
(cherry picked from commit 6947016b46)
2022-04-20 21:44:49 -07:00
Icecream95
62b00f70fd panfrost: Stop overallocating compressed textures
The line stride uses the number of bytes in the entire block, so both
the width and height need to be reduced for compressed textures so
that the surface stride is calculated correctly.

Fixes: 051d62cf04 ("panfrost: Add a pan_image_layout_init() helper")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6286
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15989>
(cherry picked from commit f267000240)
2022-04-20 21:44:49 -07:00
Michel Zou
ff76add805 gallium: fix unused symbols warnings
fixes: d760a915

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15840>
(cherry picked from commit 4c1cb62999)
2022-04-20 21:44:49 -07:00
Jason Ekstrand
f48a3cffe7 nir/opcodes: fisfinite32 should return bool32
Otherwise constant-folding will fold it to 0/1 instead of 0/~0.

Fixes: 330e28155f ("nir: add 32-bit bool of fisfinite")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15984>
(cherry picked from commit 5c9e4d400a)
2022-04-20 21:44:49 -07:00
Rhys Perry
a80f8a5ed0 ac/nir: properly handle large global access constant offsets
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 61ac5acca3 ("radv,ac/nir: lower global access to _amd global access intrinsics")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6321
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15951>
(cherry picked from commit 8fe8c5dfd0)
2022-04-20 21:44:49 -07:00
Mike Blumenkrantz
5f5c562f00 mesa/st: set normalized coords for RECT samplers if rects are unsupported
the shaders will never see these, so set the expected value for 2D

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15895>
(cherry picked from commit 2058ae7b43)
2022-04-20 21:44:49 -07:00
Mike Blumenkrantz
653b560413 nir/lower_tex: fix rect queries with lower_rect set
queries still need the sampler_dim changed

Fixes: 682e14d3ea ("nir: lower_tex: Don't normalize coordinates for TXF with RECT")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15895>
(cherry picked from commit 5b0634d735)
2022-04-20 21:44:49 -07:00
Emma Anholt
9a1ca294a8 Revert "ci: Disable Google's lab"
This reverts commit 8506c2b7ee.  Network
admins say the fixed things, and we see the runners phoning home again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15936>
(cherry picked from commit eb78378345)
2022-04-20 21:44:49 -07:00
Dylan Baker
252a858bc5 .pick_status.json: Update to e509598470 2022-04-20 21:44:49 -07:00
Dylan Baker
c519c37784 VESRION: bump for 22.1.0-rc1 release 2022-04-14 09:47:46 -07:00
Rhys Perry
2036a2c5c5 radv: use load_shared2_amd/store_shared2_amd
fossil-db (Sienna Cichlid):
Totals from 376 (0.23% of 162293) affected shaders:
MaxWaves: 9620 -> 9596 (-0.25%); split: +0.08%, -0.33%
Instrs: 207533 -> 203901 (-1.75%); split: -1.76%, +0.01%
CodeSize: 1130904 -> 1106420 (-2.16%); split: -2.17%, +0.01%
VGPRs: 14016 -> 14120 (+0.74%); split: -0.34%, +1.08%
Latency: 2143281 -> 2132212 (-0.52%); split: -0.56%, +0.05%
InvThroughput: 389116 -> 387990 (-0.29%); split: -0.34%, +0.05%
VClause: 4483 -> 4485 (+0.04%); split: -0.11%, +0.16%
SClause: 5780 -> 5778 (-0.03%); split: -0.17%, +0.14%
Copies: 15319 -> 15331 (+0.08%); split: -0.53%, +0.61%
Branches: 5561 -> 5563 (+0.04%)
PreSGPRs: 11776 -> 11775 (-0.01%)
PreVGPRs: 11393 -> 11497 (+0.91%); split: -0.13%, +1.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
67fc0e3655 ac/llvm: implement load_shared2_amd/store_shared2_amd
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
c883abda76 aco: implement load_shared2_amd/store_shared2_amd
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
5aa5af7776 aco: handle read2st64/write2st64 in optimizer
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
2135c88d9c aco: fix signedness of DS_instruction::offset0/1
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
778fc176b1 nir/opt_load_store_vectorize: create load_shared2_amd/store_shared2_amd
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
dc835626b3 nir/opt_load_store_vectorize: fix broken indentation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Rhys Perry
8ff122f8b8 nir: add load_shared2_amd and store_shared2_amd
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
2022-04-13 23:08:07 +00:00
Konstantin Seurer
bbdf22ce13 radv: Fix barriers with cp dma
We need to wait for cp dma if VK_PIPELINE_STAGE_2_ALL_TRANSFER_BIT or
VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT are set.

Closes: #5911
Fixes: 4b9bc4791b ("radv: only sync CP DMA for transfer operations or bottom pipe")

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15933>
2022-04-13 22:16:43 +00:00
Daniel Schürmann
d703a0e808 aco: remove register hints entirely
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Daniel Schürmann
2fe005a3fe aco: remove occurences of VCC hint
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Daniel Schürmann
b10c4d7dee aco: make program->needs_vcc independent of VCC hints
Totals from 5 (0.00% of 135048) affected shaders: (GFX9)
SGPRs: 208 -> 160 (-23.08%)
CodeSize: 2700 -> 2692 (-0.30%)
Instrs: 533 -> 531 (-0.38%)
Latency: 41688 -> 41680 (-0.02%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Daniel Schürmann
415a3820fc aco/ra: omit VCC affinity on VOPC_SDWA for GFX9+
VOPC_SDWA can also use arbitrary SGPR pairs on GFX9+.

Totals from 5607 (4.16% of 134913) affected shaders: (GFX10.3)
CodeSize: 42470760 -> 42452988 (-0.04%)
Instrs: 7943174 -> 7942883 (-0.00%)
Latency: 102887029 -> 102886305 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 20454456 -> 20454338 (-0.00%); split: -0.00%, +0.00%
Copies: 376818 -> 376865 (+0.01%); split: -0.00%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Daniel Schürmann
6ebc61d71b aco/ra: create VCC-affinities during RA
instead of using register hints.

Totals from 88367 (65.50% of 134913) affected shaders: (GFX10.3)
CodeSize: 322492184 -> 322252912 (-0.07%); split: -0.08%, +0.01%
Instrs: 60615809 -> 60541260 (-0.12%); split: -0.12%, +0.00%
Latency: 557067980 -> 557009210 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 109676757 -> 109674804 (-0.00%); split: -0.00%, +0.00%
SClause: 1939703 -> 1939924 (+0.01%); split: -0.01%, +0.02%
Copies: 4557567 -> 4487530 (-1.54%); split: -1.54%, +0.00%
Branches: 1941123 -> 1937453 (-0.19%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Daniel Schürmann
44fb9ba84a aco/ra: only use VCC if program->needs_vcc == true
A future commit will make VCC register assignment independent
from register hints. Up to GFX9, VCC can alternatively be used
as regular SGPR, so prevent overlap.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
2022-04-13 21:52:43 +00:00
Lionel Landwerlin
08f3950d6b anv: stop using old entrypoint/struct/enum names for 1.3
v2: More replacements

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15920>
2022-04-13 21:13:56 +00:00
Emma Anholt
5fad6bca72 nir_to_tgsi: Do the required cleanup for nir_opt_find_array_copies().
If we made a copy deref, then we need to do dead-write elimination for the
pervious writes or we'll just emit the same copy deref again next time
around.  And, at the end of the opt loop, we need to lower copy derefs
because later passes (locals_to_regs, notably) depend on it.

Fixes infinite opt loop on fs-function-inout-array with virgl on NTT.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15899>
2022-04-13 19:44:39 +00:00
Jason Ekstrand
c8df09ebd4 iris: More gracefully fail in resource_from_user_memory
rusticl (and clover) would like to get a graceful fail here so they can
fall back to a shadow copy instead of us asserting.  We also start
rejecting arrayed surface because isl doesn't allow selecting a QPitch
yet.  Even if it did, QPitch is horribly restrictive, even for linear
surfaces, that it likely wouldn't be that useful.

Fixes: e81f3edf76 ("iris: Allow userptr on 1D and 2D images")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15903>
2022-04-13 19:18:54 +00:00
Mike Blumenkrantz
8501661332 zink: set optimal tiling on swapchain images
this otherwise breaks kopper

fixes #6294

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15928>
2022-04-13 19:01:29 +00:00
Louis-Francis Ratté-Boulianne
3017522e74 dzn: Add CI target for vulkan driver
A custom branch of `deqp` is used to have proper results when
crashing. See:

https://github.com/KhronosGroup/VK-GL-CTS/issues/311

A custom branch of `deqp-runner` with Windows support is also
used until the changes are merged into the main repository.

The `api`, `info`, `draw`, `query-pool` and `memory` test cases are
executed for now.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15742>
2022-04-13 18:05:44 +00:00
Louis-Francis Ratté-Boulianne
fb24f34fc3 dzn: Add a debug flag to enable D3D12 debug layer
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15742>
2022-04-13 18:05:44 +00:00
Karmjit Mahil
f7ddd584ab pvr: Implement vkCreateQueryPool() and vkDestroyQueryPool().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15880>
2022-04-13 17:58:03 +00:00