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Author SHA1 Message Date
Rhys Perry
3b42626973 ac/nir: allow 8/16-bit smem loads 
fossil-db (gfx1201):
Totals from 295 (0.37% of 79377) affected shaders:
Instrs: 314018 -> 313355 (-0.21%); split: -0.22%, +0.00%
CodeSize: 1697996 -> 1696528 (-0.09%); split: -0.11%, +0.02%
Latency: 4197719 -> 4197106 (-0.01%)
InvThroughput: 1258891 -> 1258744 (-0.01%)
PreSGPRs: 12232 -> 12230 (-0.02%)
SALU: 66762 -> 66269 (-0.74%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
5b116c4de9 ac/nir: allow vectorization of unsupported 8/16-bit loads 
These can later be lowered to a vectorized 32-bit load.

fossil-db (gfx1201):
Totals from 1259 (1.59% of 79377) affected shaders:
MaxWaves: 36821 -> 36817 (-0.01%)
Instrs: 4363702 -> 4355749 (-0.18%); split: -0.23%, +0.05%
CodeSize: 22779980 -> 22706504 (-0.32%); split: -0.37%, +0.05%
VGPRs: 69672 -> 69792 (+0.17%); split: -0.02%, +0.19%
SpillSGPRs: 675 -> 673 (-0.30%)
Latency: 26684053 -> 26663819 (-0.08%); split: -0.11%, +0.03%
InvThroughput: 5617687 -> 5614798 (-0.05%); split: -0.10%, +0.04%
VClause: 106830 -> 106654 (-0.16%); split: -0.17%, +0.00%
SClause: 75523 -> 75495 (-0.04%); split: -0.04%, +0.01%
Copies: 323199 -> 323525 (+0.10%); split: -0.10%, +0.20%
Branches: 109475 -> 109480 (+0.00%); split: -0.00%, +0.01%
PreSGPRs: 55036 -> 55040 (+0.01%)
PreVGPRs: 47538 -> 47582 (+0.09%); split: -0.12%, +0.21%
VALU: 2377777 -> 2389977 (+0.51%); split: -0.02%, +0.53%
SALU: 578272 -> 578385 (+0.02%); split: -0.02%, +0.04%
VMEM: 190065 -> 181204 (-4.66%)
SMEM: 99709 -> 99565 (-0.14%)
VOPD: 244 -> 243 (-0.41%); split: +0.41%, -0.82%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
6dbf44ad9c ac/nir: allow less than one register of overfetch 
This is to allow vectorization of 8/16-bit loads, which can later be
cheaply lowered to a 32-bit load.

fossil-db (gfx1201):
Totals from 178 (0.22% of 79377) affected shaders:
MaxWaves: 4138 -> 4102 (-0.87%)
Instrs: 619714 -> 617917 (-0.29%); split: -0.32%, +0.03%
CodeSize: 3364396 -> 3352724 (-0.35%); split: -0.38%, +0.03%
VGPRs: 12896 -> 12980 (+0.65%); split: -0.19%, +0.84%
SpillSGPRs: 546 -> 545 (-0.18%)
Latency: 7589585 -> 7406076 (-2.42%); split: -2.45%, +0.04%
InvThroughput: 1926356 -> 1879866 (-2.41%); split: -2.42%, +0.00%
VClause: 12301 -> 11750 (-4.48%)
SClause: 13614 -> 13583 (-0.23%); split: -0.45%, +0.22%
Copies: 82207 -> 82265 (+0.07%); split: -0.10%, +0.17%
Branches: 19284 -> 19266 (-0.09%)
PreSGPRs: 9525 -> 9457 (-0.71%)
PreVGPRs: 12366 -> 12421 (+0.44%)
VALU: 347928 -> 348020 (+0.03%); split: -0.01%, +0.04%
SALU: 82620 -> 82519 (-0.12%); split: -0.19%, +0.07%
VMEM: 22248 -> 21430 (-3.68%)
SMEM: 17951 -> 17843 (-0.60%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
ddef4bddf8 ac/nir: round components when lowering 8/16-bit loads to 32-bit 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Jesse.Zhang
d8624e6a79 winsys/amdgpu: Add support for queue priority in Mesa
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This patch adds support for queue priority levels in Mesa's AMDGPU winsys layer.
The changes include:

1. Updated ac_drm_create_userqueue() to accept and pass through flags parameter
2. Modified amdgpu_userq_init() to use the flags when creating queues
3. Added flags field to amdgpu_userq struct to store priority settings
4. Updated header definitions to match kernel UAPI changes

This aligns with the kernel changes provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html

v2: We only need 1 normal priority queue and 1 TMZ normal priority queue.(Marek Olšák)
v3: Simplified to only support normal priority queues
v4: use a local variable instead of being in struct amdgpu_userq.(Marek Olšák)
v5: rebase the latest main branch.

Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34568>
 2025-05-08 04:29:29 +00:00
Marek Olšák
870d17012a ac: adjust maximum HS workgroup size
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This has no effect on triangles because max 64 patches implied max 192
threads, but it improves performance for cases when the number of threads
per patch is > 3.

This improves the score for gfxbench5 "gl_tess_off" (offscreen) by 11%
on Navi48.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
dfc3c1135c ac/nir/tess: don't pass nir_intrinsic_instr to hs_output_lds_offset 
It will be used without intrinsics.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
4bbe497d9b ac/nir/tess: don't pass nir_intrinsic_instr to VMEM IO calc helpers 
These will be used without intrinsics.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
360494f50d ac/nir/tess: remove unused variables 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:12 +00:00
Marek Olšák
f58c0cbb6a nir: split *_accessed_indirectly* bitmasks into *_read/written_indirectly* 
for AMD

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:12 +00:00
Konstantin Seurer
84b9c281fe radv: Return VK_ERROR_INCOMPATIBLE_DRIVER for unsupported devices
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VK_ERROR_INITIALIZATION_FAILED will fail physical device enumeration.
Returning VK_ERROR_INCOMPATIBLE_DRIVER means that the driver can still
be used on supported GPUs when multiple GPUs are installed.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34783>
 2025-05-07 08:26:33 +02:00
Marek Olšák
7f0de1a512 ac: remove gfx11_emulate_clear_state
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We don't use CLEAR_STATE on gfx11 anymore.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34589>
 2025-05-02 18:40:11 +00:00
Marek Olšák
5e487dbc49 amd: stop using CLEAR_STATE on gfx11 
It's not allowed with user queues, so this will make it simpler to support
user queues.

There are 2 groups of registers:
- those that are never set by radv and radeonsi - those are now set
  in the shared preamble
- those that are set by radv but not radeonsi - those are now set
  in the radeonsi preamble

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34589>
 2025-05-02 18:40:11 +00:00
Pierre-Eric Pelloux-Prayer
992a340eab ac/nir: init blake3 for cs blit shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34574>
 2025-04-23 07:59:10 +00:00
Marek Olšák
2948f7ce96 ac/gpu_info: rename tess ring variables, fold double_offchip_wg 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
d2e016c37d ac/nir: don't store tess levels for TES in TCS if no_varying is set 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
be8977811b ac/nir: remove shader_info parameter from ac_nir_compute_tess_wg_info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
6d9e708642 ac/gpu_info: reduce the tess offchip ring size and compute it proportionately 
.. to the CU count. We allocated too much.

This reduces the tess offchip ring size as follows (examples):
- GFX11-12:
  - Navi31, Navi33, and Navi48 get 75% decrease.
  - Navi32 gets 68.75% decrease.
  - Phoenix gets 81.25% decrease.
  - Phoenix2 gets 93.75% decrease.
- GFX10.3:
  - Navi21 and Navi22 get 37.5% decrease.
  - Navi23 and Navi24 get 50% decrease.
  - Rembrandt gets 62.5% decrease.
  - VanGogh gets 75% decrease.
  - Raphael gets 93.75% decrease.
- GFX8-9:
  - Vega10 gets 0% decrease.
  - Vega20 gets 49.6% decrease.
  - Raven gets 65.3% decrease.
  - Raven2 gets 93.7% decrease.
  - Stoney gets 81% decrease.

No difference in performance was measured.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
9333c0a1ed ac/gpu_info: compute the tess factor ring size proportionately to the CU count 
No change in the size on GPUs with 16 CUs per SE such as Navi31 and Navi48.
Navi21 and Navi32 get 25% increase. (20 CUs per SE)

APUs get a significant decrease. For example:
- Phoenix gets 25% decrease
- Vangogh gets 50% decrease
- Phoenix2 gets 75% decrease
- Raphael and Stoney get 87.5% decrease

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
5fb2de9454 ac/nir: don't include TCS offchip size in LDS_SIZE 
This drastically reduces LDS usage for TCS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
b8f2fb81f6 ac/gpu_info: print tessellation ring info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
b8d15fee3d ac: minor cleanup of ac_compute_num_tess_patches 
No change in behavior.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
a905a17f39 ac: use HS offchip wg size from radeon_info in ac_compute_num_tess_patches 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
d82eda72a1 ac/gpu_info: move HS info into radeon_info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:55:00 -04:00
Marek Olšák
ea294349bd radv: move the tess factor ring after the tess offchip ring 
to match radeonsi

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:54:59 -04:00
Marek Olšák
c057d9105f ac/gpu_info: add total_tess_ring_size 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:54:59 -04:00
Marek Olšák
97119d980c ac/gpu_info: clean up ac_get_hs_info, use standard terms like workgroup 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
 2025-04-19 22:54:59 -04:00
Yogesh Mohan Marimuthu
e63b24bee8 ac,radeonsi: clear_state is not supported in user queue
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
 2025-04-18 07:45:33 +00:00
Yogesh Mohan Marimuthu
61fd80a42e ac,winsys/amdgpu: get userq_ip_mask supported from kernel info ioctl 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
 2025-04-18 07:45:33 +00:00
Konstantin Seurer
fe739a2da2 ac: Add rt_version 
rt_version describes which generation of RT capabilities a chip has.
This matches what PAL does.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
 2025-04-17 20:20:40 +00:00
Samuel Pitoiset
e433a57650 ac,radeonsi: rework computing scratch wavesize and tmpring register 
To be re-used by RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34549>
 2025-04-17 10:35:40 +00:00
Samuel Pitoiset
d94f8b4460 ac/gpu_info,radv: add scratch_wavesize_granularity info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34549>
 2025-04-17 10:35:40 +00:00
Samuel Pitoiset
13db408e59 ac/perfcounter: add support for GFX12 
Sourced from PAL to add SPM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34524>
 2025-04-16 06:35:33 +00:00
Samuel Pitoiset
c42d43e8eb radv: print more error messages during SPM initialization 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34524>
 2025-04-16 06:35:33 +00:00
Marek Olšák
78cacfd9ce ac/surface: select 3D tile mode without overallocating too much for gfx6-8 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12466
Fixes: c87ce78d - ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
195e7b4f75 ac/surface: make gfx12_estimate_size reusable by gfx6 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12466
Fixes: c87ce78d - ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
2c122d478b ac/nir: set X=0 for task->mesh shader dispatch when Y or Z is 0 
The code set X=0 when Y and Z is 0, not "or".

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
963147d7fd ac/gpu_info: add 256 to payload_entry_size to increase future task shader perf 
It has no effect because num_entries is 1K, but the table shows a lot of
potential.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
d7c903f258 ac/gpu_info: add payload_entry_size into ac_task_info 
to stop causing full RADV recompiles when it's changed.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
0dafd04695 ac/gpu_info: remove has_tmz_support function 
It's not needed since:
    8b3056343f - ac/gpu_info: bump required DRM minor version to 3.42.0 (kernel 5.15+)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
0be5a3559a ac/gpu_info: increase the attribute ring size for gfx12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00
Marek Olšák
e4a30b7241 ac/surface: remove 64K_2D modifier with 64B max compressed blocks for gfx12 
It has no use and is slower.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
 2025-04-07 19:44:22 +00:00
Marek Olšák
27d5be13c6 ac/nir/cull: always do frustum culling, skip only small prim culling 
Only small prim culling uses the viewport state, so only that must be
disabled when there are multiple viewports.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
 2025-04-07 19:44:22 +00:00
Marek Olšák
0f97dc707d ac/nir/cull: rename skip_viewport_culling -> skip_viewport_state_culling 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
 2025-04-07 19:44:22 +00:00
Marek Olšák
bc27ad8064 ac: define physical VGPRs for fake hw overrides 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
 2025-04-07 19:44:22 +00:00
Marek Olšák
1d5c42528b nir/opt_algebraic: lower 16-bit imul_high & umul_high 
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34016>
 2025-04-07 19:44:22 +00:00
Samuel Pitoiset
8b3056343f ac/gpu_info: bump required DRM minor version to 3.42.0 (kernel 5.15+) 
Linux 5.15+ (LTS) has been released in October 31 and it's supported
until December 2026. Linux 4.x are very old at this point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34375>
 2025-04-07 06:44:23 +00:00
Samuel Pitoiset
042770ceea ac,radv: remove has_scheduled_fence_dependency 
This isn't used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34375>
 2025-04-07 06:44:22 +00:00
Samuel Pitoiset
fac44c0ca0 ac/surface: fix selecting preferred alignments for HiZ/HiS on GFX12 
VK_MESA_image_alignment_control is used by vkd3d-proton to set
optimal alignments for images. Though, the preferred alignment was
only applied to the surface (or the stencil aspect) but not to the HiZ
surface due to the NULL check.

This caused rendering issues because swizzle modes didn't match.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12831
Fixes: 079f55d405 ("radv: advertise VK_MESA_image_alignment_control on GFX12")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34322>
 2025-04-02 06:47:59 +00:00
Marek Olšák
ce716d009f ac/nir/cull: cull small prims using a point-triangle intersection test
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This is based on Timur Kristof's code, but there are a lot of differences.
The idea is that it doesn't just compute an intersection between a point
and a triangle. It computes the *distance* between a point and a triangle
and it does so in screen space. It accurately takes the subpixel precision
of the rasterizer into account, so that it works optimally at all
resolutions, all MSAA modes, and all quant modes.

The distance computation is only approximated because it only considers
the infinite lines going through triangle edges. However, it seems to be
more than sufficient in practice because the existing rounding-based small
prim culling compensates for it.

The performance improvement is up to 10% in some geometry-bound tests,
though targeted microbenchmarks can show a lot more than that.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33361>
 2025-04-01 16:12:22 +00:00