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Author SHA1 Message Date
Alyssa Rosenzweig
56ffad0c3a jay: call DCE an extra time 
Totals:
Instrs: 2767235 -> 2765908 (-0.05%); split: -0.10%, +0.05%
CodeSize: 44349488 -> 44328688 (-0.05%); split: -0.10%, +0.06%

Totals from 347 (13.11% of 2647) affected shaders:
Instrs: 718067 -> 716740 (-0.18%); split: -0.39%, +0.20%
CodeSize: 11626032 -> 11605232 (-0.18%); split: -0.39%, +0.21%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:06 +00:00
Alyssa Rosenzweig
d85eb51e17 jay/register_allocate: don't depend on indexing 
this can get messed up by optimizations.

Totals:
Instrs: 2768612 -> 2764317 (-0.16%); split: -0.29%, +0.13%
CodeSize: 44367648 -> 44300352 (-0.15%); split: -0.28%, +0.13%

Totals from 867 (32.75% of 2647) affected shaders:
Instrs: 1694745 -> 1690450 (-0.25%); split: -0.47%, +0.22%
CodeSize: 27387648 -> 27320352 (-0.25%); split: -0.46%, +0.21%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:06 +00:00
Alyssa Rosenzweig
a964f321a5 jay: don't print internal without the flag 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:06 +00:00
Alyssa Rosenzweig
3a73c76373 jay: fix spiller coupling code 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:05 +00:00
Alyssa Rosenzweig
cd6c5a2f90 jay: improve spiller debug 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:05 +00:00
Alyssa Rosenzweig
d637554418 jay: fix simd32 deswizzle 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:05 +00:00
Alyssa Rosenzweig
f728e3cb05 jay: test logic op fusing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:04 +00:00
Alyssa Rosenzweig
698223ccd1 jay/test-optimizer: fuse before/after cases 
new macro to DRY.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:04 +00:00
Alyssa Rosenzweig
99796bff04 jay: fold logic ops 
Totals:
Instrs: 2798036 -> 2784419 (-0.49%); split: -0.58%, +0.10%
CodeSize: 44815024 -> 44614000 (-0.45%); split: -0.56%, +0.11%
Number of fill instructions: 2270 -> 2280 (+0.44%)

Totals from 1298 (49.04% of 2647) affected shaders:
Instrs: 2165338 -> 2151721 (-0.63%); split: -0.75%, +0.13%
CodeSize: 34865440 -> 34664416 (-0.58%); split: -0.72%, +0.15%
Number of fill instructions: 1571 -> 1581 (+0.64%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:04 +00:00
Alyssa Rosenzweig
5d22e9d2a5 jay: allow predication of pure-flag instrs 
i.e. compares

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:03 +00:00
Alyssa Rosenzweig
2ab8a614dd jay/register_allocate: tie predicated-defaults 
(if we can)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:03 +00:00
Alyssa Rosenzweig
d74ada78c0 jay/assign_flags: handle predicated CMP 
the optimizer will generate this soon, so make sure flag RA can deal.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:02 +00:00
Alyssa Rosenzweig
375945ea0b jay/lower_pre_ra: skip predication 
otherwise the assert blows up

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:02 +00:00
Alyssa Rosenzweig
176b9a0f0c jay/opt_dead_code: handle predication 
otherwise we'll get validation splat soon.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:02 +00:00
Alyssa Rosenzweig
f63ab3eea5 jay/register_allocate: use standard builder name 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:02 +00:00
Alyssa Rosenzweig
f98e2b24bc jay: fix the source pinning code 
I was just trying to get rid of the loop but it also generates better code.

Totals:
Instrs: 2806469 -> 2798036 (-0.30%); split: -0.33%, +0.02%
CodeSize: 44950448 -> 44815024 (-0.30%); split: -0.32%, +0.02%

Totals from 143 (5.40% of 2647) affected shaders:
Instrs: 665554 -> 657121 (-1.27%); split: -1.37%, +0.10%
CodeSize: 10611344 -> 10475920 (-1.28%); split: -1.37%, +0.10%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:02 +00:00
Alyssa Rosenzweig
ad731766d3 jay: fix SEL implied pipe 
Pretty obscure, but this is not valid:

< (1&W)       sync.nop _.0                                        | $2.dst
< (32&f2.0)   sel.f32 g48, g48, -g40                              | I@7
---
> (32&f2.0)   sel.f32 g48, g48, -g40                              | @7 $2.dst

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:01 +00:00
Alyssa Rosenzweig
9b423bfe94 jay: reduce calloc to malloc when memsetting after 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:01 +00:00
Alyssa Rosenzweig
b46d677aab jay: reduce zeroing 
this is fully initialized when constructing phi webs anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:01 +00:00
Alyssa Rosenzweig
e20f8ab2b2 jay: generalize last kill code 
Totals:
Instrs: 2815692 -> 2806469 (-0.33%); split: -0.44%, +0.11%
CodeSize: 45100624 -> 44950448 (-0.33%); split: -0.44%, +0.11%

Totals from 1292 (48.81% of 2647) affected shaders:
Instrs: 2427684 -> 2418461 (-0.38%); split: -0.51%, +0.13%
CodeSize: 38993984 -> 38843808 (-0.39%); split: -0.51%, +0.13%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:00 +00:00
Alyssa Rosenzweig
70bfa005a5 jay: drop dead code 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:32:00 +00:00
Alyssa Rosenzweig
f39f6ce7ba jay: strengthen assert 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41064>
 2026-04-20 22:31:59 +00:00
Lionel Landwerlin
3388123f02 anv/apply_layout: move some helpers around
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
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No functional changes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
fc44be9762 anv: run a single impl loop for apply_pipeline_layout 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
bbeb6be6eb nir: expose nir_opt_dce_impl 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
55509ac096 anv: simplify inline uniform descriptor loads 
Since e94cb92cb0 ("anv: use internal surface state on Gfx12.5+ to
access descriptor buffers") we're only using the 32bit_index_offset
address format for loads from descriptor memory.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
730227d1a9 anv: fix relocations into internal shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
373a4df639 anv: remove unused defines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
9ab20cc4e4 anv: switch from INTEL_DEBUG to ANV_DEBUG for shader-print 
Only used by Anv

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
88b4eed4f6 anv: rework debug flag 
Making it easier to use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
d581b7282b anv: fixup compute queue detection 
I ran into this case where genX(cmd_buffer_emit_bt_pool_base_address)
was returning immediately because it considered an RCS engine
emulating a compute queue as neither a render nor a compute queue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
c0c324fcb2 anv: fix debug printfs on hang 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0932d0c7e0 ("anv/xe: rework set_lost handling in xe_exec_ioctl()")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
3256fab5a3 anv: fix invalid value for push block index 
Probably worked because we could always reach to things through the
binding table and the index was the same.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
773fef12cd anv: fix compute push constant allocations on pre Gfx12.5 platforms 
MEDIA_CURBE_LOAD::CURBETotalDataLength needs to be 64B aligned.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
f6306198d0 anv: avoid C23 
For some reason the android builders started noticing...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Lionel Landwerlin
13f5531692 intel/dev: fixup intel_needs_workaround() macro 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41047>
 2026-04-20 21:53:35 +03:00
Jesse Natalie
7adfea17e3 d3d12: Handle THREAD_SAFE maps and use them for async query results
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41061>
 2026-04-20 18:09:30 +00:00
Erik Faye-Lund
c8ae72f51d panvk: do not enable extension without required feature 
The Vulkan spec states that if VK_KHR_shader_clock is supported,
shaderSubgroupClock is a required feature. So let's not enable that
extension unless we can...

Fixes: e9c2c32409 ("panvk: enable VK_KHR_shader_clock")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40944>
 2026-04-20 17:36:20 +00:00
Erik Faye-Lund
8cb89853b8 panvk: do not enable extension without required feature 
The Vulkan spec states that if VK_ARM_shader_core_builtins is supported,
shaderCoreBuiltins is a required feature. So let's not enable that
extension unless we can...

Fixes: dff1d91c64 ("panvk: Enable VK_ARM_shader_core_builtins")
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40944>
 2026-04-20 17:36:20 +00:00
Erik Faye-Lund
bf460a525d gallium: completely remove T{EX,XF}_LZ opcode 
This isn't in use, let's cull it.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:21 +00:00
Erik Faye-Lund
208ecb1827 ttn: do not handle T{EX,XF}_LZ 
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:21 +00:00
Erik Faye-Lund
ffe77d756f gallium: remove defunct pipe-cap 
This is no longer in use, let's just drop the cap here.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:21 +00:00
Erik Faye-Lund
307a861709 gallium/u_blitter: stop emitting TEX_LZ 
No drivers care about this any more, let's get rid of it.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:21 +00:00
Erik Faye-Lund
f3a5e9c15b ntt: stop emitting TXF_LZ 
No driver listens any more, so let's just drop this.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Erik Faye-Lund
0a8072f66e llvmpipe: drop support for tgsi_tex_txf_lz cap 
LLVMpipe is the only driver that actually has supported the instructions
that this cap reports about. But TGSI is a dying IR, and this helps very
little; the compiler back-end will optimize this away anways.

So let's drop it to reduce complexity.

Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Erik Faye-Lund
4c7b212165 iris,crocus: remove benign but unsupported cap 
These instructions were never supported on Iris, as it never supported
TGSI. This didn't lead to any issues because tgsi_to_nir normalized the
result. This mistake got carried forward when creating crocus as well.

Let's just stop reporting it; it doesn't do anything useful.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Erik Faye-Lund
a4bec6a001 d3d12: remove benign but unsupported cap 
This was never supported in the D3D12 driver, but it never caused any
harm, because the conversion to NIR normalized things for us.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Erik Faye-Lund
261cb0e9bf radeonsi: remove old, unsupported cap 
This hasn't been supported for a long time.

Fixes: 420fe1e7f9 ("radeonsi: remove TGSI")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Erik Faye-Lund
b062062430 nouveau: do not report unsupported feature 
This hasn't been supported since the TGSI envvar was ripped out. When
converted to NIR, we don't see these instructions at all.

Fixes: c3cbe610df ("nouveau: Delete the NV50_PROG_USE_TGSI env var.")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
 2026-04-20 17:09:20 +00:00
Zan Dobersek
9931034dca tu/a8xx: remove enforced TU_DEBUG_FLUSHALL 
Remove the TU_DEBUG_FLUSHALL option that was force-enabled for a8xx chips.
The problematic CTS cases that required it were failing due to indirect
draw commands sourcing draw data from buffers whose content was prepared
by compute tasks.

Up until a8xx, firmware was managing an implicit wait before any indirect
draw parameters were read, with a delayed CP_WAIT_FOR_ME emitted only when
necessary or on devices enabling indirect_draw_wfm_quirk due to bugged
firmware. That implicit wait is gone on a8xx, so CP_WAIT_FOR_ME should be
emitted immediately, which also matches behavior of the proprietary driver.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40550>
 2026-04-20 16:44:56 +00:00